Publications and News
Here are some selected publications and LIP6-CIAN news organised in thematic areas:
About the Coriolis Placer and Router,
- Coriolis FOSS EDA placer and router, GPL licence, CopyRight Sorbonne Université Coriolis gitLab at LIP6
- Coriolis RTL-to-GDSII Toolchain, State of advancement and planned improvements, J.-P. Chaput, FOSDEM February 2022. available on FOSDEM 2022
- Accessit est décerné au logiciel CORIOLIS VLSI CAD TOOLS, Open Science European Conference, February 2022, OSEC 2022
award available on MESR 2022- Coriolis, a FOSS RTL-to-GDSII Toolchain, J.-P. Chaput, Open Tape Out Conference, November 2021. available on YouTube
- Coriolis2 -- A FOSS RTL to GDSII toolchain, J.-P. Chaput Open Power Summit, October 2021. available on OpenPower Summit
- Alliance and Coriolis2, parametric programmatic ASIC Place and Route using python, L.-K. Casson-Leighton, FOSDEM February 2021. available on FOSDEM 2021
- Coriolis2, J.-P. Chaput, The OSDA Workshop with DATE 2020. available on OSDA WP
- The Alliance/Coriolis Design Flow, J.-P. Chaput, Free Silicon Conference (FSiC), 2019, Paris, France. available on FSiC
Toward Free and Open Source Hardware with FOSS EDA,
- Open Hardware, M.-M. Louërat, Journée Annuelle du LIP6, Septembre 2022.
- Logiciels open-source pour le hardware, M.-M. Louërat, Colloque du GDR SOC2, Session Méthodes et Outils, Strasbourg, juin 2022. online on GDR SOC2
- Vers une licence libre pour les circuits intégrés sur silicium, M.-M. Louërat, séminaire du département Comelec, LTCI, Institut Polytechnique de Paris, 18 novembre 2021. online on IPP
- Des petits pas vers l'Open Hardware, M.-M. Louërat, J.-P. Chaput, R. Chotin, séminaire IRILL (Research and Innovation on Free Software), 21 octobre 2021. online on IRILL
- LibreSoC, Libre-SOC 180nm Power ISA ASIC Submitted to Imec for Fabrication, available on OpenPower Foundation
- RISC-V design using Free Open Source Software, J.-P. Chaput, M.-M. Louërat, R. Chotin-Avot, A. Satin, The RISC-V Week, Paris, France (2019). available on HAL 27
- From filters to transistors A library of analog schematic with automated sizing Team: FOSS EDA for analog and mixed circuit design, J. Porte, M.-M. Louërat, Free Silicon Conference, Paris, France (2019). available on HAL 26
- Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping, N. Shimizu, J. Akita, M.-M. Louërat, H.-G. Stratigopoulos, J.-P. Chaput, D. Galayko, IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, (IEEE) (2018). available online 21
Security and Reliability of AMS hardware
- Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs Antonios Pavlidis, Eric Faehn, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos. 40th IEEE VLSI Test Symposium 2022, Apr 2022, San Diego, United States. available on HAL 36
- Anti-Piracy of Analog and Mixed-Signal Circuits in FD-SOI Mariam Tlili, Alhassan Sayed, Doaa Mahmoud, Marie-Minerve Louërat, Hassan Aboushady, et al. 27th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan 2022, Virtual, Taiwan. available on HAL 35
- SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety A. Pavlidis, M.-M. Louerat, E. Faehn, A. Kumar, H.-G. Stratigopoulos IEEE Transactions on Circuits and Systems I: Regular Papers, (IEEE) (2021) available on HAL 34
- BIST-Assisted Analog Fault Diagnosis Antonios Pavlidis, Eric Faehn, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos. 26th IEEE European Test Symposium, May 2021, Bruges (virtual), Belgium. available on HAL 33
- Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. Stratigopoulos. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, In press. available on HAL 32
- Digital-to-Analog Hardware Trojan Attacks Mohamed Elshamy, Giorgio Di Natale, Alhassan Sayed, Antonios Pavlidis, Marie-Minerve Louërat, et al. IEEE Transactions on Circuits and Systems I: Regular Papers, IEEE, inPress, pp.1-14. available on HAL 31
- Breaking Analog Biasing Locking Techniques via Re-Synthesis, Julian Leonhard, Mohamed Elshamy, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos. 26th Asia and South Pacific Design Automation Conference (ASPDAC '21), Jan 2021, Tokyo, Japan. available on HAL 30
- Analog and Mixed-Signal IC Security Via Sizing Camouflaging. , Julian Leonhard, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. Stratigopoulos. 2020. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, In press available on HAL 40
- Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism, Mohamed Elshamy, Giorgio Di Natale, Antonios Pavlidis, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos. IEEE European Test Symposium (ETS), May 2020, Tallinn, Estonia. available on HAL 29
- Securing Programmable Analog ICs Against Piracy, M. Elshamy, A. Sayed, M.-M. Louërat, A. Rhouni, H. Aboushady, H.-G. Stratigopoulos, Proc. Design, Automation and Test in Europe Conference, Grenoble, France (DATE 2020). available on HAL 23
- Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP, A. Pavlidis, M.-M. Louërat, E. Faehn, A. Kumar, H.-G. Stratigopoulos, Proc. Design, Automation and Test in Europe Conference, Grenoble, France (DATE 2020). available on HAL 24
- MixLock: Securing Mixed-Signal Circuits via Logic Locking, J. Leonhard, M. Yasin, Sh. Turk, M. Nabeel, M.-M. Louërat, R. Chotin-Avot, H. Aboushady, O. Sinanoglu, H.-G. Stratigopoulos, Proc. Design, Automation and Test in Europe Conference, Florence, Italy (DATE 2019). available on HAL 25
Modelisation and Simulation
- SystemC Analog/Mixed-Signal User’s Guide, User Perspective on IEEE Std. 1666.1-2016, M. Barnasconi, K. Einwich, C. Grimm, S. Adhikari, M. Damm, P. Floyd, D. Genius, M.M. Louërat, T. Maehne, F. Pêcheux, A. Vachoux, Accellera SystemC AMS Working Group, Accellera Systems Initiative, January 2020. available from Accellera Systems Initiative
- Pre-Simulation Elaboration of Heterogeneous Systems: The SystemC Multi-Disciplinary Virtual Prototyping Approach, C. Ben Aoun, L. Andrade, T. Maehne, F. Pêcheux, M.-M. Louërat, A. Vachoux, Proc. International Conference on Embedded Computer Systems: Architectures, Modelling and Simulation (SAMOS XV), Samos, Greece (2015). available online 1
- Pre-Simulation Symbolic Analysis of Synchronization Issues between Discrete Event and Timed Data Flow Models of Computation, L. Andrade, T. Maehne, A. Vachoux, C. Ben Aoun, F. Pêcheux, M.M. Louërat, Design, Automation & Test in Europe Conference & Exhibition, (DATE 2015), Grenoble, France, pp. 1671-1676 (2015). available on HAL 28
- Languages, Design Methods, and Tools for Electronic System Design: Selected Contributions from FDL 2013, M.-M. Louërat, T. Maehne (Eds.), vol. 311, Lecture Notes in Electrical Engineering (LNEE), (Springer), (ISBN: 978-3-319-06316-4) (2015).
- Holistic Modeling of Embedded Systems with Multi-Discipline Feedback: Application to a Precollision Mitigation Braking System, A. Lévêque, F. Pêcheux, M.M. Louërat, H. Aboushady, F. Cenni, S. Scotti, A. Massouri, L. Clavier, Design, Automation & Test in Europe Conference & Exhibition, (DATE 2012). available online 2
Analog and Mixed-Signal Design
- Split ADC Based Fully Deterministic Multistage Calibration for High Speed Pipeline ADCs, H. Adel, M. Sabut, M.-M. Louërat IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62 (6), pp. 1481-1488, (ISBN: 1549-8328) (2015) available online 9
- Background Analog and Mixed Signal Calibration System For Time-Interleaved ADC, R. Khalil, M.-M. Louërat, R. Petigny Microelectronics Journal, vol. 46 (7), pp. 656-667, (ISBN: 0026-2692) (2015) available online 10
- Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays, D. Khalil, M. Dessouky, V. Bourguet, M.-M. Rosset-Louërat, A. Cathelin, H. Ragai, Proceedings of the 6th International Symposium on Quality Electronic Design (ISQED'05), San Jose, CA, USA, March 2005, pp. 143. available online 11
- Loop Delay Compensation in Bandpass Continuous-Time Modulators without Additional Feedback Coefficients, H. Aboushady, M.-M. Rosset-Louërat, IEEE International Symposium on Circuits and Systems (ISCAS'04), Vancouver, Canada, May 2004. available online 12
- Systematic Approach for Scaling Coefficients of Discrete-Time and Continuous-Time Sigma-Delta Modulators, N. Beilleau, H. Aboushady, M.-M. Rosset-Louërat, MidWest Symposium on Circuits And Systems (MWSCAS'03), Le Caire, Egypte, December 2003, Winner of the Third Place Award in the Student Paper Contest, available online 13
- A 5mW, 100kHz Bandwidth, Current-Mode Continuous-Time Sigma-Delta Modulator with 84 dB Dynamic Range, H. Aboushady, F. Montaudon, F. Paillardet, M.-M. Rosset-Louërat, European Conference on Solid State Circuits Conference (ESSCIRC'2002), Florence, Italy, September 2002, pp. 283-286. available online 14
- Efficient Polyphase decomposition of Comb decimation filters in sigma-delta analog-to-digital converters, H. Aboushady, Y. Dumonteix, M.-M. Rosset-Louërat, H. Mehrez, IEEE transactions on Circuits and Systems II, October 2001, vol. 48, No 10. available online 15
- Efficient Polyphase Decomposition of Comb Decimation Filters in Sigma-Delta Analog-to-Digital Converters, H. Aboushady, Y. Dumonteix, M.-M. Rosset-Louërat, H. Mehrez, IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2000), Lansing MI, USA, August 2000, Winner of the Second Place Award in the Student Paper Contest, available on HAL 16
Verification
- UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases, M. Barnasconi, M. Dietrich, K. Einwich, Th. Vörtler, J.P. Chaput, M.-M. Louërat, F. Pêcheux, Zh. Wang, Ph. Cuenot, I. Neumann, Th. Nguyen, R. Lucas, E. Vaumorin IEEE Design & Test, pp. 76-86, (ISBN: 2168-2356) (2015) available online 17
- Virtual Prototyping, Verification and Validation Framework for Automotive Using SystemC, SystemC-AMS and SystemC-UVM, Y. Li, Zh. Wang, M.-M. Louërat, F. Pêcheux, R. Iskander, Ph. Cuenot, M. Barnasconi, Th. Vörtler, K. Einwich Embedded Real Time Software and Systems (ERTS2), Toulouse, France, pp. 1-10 (2014) Download ERTS2 Proceedings
- A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS, Y. Li, R. Iskander, F. Javid, M.-M. Louërat chapter in Models, Methods, and Tools for Complex Chip Design, vol. 265, Lecture Notes in Electrical Engineering, J. Haase (Ed.), pp. 89-108, (Springer), (ISBN: 978-3-319-01417-3) (2014) available online 18
- Use of MutiPhase Stability Intervals to handle Crosstalk with the Timing Analyzer hiTas, G. Avot, A. Greiner, M.-M. Rosset-Louërat, K. Dioury, A. Lester, A. Debreil, Design, Automation & Test in Europe Conference & Exhibition, (User Forum at DATE 2002), Paris, France, Mars 2002, pp. 112-116. available online 19
- Hierarchical Static Timing Analysis at Bull with HiTas, K. Dioury, A. Lester, A. Debreil, G. Avot, A. Greiner, M.-M. Rosset-Louërat, Design, Automation & Test in Europe Conference & Exhibition, (User Forum at DATE 2000), Paris, France, Mars 2000, pp. 55-60, Winner of the User Forum Prize, available online 20