{{{
-- Registre accumulateur 4 bits

ENTITY accu IS
PORT (
  ck     : IN  BIT;
  i      : IN  BIT_VECTOR(3 DOWNTO 0);
  q      : OUT BIT_VECTOR(3 DOWNTO 0);
  vdd    : IN  BIT;
  vss    : IN  BIT);
END accu;

ARCHITECTURE vbe OF accu IS

SIGNAL x : REG_VECTOR(3 DOWNTO 0) REGISTER;

BEGIN

  q <= x;
  label0 : BLOCK(ck='1' AND NOT ck 'STABLE)
  BEGIN
    x <= GUARDED i;
  END BLOCK;

END vbe;
}}}