[439] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : boot_hba_driver.h |
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| 3 | // Date : 01/11/2013 |
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| 4 | // Authors : Alain Greiner / Vu Son |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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| 7 | // This file defines a simplified driver for SocLib vci_multi_ahci, |
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| 8 | // a multi-channel, block-oriented, external mass storage peripheral |
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| 9 | // respecting the AHCI standard. The driver is used by the ALMOS-MKH |
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| 10 | // boot-loader when the USE_IOC_HBA flag is set in the hard_config.h file. |
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| 11 | // Each channel can access a different physical disk, modeled by a file |
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| 12 | // belonging to the operating system, and containing a complete disk image. |
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| 13 | // However, this driver implementation only supports one channel, since the |
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| 14 | // ALMOS-MKH boot-loader only uses one physical hard drive. |
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| 15 | // The driver uses a software FIFO to register a command defined by a |
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| 16 | // Command Descriptor. A 32-entry Command Descriptor array forms the |
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| 17 | // Command List. Each Command Descriptor is associated with a Command Table |
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| 18 | // describing one given command. |
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| 19 | // All accesses to the device registers are performed via 2 low-level |
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| 20 | // functions boot_hba_get_register() and boot_hba_set_register(). |
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| 21 | // Since the driver is used by the boot-loader, it implements synchronous |
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| 22 | // accesses to block device by polling the HBA_PXCI register to detect the |
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| 23 | // transfer completion, as interrupts are not activated. |
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| 24 | /////////////////////////////////////////////////////////////////////////////////// |
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| 25 | |
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| 26 | #ifndef BOOT_HBA_DRIVER_H |
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| 27 | #define BOOT_HBA_DRIVER_H |
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| 28 | |
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[457] | 29 | #include <hal_kernel_types.h> |
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[439] | 30 | |
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| 31 | /**************************************************************************** |
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| 32 | * Driver register map. * |
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| 33 | ****************************************************************************/ |
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| 34 | |
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| 35 | enum HBA_registers |
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| 36 | { |
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| 37 | HBA_PXCLB = 0, /* 32 LSB of the Command List address */ |
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| 38 | HBA_PXCLBU = 1, /* 32 MSB of the Command List address */ |
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| 39 | HBA_PXIS = 2, /* Channel status, for error reporting */ |
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| 40 | HBA_PXIE = 3, /* Enabling / disabling the IRQ line */ |
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| 41 | HBA_PXCMD = 4, /* Activate Command List polling */ |
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| 42 | HBA_PXCI = 5, /* Command status bit-vector. */ |
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| 43 | |
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| 44 | HBA_SPAN = 0x400, /* HBA channel segment size (32 bits words) */ |
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| 45 | }; |
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| 46 | |
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| 47 | /**************************************************************************** |
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| 48 | * This structure defines the Command Descriptor. * |
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| 49 | ****************************************************************************/ |
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| 50 | |
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| 51 | typedef struct hba_cmd_desc_s |
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| 52 | { |
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| 53 | unsigned char flag[2]; /* WRITE when bit 6 of flag[0] is set. */ |
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| 54 | unsigned char prdtl[2]; /* Number of buffers. */ |
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| 55 | uint32_t prdbc; /* Number of bytes transfered. */ |
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| 56 | uint32_t ctba; /* 32 LSB of Command Table address. */ |
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| 57 | uint32_t ctbau; /* 32 MSB of Command Table address. */ |
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| 58 | |
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| 59 | } |
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| 60 | hba_cmd_desc_t; |
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| 61 | |
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| 62 | /**************************************************************************** |
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| 63 | * These structures define the Command Table associated with each Command * |
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| 64 | * Descriptor. * |
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| 65 | * * |
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| 66 | * For a given command, there is only one LBA coded in 48 bits to identify * |
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| 67 | * the block(s) on the device to be transfered. Yet the memory buffer can * |
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| 68 | * be splitted in a variable number of contiguous buffers. The Command * |
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| 69 | * Table thus contains 2 data structures: * |
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| 70 | * - 'hba_cmd_header_t' structure: fixed-size header (16 bytes) defining * |
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| 71 | * the LBA. * |
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| 72 | * - 'hba_cmd_buffer_t' structure: variable-sized array of fixed-size (16 * |
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| 73 | * bytes) buffer descriptors. * |
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| 74 | ****************************************************************************/ |
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| 75 | typedef struct hba_cmd_header_s |
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| 76 | { |
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| 77 | /* Word 1. */ |
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| 78 | uint32_t res0; /* Reserved. */ |
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| 79 | |
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| 80 | /* Word 2. */ |
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| 81 | unsigned char lba0; /* LBA 7:0. */ |
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| 82 | unsigned char lba1; /* LBA 15:8. */ |
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| 83 | unsigned char lba2; /* LBA 23:16. */ |
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| 84 | unsigned char res1; /* Reserved. */ |
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| 85 | |
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| 86 | /* Word 3. */ |
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| 87 | unsigned char lba3; /* LBA 31:24. */ |
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| 88 | unsigned char lba4; /* LBA 39:32. */ |
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| 89 | unsigned char lba5; /* LBA 47:40. */ |
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| 90 | unsigned char res2; /* Reserved. */ |
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| 91 | |
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| 92 | /* Word 4. */ |
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| 93 | uint32_t res3; /* Reserved. */ |
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| 94 | } |
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| 95 | hba_cmd_header_t; |
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| 96 | |
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| 97 | typedef struct hba_cmd_buffer_s |
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| 98 | { |
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| 99 | uint32_t dba; /* 32 LSB buffer base address. */ |
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| 100 | uint32_t dbau; /* 32 MSB buffer base address. */ |
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| 101 | uint32_t res; /* Reserved. */ |
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| 102 | uint32_t dbc; /* Buffer bytes count. */ |
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| 103 | } |
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| 104 | hba_cmd_buffer_t; |
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| 105 | |
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| 106 | typedef struct hba_cmd_table_s |
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| 107 | { |
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| 108 | hba_cmd_header_t header; |
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| 109 | hba_cmd_buffer_t buffer; |
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| 110 | } |
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| 111 | hba_cmd_table_t; |
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| 112 | |
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| 113 | /**************************************************************************** |
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| 114 | * Driver API functions. * |
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| 115 | ****************************************************************************/ |
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| 116 | |
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| 117 | /**************************************************************************** |
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| 118 | * This function initializes the HBA hardware registers and Command List. * |
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| 119 | * @ returns 0 on success, -1 on error. * |
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| 120 | ****************************************************************************/ |
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[474] | 121 | int boot_hba_init( void ); |
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[439] | 122 | |
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| 123 | /**************************************************************************** |
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| 124 | * This function registers a command in the Command List and Command Table. * |
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| 125 | * @ lba : LBA of the first block on the block device. * |
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| 126 | * @ buff_addr : memory buffer physical address. * |
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| 127 | * @ count : number of blocks to be transfered. * |
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| 128 | * @ returns 0 on success, -1 on error. * |
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| 129 | ****************************************************************************/ |
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| 130 | int boot_hba_access( uint32_t lba, |
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| 131 | uint64_t buf_paddr, |
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| 132 | uint32_t count ); |
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| 133 | |
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| 134 | #endif // BOOT_HBA_DRIVER_H |
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