1 | /////////////////////////////////////////////////////////////////////////////////// |
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2 | // File : spi_driver.c |
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3 | // Date : 31/08/2012 |
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4 | // Author : cesar fuguet |
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5 | // Copyright (c) UPMC-LIP6 |
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6 | /////////////////////////////////////////////////////////////////////////////////// |
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7 | |
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8 | #include <boot_spi_utils.h> |
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9 | #include <boot_utils.h> |
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10 | /////////////////////////////////////////////////////////////////////////////// |
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11 | // bswap32() |
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12 | // This function makes a byte swap for a 4 bytes word |
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13 | // Arguments are: |
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14 | // - x : word |
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15 | // Returns the word x swapped |
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16 | /////////////////////////////////////////////////////////////////////////////// |
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17 | static unsigned int bswap32(unsigned int x) |
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18 | { |
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19 | unsigned int y; |
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20 | y = (x & 0x000000ff) << 24; |
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21 | y |= (x & 0x0000ff00) << 8; |
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22 | y |= (x & 0x00ff0000) >> 8; |
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23 | y |= (x & 0xff000000) >> 24; |
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24 | return y; |
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25 | } |
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26 | |
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27 | /////////////////////////////////////////////////////////////////////////////// |
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28 | // _spi_wait_if_busy() |
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29 | // This function returns when the SPI controller has finished a transfer |
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30 | // Arguments are: |
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31 | // - spi : initialized pointer to the SPI controller |
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32 | /////////////////////////////////////////////////////////////////////////////// |
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33 | static void _spi_wait_if_busy(struct boot_spi_dev * spi) |
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34 | { |
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35 | register int delay; |
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36 | volatile resp; |
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37 | |
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38 | while(resp = SPI_IS_BUSY(spi)) |
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39 | { |
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40 | for (delay = 0; delay < 100; delay++); |
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41 | } |
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42 | } |
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43 | |
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44 | /////////////////////////////////////////////////////////////////////////////// |
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45 | // _spi_init_transfer() |
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46 | // This function trigger transfer of the tx registers to the selected slaves |
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47 | // Arguments are: |
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48 | // - spi : initialized pointer to the SPI controller |
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49 | /////////////////////////////////////////////////////////////////////////////// |
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50 | static void _spi_init_transfer(struct boot_spi_dev * spi) |
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51 | { |
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52 | unsigned int spi_ctrl = ioread32(&spi->ctrl); |
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53 | |
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54 | iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); |
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55 | } |
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56 | |
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57 | /////////////////////////////////////////////////////////////////////////////// |
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58 | // _spi_calc_divider_value() |
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59 | // This function computes the value for the divider register in order to obtain |
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60 | // the SPI desired clock frequency |
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61 | // - spi_freq : desired frequency for the generated clock from the SPI |
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62 | // controller |
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63 | // - sys_freq : system clock frequency |
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64 | // Returns the computed frequency |
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65 | /////////////////////////////////////////////////////////////////////////////// |
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66 | static unsigned int _spi_calc_divider_value( unsigned int spi_freq , |
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67 | unsigned int sys_freq ) |
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68 | { |
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69 | return ((sys_freq / (spi_freq * 2)) - 1); |
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70 | } |
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71 | |
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72 | /////////////////////////////////////////////////////////////////////////////// |
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73 | // spi_put_tx() |
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74 | // This function writes a byte on the tx register and trigger transfert |
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75 | // - spi : initialized pointer to the SPI controller |
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76 | // - byte : byte to write on tx register |
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77 | // - index: index of the tx register |
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78 | /////////////////////////////////////////////////////////////////////////////// |
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79 | void spi_put_tx(struct boot_spi_dev * spi, unsigned char byte, int index) |
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80 | { |
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81 | _spi_wait_if_busy(spi); |
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82 | { |
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83 | iowrite8(&spi->rx_tx[index % 4], byte); |
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84 | _spi_init_transfer(spi); |
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85 | } |
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86 | _spi_wait_if_busy(spi); |
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87 | } |
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88 | |
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89 | /////////////////////////////////////////////////////////////////////////////// |
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90 | // spi_get_rx() |
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91 | // This function reads a byte on the rx register |
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92 | // - spi : initialized pointer to the SPI controller |
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93 | // - index: index of the rx register |
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94 | // Returns the byte read |
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95 | /////////////////////////////////////////////////////////////////////////////// |
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96 | volatile unsigned char spi_get_rx(struct boot_spi_dev * spi, int index) |
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97 | { |
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98 | return ioread8(&spi->rx_tx[index % 4]); |
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99 | } |
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100 | |
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101 | /////////////////////////////////////////////////////////////////////////////// |
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102 | // spi_get_data() |
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103 | // This function reads count bytes and store them on a memory buffer |
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104 | // - spi : initialized pointer to the SPI controller |
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105 | // - buffer: physical address of the buffer containing the read data |
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106 | // - count : number of bytes to get (must be 512 bytes) |
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107 | // Returns 0 if success and other value when failure |
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108 | /////////////////////////////////////////////////////////////////////////////// |
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109 | unsigned int spi_get_data( struct boot_spi_dev * spi, |
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110 | paddr_t buffer , |
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111 | unsigned int count ) |
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112 | { |
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113 | unsigned int spi_ctrl0; // ctrl value before calling this function |
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114 | unsigned int spi_ctrl; |
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115 | int i; |
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116 | |
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117 | /* |
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118 | * Only reading of one block (512 bytes) are supported |
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119 | */ |
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120 | if ( count != 512 ) return 1; |
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121 | |
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122 | _spi_wait_if_busy(spi); |
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123 | |
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124 | spi_ctrl0 = ioread32(&spi->ctrl); |
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125 | |
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126 | #if 0 |
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127 | /* |
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128 | * Read data using SPI DMA mechanism |
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129 | * Two restrictions: |
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130 | * 1. Can transfer only one block (512 bytes). |
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131 | * 2. The destination buffer must be aligned to SPI burst size (64 bytes) |
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132 | */ |
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133 | if ((buffer & 0x3f) == 0) |
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134 | { |
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135 | _puts("spi_get_data(): Starting DMA transfer / count = "); |
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136 | _putx(count); |
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137 | _puts("\n"); |
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138 | |
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139 | _puts("spi_get_data(): buffer = "); |
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140 | _putx(buffer); |
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141 | _puts("\n"); |
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142 | |
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143 | spi->dma_base = (buffer ) & ((1 << 32) - 1); // 32 lsb |
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144 | spi->dma_baseh = (buffer >> 32) & ((1 << 8 ) - 1); // 8 msb |
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145 | spi->dma_count = count | SPI_DMA_COUNT_READ; |
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146 | |
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147 | while ( (spi->dma_count >> 1) ); |
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148 | |
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149 | goto reset_ctrl; |
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150 | } |
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151 | #endif |
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152 | |
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153 | /* |
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154 | * Read data without SPI DMA mechanism |
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155 | * |
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156 | * Switch to 128 bits words |
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157 | */ |
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158 | |
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159 | spi_ctrl = (spi_ctrl0 & ~SPI_CTRL_CHAR_LEN_MASK) | 128; |
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160 | iowrite32(&spi->ctrl, spi_ctrl); |
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161 | |
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162 | /* |
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163 | * Read data. |
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164 | * Four 32 bits words at each iteration (128 bits = 16 bytes) |
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165 | */ |
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166 | for (i = 0; i < count/16; i++) |
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167 | { |
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168 | iowrite32(&spi->rx_tx[0], 0xffffffff); |
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169 | iowrite32(&spi->rx_tx[1], 0xffffffff); |
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170 | iowrite32(&spi->rx_tx[2], 0xffffffff); |
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171 | iowrite32(&spi->rx_tx[3], 0xffffffff); |
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172 | iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); |
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173 | |
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174 | _spi_wait_if_busy(spi); |
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175 | |
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176 | boot_remote_sw( buffer, bswap32(ioread32(&spi->rx_tx[3])) ); |
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177 | buffer += 4; |
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178 | boot_remote_sw( buffer, bswap32(ioread32(&spi->rx_tx[2])) ); |
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179 | buffer += 4; |
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180 | boot_remote_sw( buffer, bswap32(ioread32(&spi->rx_tx[1])) ); |
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181 | buffer += 4; |
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182 | boot_remote_sw( buffer, bswap32(ioread32(&spi->rx_tx[0])) ); |
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183 | buffer += 4; |
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184 | } |
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185 | |
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186 | #if 0 |
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187 | reset_ctrl: |
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188 | #endif |
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189 | |
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190 | /* Switch back to original word size */ |
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191 | iowrite32(&spi->ctrl, spi_ctrl0); |
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192 | |
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193 | return 0; |
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194 | } |
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195 | |
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196 | /////////////////////////////////////////////////////////////////////////////// |
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197 | // spi_ss_assert() |
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198 | // This function enables a SPI slave |
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199 | // - spi : initialized pointer to the SPI controller |
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200 | // - index : slave index |
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201 | /////////////////////////////////////////////////////////////////////////////// |
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202 | void spi_ss_assert(struct boot_spi_dev * spi, int index) |
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203 | { |
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204 | unsigned int spi_ss = ioread32(&spi->ss); |
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205 | |
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206 | iowrite32(&spi->ss, spi_ss | (1 << index)); |
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207 | } |
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208 | |
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209 | /////////////////////////////////////////////////////////////////////////////// |
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210 | // spi_ss_deassert() |
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211 | // This function disables a SPI slave |
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212 | // - spi : initialized pointer to the SPI controller |
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213 | // - index : slave index |
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214 | /////////////////////////////////////////////////////////////////////////////// |
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215 | void spi_ss_deassert(struct boot_spi_dev * spi, int index) |
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216 | { |
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217 | unsigned int spi_ss = ioread32(&spi->ss); |
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218 | |
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219 | iowrite32(&spi->ss, spi_ss & ~(1 << index)); |
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220 | } |
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221 | |
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222 | /////////////////////////////////////////////////////////////////////////////// |
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223 | // _spi_init() |
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224 | // This function initializes the configuration register of SPI controller |
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225 | // - spi : initialized pointer to the SPI controller |
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226 | // - spi_freq : SPI desired frequency (Hz) |
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227 | // - sys_freq : system frequency (Hz) |
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228 | // - char_len : bits per transfer |
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229 | // - tx_edge : if 1, transfer on positive edge |
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230 | // - rx_edge : if 1, latch received data on negative edge |
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231 | /////////////////////////////////////////////////////////////////////////////// |
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232 | void _spi_init ( struct boot_spi_dev * spi, |
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233 | int spi_freq , |
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234 | int sys_freq , |
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235 | int char_len , |
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236 | int tx_edge , |
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237 | int rx_edge ) |
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238 | { |
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239 | unsigned int spi_ctrl = ioread32(&spi->ctrl); |
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240 | |
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241 | if ( tx_edge == 0 ) spi_ctrl |= SPI_CTRL_TXN_EN; |
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242 | else if ( tx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_TXN_EN; |
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243 | if ( rx_edge == 0 ) spi_ctrl |= SPI_CTRL_RXN_EN; |
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244 | else if ( rx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_RXN_EN; |
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245 | if ( char_len > 0 ) spi_ctrl = (spi_ctrl & ~SPI_CTRL_CHAR_LEN_MASK) | |
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246 | (char_len & SPI_CTRL_CHAR_LEN_MASK); |
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247 | |
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248 | iowrite32(&spi->ctrl, spi_ctrl); |
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249 | |
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250 | if (spi_freq > 0 && sys_freq > 0) |
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251 | iowrite32(&spi->divider, _spi_calc_divider_value(spi_freq, sys_freq)); |
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252 | } |
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253 | |
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254 | |
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255 | // Local Variables: |
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256 | // tab-width: 4 |
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257 | // c-basic-offset: 4 |
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258 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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259 | // indent-tabs-mode: nil |
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260 | // End: |
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261 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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