| [1] | 1 | /* |
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| 2 | * __cpu_kentry.S - unified kernel entry point |
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| 3 | * |
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| 4 | * Author Ghassan Almaless (2007,2008,2009,2010,2011,2012) |
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| 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-kernel. |
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| 9 | * |
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| 10 | * ALMOS-kernel is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-kernel is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-kernel; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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| 24 | #include <cpu-regs.h> |
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| 25 | #define _ALMOS_ASM_ |
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| 26 | #include <boot-info.h> |
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| 27 | |
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| 28 | #--------------------------------------------------------------------------------- |
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| 29 | # This file defines the unique kernel entry point in case of |
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| 30 | # Exception / Interrupt/Syscall for a MIPS32 processor core. |
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| 31 | # The base address of the segment containing this code TODO [AG] |
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| 32 | #--------------------------------------------------------------------------------- |
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| 33 | |
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| 34 | .section .kentry,"ax",@progbits |
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| 35 | .extern cpu_do_interrupt |
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| 36 | .extern cpu_do_exception |
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| 37 | .extern cpu_do_syscall |
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| 38 | .extern cpu_kentry |
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| 39 | .extern cpu_kexit |
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| 40 | .org 0x180 |
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| 41 | .ent kentry |
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| 42 | .global kentry |
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| 43 | .global kentry_load |
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| 44 | .set noat |
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| 45 | .set noreorder |
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| 46 | |
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| 47 | #define SAVE_SIZE REGS_NR*4 |
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| 48 | |
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| 49 | #FIXME: PROC_WIDTH support only 4 proc clusters! |
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| 50 | |
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| 51 | #define PROC_WIDTH 2 |
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| 52 | #define XY_WIDTH 8 |
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| 53 | #define XY_MASK 0xFF |
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| 54 | #define MMU_MD_MASK 0xF |
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| 55 | |
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| 56 | #------------------------------------------------------------------------------- |
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| 57 | # Kernel Entry point |
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| 58 | #------------------------------------------------------------------------------- |
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| 59 | kentry: |
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| 60 | mfc0 $26, $12 # read SR |
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| 61 | andi $26, $26, 0x10 # KSU bitmask |
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| 62 | beq $26, $0, KERNEL_MODE |
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| 63 | ori $26, $0, 0x3 # MMU OFF value |
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| 64 | |
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| 65 | |
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| 66 | LOAD_KERNEL_STACK: |
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| 67 | mtc2 $26, $1 # set MMU OFF |
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| 68 | nop |
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| 69 | mfc0 $26, $4, # read current thread pointer ($26) |
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| 70 | sw $27, (TLS_K1*4)($26) # save user value |
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| 71 | |
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| 72 | #$27 register can now be used |
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| 73 | sw $29, (SP*4)($26) # save user stack |
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| 74 | lw $29, (KSP*4)($26) # read kernel stack |
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| 75 | |
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| 76 | ori $27, $0, 0xF # MMU old value: assumed ON |
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| 77 | sw $27, (MMU_MD*4)($26) # save MMU MODE |
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| 78 | |
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| 79 | j UNIFIED_MODE |
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| 80 | or $27, $0, $26 # pointer to uzone ($27) |
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| 81 | |
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| 82 | #Use only $26 to save two values: MMU_MODE (4 bits) and XY_DATA_EXT (8bits) |
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| 83 | #$26 content (in hex): 0x00000MXY (M is the value of MMU_MODE and XY is ...) |
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| 84 | #N.B: MMU MODE is also modified by cpu_do_exception |
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| 85 | |
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| 86 | KERNEL_MODE: |
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| 87 | #get old PADDR_EXT (in $26 at bits 0-7) |
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| 88 | and $26, $26, $0 # $26 <= 0x00000000 |
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| 89 | mfc2 $26, $24 # $26 <= 0x??????XY |
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| 90 | andi $26, $26, XY_MASK # $26 <= 0x000000XY |
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| 91 | #set PADDR_EXT to point to local mem |
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| 92 | mfc0 $27, $15, 1 # read ebase |
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| 93 | andi $27, $27, 0xFFF # extract arch cpu id |
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| 94 | srl $27, $27, PROC_WIDTH # extract cluster xy |
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| 95 | mtc2 $27, $24 # set XY PADDR_EXT |
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| 96 | |
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| 97 | #get old MMU MODE (in $26 at bits 8-11) |
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| 98 | mfc2 $27, $1 # get MMU MODE old value |
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| 99 | andi $27, $27, MMU_MD_MASK # $27 <= 0x0000000M |
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| 100 | sll $27, $27, XY_WIDTH # $27 <= 0x00000M00 |
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| 101 | or $26, $26, $27 # $26 <= 0x00000MXY <= (0x000000XY or 0x00000M00) |
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| 102 | #set MMU OFF |
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| 103 | ori $27, $0, 0x3 # MMU OFF value |
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| 104 | mtc2 $27, $1 # set MMU OFF |
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| 105 | |
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| 106 | #save old stack, MMU_MODE and PADDR_EXT |
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| 107 | addiu $27, $29, -(SAVE_SIZE) # allocate a region on stack ($27) |
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| 108 | sw $29, (SP*4)($27) # save old stack ($29 can be used) |
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| 109 | |
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| 110 | srl $29, $26, XY_WIDTH # $29 <= 0x0000000M |
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| 111 | sw $29, (MMU_MD*4)($27) # save MMU MODE |
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| 112 | andi $26, $26, XY_MASK # $26 <= 0x000000XY |
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| 113 | sw $26, (DP_EXT*4)($27) # save old DATA PADDR EXT (0x000000XY) |
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| 114 | |
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| 115 | or $29, $27, $0 # set new stack |
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| 116 | mfc0 $26, $4, 2 # $26 <= this thread pointer |
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| 117 | |
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| 118 | # $27: zone for saving the cpu registers |
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| 119 | # $26: current thread pointer ($this) |
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| 120 | # $29: kstack |
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| 121 | |
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| 122 | UNIFIED_MODE: |
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| 123 | sw $1, (AT*4)($27) |
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| 124 | sw $2, (V0*4)($27) |
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| 125 | sw $3, (V1*4)($27) |
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| 126 | sw $4, (A0*4)($27) |
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| 127 | sw $5, (A1*4)($27) |
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| 128 | sw $6, (A2*4)($27) |
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| 129 | sw $7, (A3*4)($27) |
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| 130 | sw $8, (T0*4)($27) |
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| 131 | sw $9, (T1*4)($27) |
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| 132 | sw $10, (T2*4)($27) |
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| 133 | sw $11, (T3*4)($27) |
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| 134 | sw $12, (T4*4)($27) |
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| 135 | sw $13, (T5*4)($27) |
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| 136 | sw $14, (T6*4)($27) |
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| 137 | sw $15, (T7*4)($27) |
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| 138 | sw $24, (T8*4)($27) |
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| 139 | sw $25, (T9*4)($27) |
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| 140 | sw $16, (S0*4)($27) |
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| 141 | sw $17, (S1*4)($27) |
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| 142 | sw $18, (S2*4)($27) |
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| 143 | sw $19, (S3*4)($27) |
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| 144 | sw $20, (S4*4)($27) |
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| 145 | sw $21, (S5*4)($27) |
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| 146 | sw $22, (S6*4)($27) |
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| 147 | sw $23, (S7*4)($27) |
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| 148 | sw $30, (S8*4)($27) |
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| 149 | sw $28, (GP*4)($27) |
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| 150 | sw $31, (RA*4)($27) # save RA |
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| 151 | |
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| 152 | mfc0 $16, $14 # Read EPC |
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| 153 | sw $16, (EPC*4)($27) # Save EPC |
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| 154 | mflo $14 # read LO |
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| 155 | sw $14, (LO*4)($27) # save LO |
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| 156 | mfhi $15 # read HI |
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| 157 | sw $15, (HI*4)($27) # save HI |
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| 158 | |
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| 159 | mfc0 $18, $12 # Read current SR |
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| 160 | sw $18, (SR*4)($27) # Save SR |
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| 161 | srl $3, $18, 5 # put SR in kernel mode, IRQ disabled, clear exl |
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| 162 | sll $3, $3, 5 # ... |
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| 163 | mtc0 $3, $12 # Set new SR |
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| 164 | |
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| 165 | mfc0 $17, $13 # read CR |
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| 166 | sw $17, (CR*4)($27) # Save CR |
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| 167 | andi $1, $17, 0x3F # $1 <= XCODE from CP0_CR |
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| 168 | |
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| 169 | #if CPU_IN_KERNEL |
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| 170 | # First signal that we are entering the kernel |
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| 171 | mfc0 $4, $15, 1 # $4 <= cpu_id |
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| 172 | andi $4, $4, 0x3 # mask all but CPU_local_id |
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| 173 | mfc0 $5, $4, 2 # read current thread pointer |
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| 174 | jal cpu_kentry |
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| 175 | addiu $29, $29, -8 |
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| 176 | addiu $29, $29, 8 |
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| 177 | #endif |
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| 178 | |
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| 179 | # Second, depending on XCODE, call the apropriate function |
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| 180 | ori $8, $0, 0x20 # cause syscall |
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| 181 | beq $8, $1, cause_sys |
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| 182 | or $19, $0, $27 # for kentry_exit |
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| 183 | mfc0 $5, $15, 1 |
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| 184 | andi $5, $5, 0x1FF # $5 (arg1) <= CPU(X,Y,lid) |
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| 185 | or $4, $0, $26 # $4 (arg0) <= this thread |
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| 186 | beq $1, $0, cause_int |
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| 187 | or $6, $0, $27 # $6 (arg2) <= regs_tbl |
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| 188 | |
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| 189 | # Exceptions Handler |
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| 190 | # --------------------------------------------- |
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| 191 | la $1, cpu_do_exception |
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| 192 | jalr $1 |
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| 193 | addiu $29, $29, -3*4 |
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| 194 | j kentry_exit |
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| 195 | addiu $29, $29, 3*4 |
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| 196 | |
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| 197 | # System Call Handler |
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| 198 | # ------------------------------------------------ |
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| 199 | cause_sys: |
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| 200 | la $14, cpu_do_syscall |
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| 201 | addiu $29, $29, -4 |
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| 202 | jalr $14 |
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| 203 | or $4, $0, $27 |
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| 204 | j kentry_exit |
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| 205 | or $19, $0, $2 |
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| 206 | |
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| 207 | # Interrupts Handler |
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| 208 | # ---------------------------------------------- |
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| 209 | cause_int: |
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| 210 | la $1, cpu_do_interrupt |
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| 211 | srl $7, $17, 10 # extract IP state, 4th arg |
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| 212 | addiu $29, $29, -4*4 # cpu_interrupt has 4 arg |
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| 213 | jal $1 |
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| 214 | andi $7, $7, 0x3F # 6 HW IRQ LINES, 2th arg is irq_state |
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| 215 | |
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| 216 | # Kentry exit |
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| 217 | # ---------------------------------------------- |
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| 218 | kentry_exit: |
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| 219 | #if CPU_IN_KERNEL |
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| 220 | # First signal that we are exiting from the kernel |
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| 221 | mfc0 $4, $15, 1 # arg is cpu_id |
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| 222 | andi $4, $4, 0x3 # mask all but CPU_local_id |
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| 223 | mfc0 $5, $4, 2 # read current thread pointer |
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| 224 | jal cpu_kexit |
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| 225 | addiu $29, $29, -8 |
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| 226 | addiu $29, $29, 8 |
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| 227 | #endif |
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| 228 | # Then load context ... |
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| 229 | or $27, $0, $19 |
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| 230 | lw $1, (AT*4)($27) |
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| 231 | lw $2, (V0*4)($27) |
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| 232 | lw $3, (V1*4)($27) |
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| 233 | lw $4, (A0*4)($27) |
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| 234 | lw $5, (A1*4)($27) |
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| 235 | lw $6, (A2*4)($27) |
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| 236 | lw $7, (A3*4)($27) |
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| 237 | lw $8, (T0*4)($27) |
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| 238 | lw $9, (T1*4)($27) |
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| 239 | lw $10, (T2*4)($27) |
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| 240 | lw $11, (T3*4)($27) |
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| 241 | lw $12, (T4*4)($27) |
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| 242 | lw $13, (T5*4)($27) |
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| 243 | lw $14, (T6*4)($27) |
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| 244 | lw $15, (T7*4)($27) |
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| 245 | lw $24, (T8*4)($27) |
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| 246 | lw $25, (T9*4)($27) |
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| 247 | lw $18, (S2*4)($27) |
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| 248 | lw $19, (S3*4)($27) |
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| 249 | lw $20, (S4*4)($27) |
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| 250 | lw $21, (S5*4)($27) |
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| 251 | lw $22, (S6*4)($27) |
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| 252 | lw $23, (S7*4)($27) |
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| 253 | lw $30, (S8*4)($27) |
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| 254 | lw $28, (GP*4)($27) |
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| 255 | lw $31, (RA*4)($27) |
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| 256 | lw $16, (EPC*4)($27) # load EPC |
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| 257 | lw $29, (SP*4)($27) # restore SP |
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| 258 | lw $17, (SR*4)($27) # load SR |
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| 259 | mfc0 $26, $12 # Read current SR |
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| 260 | andi $17, $17, 0x1F |
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| 261 | mtc0 $16, $14 # restore EPC |
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| 262 | or $26, $26, $17 |
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| 263 | lw $16, (LO*4)($27) # load LO |
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| 264 | mtc0 $26, $12 # setup new SR |
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| 265 | lw $17, (HI*4)($27) # load HI |
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| 266 | mtlo $16 # restore LO |
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| 267 | mthi $17 # restore HI |
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| 268 | |
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| 269 | lw $16, (S0*4)($27) |
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| 270 | lw $17, (S1*4)($27) |
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| 271 | |
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| 272 | #TODO: optimize |
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| 273 | lw $26, (MMU_MD*4)($27) # load MMU MODE |
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| 274 | andi $26, $26, 0xc |
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| 275 | beq $26, $0, OUT_MMU_3 # both MSB are 0 (the first two LSB are always set) |
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| 276 | andi $26, $26, 0x8 |
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| 277 | beq $26, $0, OUT_MMU_7 # first MSB is 0 (bit 2 is set) |
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| 278 | lw $26, (DP_EXT*4)($27) # load DP_EXT |
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| 279 | |
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| 280 | # Possible value for MMU: |
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| 281 | #In kernel mode : 0x7/0x3 |
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| 282 | #In user mode : 0xF |
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| 283 | |
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| 284 | # DP_EXT can either be local or remote |
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| 285 | #Once these register set we can no longer |
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| 286 | #access global data |
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| 287 | |
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| 288 | #If MMU mode was 0xF |
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| 289 | lw $27, (TLS_K1*4)($27) |
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| 290 | mtc2 $26, $24 # restore DP EXT |
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| 291 | ori $26, $0, 0xF # MMU 0xF value |
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| 292 | mtc2 $26, $1 # set MMU MODE |
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| 293 | j OUT_KENTRY |
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| 294 | nop |
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| 295 | |
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| 296 | OUT_MMU_7: |
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| 297 | #If MMU mode was 0x7 (uspace) |
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| 298 | lw $27, (TLS_K1*4)($27) |
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| 299 | mtc2 $26, $24 # restore DP EXT |
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| 300 | ori $26, $0, 0x7 # MMU 0x7 value |
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| 301 | mtc2 $26, $1 # set MMU MODE |
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| 302 | j OUT_KENTRY |
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| 303 | nop |
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| 304 | |
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| 305 | OUT_MMU_3: |
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| 306 | #If MMU mode was 0x3 |
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| 307 | lw $26, (DP_EXT*4)($27) # load DP_EXT |
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| 308 | lw $27, (TLS_K1*4)($27) |
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| 309 | mtc2 $26, $24 # restore DP EXT |
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| 310 | ori $26, $0, 0x3 # MMU 0x3 value |
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| 311 | mtc2 $26, $1 # set MMU MODE |
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| 312 | nop |
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| 313 | |
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| 314 | OUT_KENTRY: |
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| 315 | nop |
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| 316 | eret |
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| 317 | |
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| 318 | |
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| 319 | .end kentry |
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| 320 | .set reorder |
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| 321 | .set at |
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| 322 | |
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| 323 | .ent kentry_load |
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| 324 | kentry_load: |
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| 325 | #theses nops are required to load the eret instruction |
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| 326 | #while we are in virtual mode (processor pipeline) ? |
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| 327 | mtc2 $26, $1 # set MMU MODE |
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| 328 | nop |
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| 329 | nop |
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| 330 | eret |
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| 331 | .end kentry_load |
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| 332 | |
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| 333 | #------------------------------------------------------------------------------- |
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| 334 | |
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