[1] | 1 | /* |
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| 2 | * hal_atomic.c - implementation of Generic Atomic Operations API for TSAR-MIPS32 |
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| 3 | * |
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| 4 | * Author Alain Greiner (2016) |
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| 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH.. |
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| 9 | * |
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| 10 | * ALMOS-MKH. is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH. is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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[457] | 24 | #include <hal_kernel_types.h> |
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[505] | 25 | #include <hal_atomic.h> |
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[1] | 26 | |
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| 27 | //////////////////////////////////// |
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| 28 | void hal_atomic_and( uint32_t * ptr, |
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[505] | 29 | uint32_t val ) |
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[1] | 30 | { |
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| 31 | asm volatile ( |
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| 32 | ".set noreorder \n" |
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| 33 | "1: \n" |
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| 34 | "ll $3, (%0) \n" |
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| 35 | "and $3, $3, %1 \n" |
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| 36 | "sc $3, (%0) \n" |
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| 37 | "beq $3, $0, 1b \n" |
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| 38 | "nop \n" |
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| 39 | "sync \n" |
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[8] | 40 | ".set reorder \n" |
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[1] | 41 | : : "r" (ptr), "r" (val) : "$3" , "memory" ); |
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| 42 | } |
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| 43 | |
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| 44 | /////////////////////////////////// |
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| 45 | void hal_atomic_or( uint32_t * ptr, |
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[505] | 46 | uint32_t val ) |
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[1] | 47 | { |
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| 48 | asm volatile ( |
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| 49 | ".set noreorder \n" |
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| 50 | "1: \n" |
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| 51 | "ll $3, (%0) \n" |
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| 52 | "or $3, $3, %1 \n" |
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| 53 | "sc $3, (%0) \n" |
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| 54 | "beq $3, $0, 1b \n" |
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| 55 | "nop \n" |
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| 56 | "sync \n" |
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[8] | 57 | ".set reorder \n" |
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[1] | 58 | : : "r" (ptr), "r" (val) : "$3" , "memory" ); |
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| 59 | } |
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| 60 | |
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| 61 | /////////////////////////////////////// |
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[505] | 62 | int32_t hal_atomic_add( void * ptr, |
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| 63 | int32_t val ) |
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[1] | 64 | { |
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| 65 | int32_t current; |
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| 66 | |
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| 67 | asm volatile ( |
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| 68 | ".set noreorder \n" |
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| 69 | "1: \n" |
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| 70 | "ll %0, (%1) \n" |
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| 71 | "addu $3, %0, %2 \n" |
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| 72 | "sc $3, (%1) \n" |
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| 73 | "beq $3, $0, 1b \n" |
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| 74 | "nop \n" |
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| 75 | "sync \n" |
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[8] | 76 | ".set reorder \n" |
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[1] | 77 | :"=&r"(current) : "r" (ptr), "r" (val) : "$3" , "memory" ); |
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| 78 | |
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| 79 | return current; |
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| 80 | } |
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| 81 | |
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| 82 | ////////////////////////////////////// |
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| 83 | bool_t hal_atomic_cas( uint32_t * ptr, |
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| 84 | uint32_t old, |
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| 85 | uint32_t new ) |
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| 86 | { |
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| 87 | bool_t isAtomic; |
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| 88 | |
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| 89 | asm volatile ( |
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| 90 | ".set noreorder \n" |
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| 91 | "sync \n" |
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| 92 | "or $8, $0, %3 \n" |
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| 93 | "ll $3, (%1) \n" |
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| 94 | "bne $3, %2, 1f \n" |
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| 95 | "li $7, 0 \n" |
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| 96 | "sc $8, (%1) \n" |
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| 97 | "or $7, $8, $0 \n" |
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| 98 | "sync \n" |
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| 99 | ".set reorder \n" |
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| 100 | "1: \n" |
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| 101 | "or %0, $7, $0 \n" |
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| 102 | : "=&r" (isAtomic): "r" (ptr), "r" (old) , "r" (new) : "$3", "$7", "$8"); |
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| 103 | |
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| 104 | return isAtomic; |
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| 105 | } |
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| 106 | |
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| 107 | /////////////////////////////////////////// |
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| 108 | bool_t hal_atomic_test_set( uint32_t * ptr, |
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[505] | 109 | uint32_t val ) |
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[1] | 110 | { |
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| 111 | return hal_atomic_cas( ptr , 0 , val ); |
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| 112 | } |
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| 113 | |
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