[1] | 1 | /* |
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| 2 | * hal_context.c - implementation of Thread Context API for TSAR-MIPS32 |
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| 3 | * |
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[635] | 4 | * Author Alain Greiner (2016,2017,2018,2019) |
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[1] | 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH. |
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| 9 | * |
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| 10 | * ALMOS-MKH.is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH.is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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[457] | 24 | #include <hal_kernel_types.h> |
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[317] | 25 | #include <hal_switch.h> |
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[1] | 26 | #include <memcpy.h> |
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| 27 | #include <thread.h> |
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| 28 | #include <string.h> |
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| 29 | #include <process.h> |
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[8] | 30 | #include <printk.h> |
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[1] | 31 | #include <vmm.h> |
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[635] | 32 | #include <bits.h> |
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[1] | 33 | #include <core.h> |
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| 34 | #include <cluster.h> |
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| 35 | #include <hal_context.h> |
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[406] | 36 | #include <hal_kentry.h> |
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[1] | 37 | |
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[151] | 38 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[635] | 39 | // Define various SR initialisation values for the TSAR-MIPS32 architecture. |
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[151] | 40 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 41 | |
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[408] | 42 | #define SR_USR_MODE 0x0000FF13 |
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| 43 | #define SR_USR_MODE_FPU 0x2000FF13 |
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[432] | 44 | #define SR_SYS_MODE 0x0000FF01 |
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[151] | 45 | |
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| 46 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[635] | 47 | // This structure defines the CPU context for the TSAR-MIPS32 architecture. |
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[407] | 48 | // The following registers are saved/restored at each context switch: |
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| 49 | // - GPR : all, but (zero, k0, k1), plus (hi, lo) |
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| 50 | // - CP0 : c0_th , c0_sr , C0_epc |
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| 51 | // - CP2 : c2_ptpr , C2_mode |
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| 52 | // |
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[406] | 53 | // WARNING : check the two CONFIG_CPU_CTX_SIZE & CONFIG_FPU_CTX_SIZE configuration |
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[635] | 54 | // parameters when modifying this structure. |
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[151] | 55 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 56 | |
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| 57 | typedef struct hal_cpu_context_s |
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| 58 | { |
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[296] | 59 | uint32_t c0_epc; // slot 0 |
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| 60 | uint32_t at_01; // slot 1 |
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| 61 | uint32_t v0_02; // slot 2 |
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| 62 | uint32_t v1_03; // slot 3 |
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| 63 | uint32_t a0_04; // slot 4 |
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| 64 | uint32_t a1_05; // slot 5 |
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| 65 | uint32_t a2_06; // slot 6 |
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| 66 | uint32_t a3_07; // slot 7 |
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| 67 | |
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| 68 | uint32_t t0_08; // slot 8 |
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| 69 | uint32_t t1_09; // slot 9 |
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| 70 | uint32_t t2_10; // slot 10 |
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| 71 | uint32_t t3_11; // slot 11 |
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| 72 | uint32_t t4_12; // slot 12 |
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| 73 | uint32_t t5_13; // slot 13 |
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| 74 | uint32_t t6_14; // slot 14 |
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| 75 | uint32_t t7_15; // slot 15 |
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| 76 | |
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| 77 | uint32_t s0_16; // slot 16 |
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| 78 | uint32_t s1_17; // slot 17 |
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| 79 | uint32_t s2_18; // slot 18 |
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| 80 | uint32_t s3_19; // slot 19 |
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| 81 | uint32_t s4_20; // slot 20 |
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| 82 | uint32_t s5_21; // slot 21 |
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| 83 | uint32_t s6_22; // slot 22 |
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| 84 | uint32_t s7_23; // slot 23 |
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| 85 | |
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| 86 | uint32_t t8_24; // slot 24 |
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[406] | 87 | uint32_t t9_25; // slot 25 |
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[296] | 88 | uint32_t hi_26; // slot 26 |
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| 89 | uint32_t lo_27; // slot 27 |
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| 90 | uint32_t gp_28; // slot 28 |
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| 91 | uint32_t sp_29; // slot 29 |
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[407] | 92 | uint32_t s8_30; // slot 30 |
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[296] | 93 | uint32_t ra_31; // slot 31 |
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| 94 | |
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| 95 | uint32_t c2_ptpr; // slot 32 |
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| 96 | uint32_t c2_mode; // slot 33 |
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| 97 | |
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| 98 | uint32_t c0_sr; // slot 34 |
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| 99 | uint32_t c0_th; // slot 35 |
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[151] | 100 | } |
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| 101 | hal_cpu_context_t; |
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| 102 | |
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| 103 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[635] | 104 | // This structure defines the fpu_context for the TSAR MIPS32 architecture. |
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[151] | 105 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 106 | |
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| 107 | typedef struct hal_fpu_context_s |
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| 108 | { |
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| 109 | uint32_t fpu_regs[32]; |
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| 110 | } |
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| 111 | hal_fpu_context_t; |
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| 112 | |
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[296] | 113 | |
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| 114 | ///////////////////////////////////////////////////////////////////////////////////////// |
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[407] | 115 | // CPU context related functions |
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[296] | 116 | ///////////////////////////////////////////////////////////////////////////////////////// |
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| 117 | |
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[407] | 118 | |
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| 119 | ////////////////////////////////////////////////// |
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| 120 | error_t hal_cpu_context_alloc( thread_t * thread ) |
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[1] | 121 | { |
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[406] | 122 | |
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[679] | 123 | assert( __FUNCTION__, (sizeof(hal_cpu_context_t) <= CONFIG_CPU_CTX_SIZE), "illegal CPU context size" ); |
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| 124 | |
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[1] | 125 | // allocate memory for cpu_context |
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[407] | 126 | kmem_req_t req; |
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[635] | 127 | req.type = KMEM_KCM; |
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| 128 | req.order = bits_log2( sizeof(hal_cpu_context_t) ); |
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[1] | 129 | req.flags = AF_KERNEL | AF_ZERO; |
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| 130 | |
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[635] | 131 | hal_cpu_context_t * context = kmem_alloc( &req ); |
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| 132 | |
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[407] | 133 | if( context == NULL ) return -1; |
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[1] | 134 | |
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[407] | 135 | // link to thread |
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| 136 | thread->cpu_context = (void *)context; |
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| 137 | return 0; |
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[1] | 138 | |
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[407] | 139 | } // end hal_cpu_context_alloc() |
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| 140 | |
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[679] | 141 | ////////////////////////////////////////////////////////////////////////////// |
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| 142 | // The following context slots are initialised for the MIPS32 architecture |
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| 143 | // GPR : a0_04 / a1_05 / sp_29 / ra_31 |
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[407] | 144 | // CP0 : c0_sr / c0_th / c0_epc |
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| 145 | // CP2 : c2_ptpr / c2_mode |
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[679] | 146 | ////////////////////////////////////////////////////////////////////////////// |
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| 147 | void hal_cpu_context_init( thread_t * thread, |
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| 148 | bool_t is_main, |
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| 149 | uint32_t argc, |
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| 150 | intptr_t argv ) |
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[407] | 151 | { |
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[457] | 152 | hal_cpu_context_t * context = (hal_cpu_context_t *)thread->cpu_context; |
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[407] | 153 | |
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[679] | 154 | assert( __FUNCTION__, (context != NULL ), "CPU context not allocated" ); |
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[407] | 155 | |
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[640] | 156 | // compute the PPN for the GPT PT1 |
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| 157 | ppn_t gpt_pt1_ppn = ppm_base2ppn( XPTR( local_cxy , thread->process->vmm.gpt.ptr ) ); |
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| 158 | |
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[407] | 159 | // initialisation depends on thread type |
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[679] | 160 | if( (thread->type == THREAD_USER) && (is_main != 0) ) |
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[1] | 161 | { |
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[679] | 162 | context->a0_04 = (uint32_t)argc; |
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| 163 | context->a1_05 = (uint32_t)argv; |
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| 164 | context->sp_29 = (uint32_t)thread->user_stack_vseg->max - 8; |
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| 165 | context->ra_31 = (uint32_t)&hal_kentry_eret; |
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| 166 | context->c0_epc = (uint32_t)thread->entry_func; |
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| 167 | context->c0_sr = SR_USR_MODE; |
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| 168 | context->c0_th = (uint32_t)thread; |
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| 169 | context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1); |
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| 170 | context->c2_mode = 0xF; |
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| 171 | } |
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| 172 | else if( (thread->type == THREAD_USER) && (is_main == 0) ) |
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| 173 | { |
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[407] | 174 | context->a0_04 = (uint32_t)thread->entry_args; |
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[625] | 175 | context->sp_29 = (uint32_t)thread->user_stack_vseg->max - 8; |
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[407] | 176 | context->ra_31 = (uint32_t)&hal_kentry_eret; |
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| 177 | context->c0_epc = (uint32_t)thread->entry_func; |
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| 178 | context->c0_sr = SR_USR_MODE; |
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| 179 | context->c0_th = (uint32_t)thread; |
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[640] | 180 | context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1); |
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[407] | 181 | context->c2_mode = 0xF; |
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[1] | 182 | } |
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[407] | 183 | else // kernel thread |
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[1] | 184 | { |
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[407] | 185 | context->a0_04 = (uint32_t)thread->entry_args; |
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| 186 | context->sp_29 = (uint32_t)thread->k_stack_base + (uint32_t)thread->k_stack_size - 8; |
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| 187 | context->ra_31 = (uint32_t)thread->entry_func; |
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| 188 | context->c0_sr = SR_SYS_MODE; |
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| 189 | context->c0_th = (uint32_t)thread; |
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[640] | 190 | context->c2_ptpr = (uint32_t)(gpt_pt1_ppn >> 1); |
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[407] | 191 | context->c2_mode = 0x3; |
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[1] | 192 | } |
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[654] | 193 | |
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| 194 | #if DEBUG_HAL_CONTEXT_INIT |
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| 195 | hal_cpu_context_display( XPTR( local_cxy , thread ) ); |
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| 196 | #endif |
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| 197 | |
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[457] | 198 | } // end hal_cpu_context_init() |
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[1] | 199 | |
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[408] | 200 | //////////////////////////////////////////// |
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| 201 | void hal_cpu_context_fork( xptr_t child_xp ) |
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| 202 | { |
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[635] | 203 | cxy_t parent_cxy; // parent thread cluster |
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| 204 | thread_t * parent_ptr; // local pointer on parent thread |
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| 205 | hal_cpu_context_t * parent_context; // local pointer on parent cpu_context |
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| 206 | uint32_t * parent_uzone; // local_pointer on parent uzone (in kernel stack) |
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| 207 | char * parent_ksp; // kernel stack pointer on parent kernel stack |
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| 208 | uint32_t parent_us_base; // parent user stack base value |
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[625] | 209 | |
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[635] | 210 | cxy_t child_cxy; // parent thread cluster |
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| 211 | thread_t * child_ptr; // local pointer on child thread |
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| 212 | hal_cpu_context_t * child_context; // local pointer on child cpu_context |
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| 213 | uint32_t * child_uzone; // local_pointer on child uzone (in kernel stack) |
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| 214 | char * child_ksp; // kernel stack pointer on child kernel stack |
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| 215 | uint32_t child_us_base; // child user stack base value |
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| 216 | |
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| 217 | process_t * child_process; // local pointer on child processs |
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[640] | 218 | void * child_gpt_ptr; // local pointer on child GPT PT1 |
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| 219 | uint32_t child_gpt_ppn; // PPN of child GPT PT1 |
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[635] | 220 | vseg_t * child_us_vseg; // local pointer on child user stack vseg |
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| 221 | |
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[625] | 222 | // allocate a local CPU context in parent kernel stack |
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[635] | 223 | hal_cpu_context_t context; |
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[408] | 224 | |
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[635] | 225 | // get (local) parent thread cluster and local pointer |
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| 226 | parent_cxy = local_cxy; |
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| 227 | parent_ptr = CURRENT_THREAD; |
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[408] | 228 | |
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[635] | 229 | // get (remote) child thread cluster and local pointer |
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| 230 | child_cxy = GET_CXY( child_xp ); |
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| 231 | child_ptr = GET_PTR( child_xp ); |
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[408] | 232 | |
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[635] | 233 | // get local pointer on (local) parent CPU context |
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| 234 | parent_context = parent_ptr->cpu_context; |
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[408] | 235 | |
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[635] | 236 | // get local pointer on (remote) child CPU context |
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| 237 | child_context = hal_remote_lpt( XPTR(child_cxy , &child_ptr->cpu_context) ); |
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| 238 | |
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[408] | 239 | // get local pointer on remote child process |
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[635] | 240 | child_process = hal_remote_lpt( XPTR(child_cxy , &child_ptr->process) ); |
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[408] | 241 | |
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[640] | 242 | // get base and ppn of remote child process GPT PT1 |
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[647] | 243 | child_gpt_ptr = hal_remote_lpt( XPTR(child_cxy , &child_process->vmm.gpt.ptr) ); |
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[640] | 244 | child_gpt_ppn = ppm_base2ppn( XPTR( child_cxy , child_gpt_ptr ) ); |
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[408] | 245 | |
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[635] | 246 | // get local pointer on local parent uzone (in parent kernel stack) |
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| 247 | parent_uzone = parent_ptr->uzone_current; |
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[625] | 248 | |
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[635] | 249 | // compute local pointer on remote child uzone (in child kernel stack) |
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| 250 | child_uzone = (uint32_t *)( (intptr_t)parent_uzone + |
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| 251 | (intptr_t)child_ptr - |
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| 252 | (intptr_t)parent_ptr ); |
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[625] | 253 | |
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| 254 | // update the uzone pointer in child thread descriptor |
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| 255 | hal_remote_spt( XPTR( child_cxy , &child_ptr->uzone_current ) , child_uzone ); |
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| 256 | |
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[654] | 257 | #if DEBUG_HAL_CONTEXT_FORK |
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[625] | 258 | uint32_t cycle = (uint32_t)hal_get_cycles(); |
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[654] | 259 | if( DEBUG_HAL_CONTEXT_FORK < cycle ) |
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[625] | 260 | printk("\n[%s] thread[%x,%x] parent_uzone %x / child_uzone %x / cycle %d\n", |
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[635] | 261 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_uzone, child_uzone, cycle ); |
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[625] | 262 | #endif |
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| 263 | |
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[635] | 264 | // get user stack base for parent thread |
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| 265 | parent_us_base = parent_ptr->user_stack_vseg->min; |
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[625] | 266 | |
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[635] | 267 | // get user stack base for child thread |
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| 268 | child_us_vseg = hal_remote_lpt( XPTR( child_cxy , &child_ptr->user_stack_vseg ) ); |
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| 269 | child_us_base = hal_remote_l32( XPTR( child_cxy , &child_us_vseg->min ) ); |
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[625] | 270 | |
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[654] | 271 | #if DEBUG_HAL_CONTEXT_FORK |
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| 272 | if( DEBUG_HAL_CONTEXT_FORK < cycle ) |
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[635] | 273 | printk("\n[%s] thread[%x,%x] parent_ustack_base %x / child_ustack_base %x\n", |
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| 274 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_us_base, child_us_base ); |
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| 275 | #endif |
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[625] | 276 | |
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[635] | 277 | // get current value of kernel stack pointer in parent kernel stack |
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| 278 | parent_ksp = (char *)hal_get_sp(); |
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| 279 | |
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| 280 | // compute value of kernel stack pointer in child kernel stack |
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| 281 | child_ksp = (char *)((intptr_t)parent_ksp + |
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| 282 | (intptr_t)child_ptr - |
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| 283 | (intptr_t)parent_ptr ); |
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| 284 | |
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[654] | 285 | #if DEBUG_HAL_CONTEXT_FORK |
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| 286 | if( DEBUG_HAL_CONTEXT_FORK < cycle ) |
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[635] | 287 | printk("\n[%s] thread[%x,%x] parent_ksp %x / child_ksp %x\n", |
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| 288 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ksp, child_ksp ); |
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[625] | 289 | #endif |
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| 290 | |
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[635] | 291 | // compute number of bytes to be copied, depending on current value of parent_ksp |
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| 292 | uint32_t size = (uint32_t)parent_ptr + CONFIG_THREAD_DESC_SIZE - (uint32_t)parent_ksp; |
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[625] | 293 | |
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[635] | 294 | // copy parent kernel stack content to child thread descriptor |
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| 295 | // (this includes the uzone, that is allocated in the kernel stack) |
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| 296 | hal_remote_memcpy( XPTR( child_cxy , child_ksp ), |
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| 297 | XPTR( local_cxy , parent_ksp ), |
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| 298 | size ); |
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[625] | 299 | |
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[654] | 300 | #if DEBUG_HAL_CONTEXT_FORK |
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| 301 | if( DEBUG_HAL_CONTEXT_FORK < cycle ) |
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[635] | 302 | printk("\n[%s] thread[%x,%x] copied kstack from parent (%x) to child (%x)\n", |
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| 303 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, parent_ptr, child_ptr ); |
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[625] | 304 | #endif |
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| 305 | |
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[635] | 306 | // save current values of CPU registers to local copy of CPU context |
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[408] | 307 | hal_do_cpu_save( &context ); |
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| 308 | |
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[635] | 309 | // update three slots in this local CPU context |
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| 310 | context.sp_29 = (uint32_t)child_ksp; |
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| 311 | context.c0_th = (uint32_t)child_ptr; |
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[640] | 312 | context.c2_ptpr = (uint32_t)child_gpt_ppn >> 1; |
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[635] | 313 | |
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| 314 | // From this point, both parent and child execute the following code, |
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[625] | 315 | // but child thread will only execute it after being unblocked by parent thread. |
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| 316 | // They can be distinguished by the (CURRENT_THREAD,local_cxy) values, |
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| 317 | // and we must re-initialise the calling thread pointer from c0_th register |
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[408] | 318 | |
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[635] | 319 | thread_t * this = CURRENT_THREAD; |
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[408] | 320 | |
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[625] | 321 | if( (this == parent_ptr) && (local_cxy == parent_cxy) ) // parent thread |
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[408] | 322 | { |
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[635] | 323 | // parent thread must update four slots in child uzone |
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| 324 | // - UZ_TH : parent and child have different threads descriptors |
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| 325 | // - UZ_SP : parent and child have different user stack base addresses. |
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| 326 | // - UZ_PTPR : parent and child use different Generic Page Tables |
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[408] | 327 | |
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[635] | 328 | // parent thread computes values for child thread |
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| 329 | uint32_t child_sp = parent_uzone[UZ_SP] + child_us_base - parent_us_base; |
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| 330 | uint32_t child_th = (uint32_t)child_ptr; |
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[640] | 331 | uint32_t child_ptpr = (uint32_t)child_gpt_ppn >> 1; |
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[635] | 332 | |
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[654] | 333 | #if DEBUG_HAL_CONTEXT_FORK |
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| 334 | if( DEBUG_HAL_CONTEXT_FORK < cycle ) |
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[635] | 335 | printk("\n[%s] thread[%x,%x] : parent_uz_sp %x / child_uz_sp %x\n", |
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| 336 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, |
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| 337 | parent_uzone[UZ_SP], child_sp ); |
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| 338 | #endif |
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| 339 | |
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| 340 | // parent thread updates the child uzone |
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| 341 | hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_SP] ) , child_sp ); |
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| 342 | hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_TH] ) , child_th ); |
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| 343 | hal_remote_s32( XPTR( child_cxy , &child_uzone[UZ_PTPR] ) , child_ptpr ); |
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| 344 | |
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| 345 | // parent thread copies the local context to remote child context |
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| 346 | hal_remote_memcpy( XPTR( child_cxy , child_context ), |
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[408] | 347 | XPTR( local_cxy , &context ) , |
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| 348 | sizeof( hal_cpu_context_t ) ); |
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[654] | 349 | #if DEBUG_HAL_CONTEXT_FORK |
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| 350 | if( DEBUG_HAL_CONTEXT_FORK < cycle ) |
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[635] | 351 | printk("\n[%s] thread[%x,%x] copied parent CPU context to child CPU context\n", |
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| 352 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid ); |
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[625] | 353 | #endif |
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[408] | 354 | |
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[635] | 355 | // parent thread unblocks child thread |
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[625] | 356 | thread_unblock( XPTR( child_cxy , child_ptr ) , THREAD_BLOCKED_GLOBAL ); |
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| 357 | |
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[654] | 358 | #if DEBUG_HAL_CONTEXT_FORK |
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[625] | 359 | cycle = (uint32_t)hal_get_cycles(); |
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[635] | 360 | trdid_t child_trdid = hal_remote_l32( XPTR( child_cxy , &child_ptr->trdid ) ); |
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| 361 | pid_t child_pid = hal_remote_l32( XPTR( child_cxy , &child_process->pid ) ); |
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| 362 | printk("\n[%s] thread[%x,%x] unblocked child thread[%x,%x] / cycle %d\n", |
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| 363 | __FUNCTION__, parent_ptr->process->pid, parent_ptr->trdid, child_pid, child_trdid, cycle ); |
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[625] | 364 | #endif |
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| 365 | |
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[408] | 366 | } |
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[625] | 367 | |
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[408] | 368 | } // end hal_cpu_context_fork() |
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| 369 | |
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[296] | 370 | ///////////////////////////////////////////////// |
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[408] | 371 | void hal_cpu_context_display( xptr_t thread_xp ) |
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[296] | 372 | { |
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[408] | 373 | hal_cpu_context_t * ctx; |
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[296] | 374 | |
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[408] | 375 | // get thread cluster and local pointer |
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| 376 | cxy_t cxy = GET_CXY( thread_xp ); |
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[459] | 377 | thread_t * ptr = GET_PTR( thread_xp ); |
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[408] | 378 | |
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| 379 | // get context pointer |
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| 380 | ctx = (hal_cpu_context_t *)hal_remote_lpt( XPTR( cxy , &ptr->cpu_context ) ); |
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| 381 | |
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| 382 | // get relevant context slots values |
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[570] | 383 | uint32_t sp_29 = hal_remote_l32( XPTR( cxy , &ctx->sp_29 ) ); |
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| 384 | uint32_t ra_31 = hal_remote_l32( XPTR( cxy , &ctx->ra_31 ) ); |
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[679] | 385 | uint32_t a0_04 = hal_remote_l32( XPTR( cxy , &ctx->a0_04 ) ); |
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| 386 | uint32_t a1_05 = hal_remote_l32( XPTR( cxy , &ctx->a1_05 ) ); |
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[570] | 387 | uint32_t c0_sr = hal_remote_l32( XPTR( cxy , &ctx->c0_sr ) ); |
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| 388 | uint32_t c0_epc = hal_remote_l32( XPTR( cxy , &ctx->c0_epc ) ); |
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| 389 | uint32_t c0_th = hal_remote_l32( XPTR( cxy , &ctx->c0_th ) ); |
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| 390 | uint32_t c2_ptpr = hal_remote_l32( XPTR( cxy , &ctx->c2_ptpr ) ); |
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| 391 | uint32_t c2_mode = hal_remote_l32( XPTR( cxy , &ctx->c2_mode ) ); |
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[408] | 392 | |
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[406] | 393 | printk("\n***** CPU context for thread %x in process %x / cycle %d\n" |
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[679] | 394 | " sp_29 = %X ra_31 = %X a0_04 = %X a1_05 = %X\n" |
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| 395 | " c0_sr = %X c0_epc = %X c0_th = %X\n" |
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| 396 | " c2_ptpr = %X c2_mode = %X\n", |
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[432] | 397 | ptr, ptr->process->pid, (uint32_t)hal_get_cycles(), |
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[679] | 398 | sp_29 , ra_31 , a0_04 , a1_05, |
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[408] | 399 | c0_sr , c0_epc , c0_th, |
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| 400 | c2_ptpr , c2_mode ); |
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[296] | 401 | |
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[407] | 402 | } // end hal_cpu_context_display() |
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[317] | 403 | |
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[1] | 404 | ///////////////////////////////////////////////// |
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| 405 | void hal_cpu_context_destroy( thread_t * thread ) |
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| 406 | { |
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[625] | 407 | kmem_req_t req; |
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[1] | 408 | |
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[625] | 409 | hal_cpu_context_t * ctx = thread->cpu_context; |
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[1] | 410 | |
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[625] | 411 | // release CPU context if required |
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| 412 | if( ctx != NULL ) |
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| 413 | { |
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[635] | 414 | req.type = KMEM_KCM; |
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[625] | 415 | req.ptr = ctx; |
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| 416 | kmem_free( &req ); |
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| 417 | } |
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| 418 | |
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[1] | 419 | } // end hal_cpu_context_destroy() |
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| 420 | |
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[317] | 421 | |
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[407] | 422 | |
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| 423 | |
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| 424 | |
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[679] | 425 | |
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| 426 | |
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| 427 | |
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| 428 | |
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[407] | 429 | ////////////////////////////////////////////////// |
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| 430 | error_t hal_fpu_context_alloc( thread_t * thread ) |
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[1] | 431 | { |
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[679] | 432 | assert( __FUNCTION__, (sizeof(hal_fpu_context_t) <= CONFIG_FPU_CTX_SIZE) , |
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[407] | 433 | "illegal CPU context size" ); |
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[406] | 434 | |
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[407] | 435 | // allocate memory for fpu_context |
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| 436 | kmem_req_t req; |
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[635] | 437 | req.type = KMEM_KCM; |
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[1] | 438 | req.flags = AF_KERNEL | AF_ZERO; |
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[635] | 439 | req.order = bits_log2( sizeof(hal_fpu_context_t) ); |
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[1] | 440 | |
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[635] | 441 | hal_fpu_context_t * context = kmem_alloc( &req ); |
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| 442 | |
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[407] | 443 | if( context == NULL ) return -1; |
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[1] | 444 | |
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[407] | 445 | // link to thread |
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| 446 | thread->fpu_context = (void *)context; |
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[1] | 447 | return 0; |
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| 448 | |
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[407] | 449 | } // end hal_fpu_context_alloc() |
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| 450 | |
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[457] | 451 | ////////////////////////////////////////////// |
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| 452 | void hal_fpu_context_init( thread_t * thread ) |
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| 453 | { |
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| 454 | hal_fpu_context_t * context = thread->fpu_context; |
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| 455 | |
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[679] | 456 | assert( __FUNCTION__, (context != NULL) , "fpu context not allocated" ); |
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[457] | 457 | |
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| 458 | memset( context , 0 , sizeof(hal_fpu_context_t) ); |
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| 459 | } |
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| 460 | |
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[407] | 461 | ////////////////////////////////////////// |
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| 462 | void hal_fpu_context_copy( thread_t * dst, |
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| 463 | thread_t * src ) |
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[1] | 464 | { |
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[679] | 465 | assert( __FUNCTION__, (src != NULL) , "src thread pointer is NULL\n"); |
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| 466 | assert( __FUNCTION__, (dst != NULL) , "dst thread pointer is NULL\n"); |
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[1] | 467 | |
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[407] | 468 | // get fpu context pointers |
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[1] | 469 | hal_fpu_context_t * src_context = src->fpu_context; |
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[407] | 470 | hal_fpu_context_t * dst_context = dst->fpu_context; |
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[1] | 471 | |
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| 472 | // copy CPU context from src to dst |
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| 473 | memcpy( dst_context , src_context , sizeof(hal_fpu_context_t) ); |
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| 474 | |
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| 475 | } // end hal_fpu_context_copy() |
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| 476 | |
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| 477 | ///////////////////////////////////////////////// |
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| 478 | void hal_fpu_context_destroy( thread_t * thread ) |
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| 479 | { |
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| 480 | kmem_req_t req; |
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| 481 | |
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[625] | 482 | hal_fpu_context_t * context = thread->fpu_context; |
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[1] | 483 | |
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[625] | 484 | // release FPU context if required |
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| 485 | if( context != NULL ) |
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| 486 | { |
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[635] | 487 | req.type = KMEM_KCM; |
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[625] | 488 | req.ptr = context; |
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| 489 | kmem_free( &req ); |
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| 490 | } |
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| 491 | |
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[1] | 492 | } // end hal_fpu_context_destroy() |
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| 493 | |
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| 494 | ////////////////////////////////////////////// |
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[408] | 495 | void hal_fpu_context_save( xptr_t thread_xp ) |
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[1] | 496 | { |
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[408] | 497 | // allocate a local FPU context in kernel stack |
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[459] | 498 | hal_fpu_context_t src_context; |
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[1] | 499 | |
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[408] | 500 | // get remote child cluster and local pointer |
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| 501 | cxy_t thread_cxy = GET_CXY( thread_xp ); |
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[459] | 502 | thread_t * thread_ptr = GET_PTR( thread_xp ); |
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[408] | 503 | |
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[1] | 504 | asm volatile( |
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| 505 | ".set noreorder \n" |
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| 506 | "swc1 $f0, 0*4(%0) \n" |
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| 507 | "swc1 $f1, 1*4(%0) \n" |
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| 508 | "swc1 $f2, 2*4(%0) \n" |
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| 509 | "swc1 $f3, 3*4(%0) \n" |
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| 510 | "swc1 $f4, 4*4(%0) \n" |
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| 511 | "swc1 $f5, 5*4(%0) \n" |
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| 512 | "swc1 $f6, 6*4(%0) \n" |
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| 513 | "swc1 $f7, 7*4(%0) \n" |
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| 514 | "swc1 $f8, 8*4(%0) \n" |
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| 515 | "swc1 $f9, 9*4(%0) \n" |
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| 516 | "swc1 $f10, 10*4(%0) \n" |
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| 517 | "swc1 $f11, 11*4(%0) \n" |
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| 518 | "swc1 $f12, 12*4(%0) \n" |
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| 519 | "swc1 $f13, 13*4(%0) \n" |
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| 520 | "swc1 $f14, 14*4(%0) \n" |
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| 521 | "swc1 $f15, 15*4(%0) \n" |
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| 522 | "swc1 $f16, 16*4(%0) \n" |
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| 523 | "swc1 $f17, 17*4(%0) \n" |
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| 524 | "swc1 $f18, 18*4(%0) \n" |
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| 525 | "swc1 $f19, 19*4(%0) \n" |
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| 526 | "swc1 $f20, 20*4(%0) \n" |
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| 527 | "swc1 $f21, 21*4(%0) \n" |
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| 528 | "swc1 $f22, 22*4(%0) \n" |
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| 529 | "swc1 $f23, 23*4(%0) \n" |
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| 530 | "swc1 $f24, 24*4(%0) \n" |
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| 531 | "swc1 $f25, 25*4(%0) \n" |
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| 532 | "swc1 $f26, 26*4(%0) \n" |
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| 533 | "swc1 $f27, 27*4(%0) \n" |
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| 534 | "swc1 $f28, 28*4(%0) \n" |
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| 535 | "swc1 $f29, 29*4(%0) \n" |
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| 536 | "swc1 $f30, 30*4(%0) \n" |
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| 537 | "swc1 $f31, 31*4(%0) \n" |
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| 538 | ".set reorder \n" |
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[459] | 539 | : : "r"(&src_context) ); |
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[1] | 540 | |
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[459] | 541 | // get local pointer on target thread FPU context |
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| 542 | void * dst_context = hal_remote_lpt( XPTR( thread_cxy , &thread_ptr->fpu_context ) ); |
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| 543 | |
---|
[408] | 544 | // copy local context to remote child context) |
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[459] | 545 | hal_remote_memcpy( XPTR( thread_cxy , dst_context ), |
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| 546 | XPTR( local_cxy , &src_context ), |
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[408] | 547 | sizeof( hal_fpu_context_t ) ); |
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[1] | 548 | |
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[408] | 549 | } // end hal_fpu_context_save() |
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| 550 | |
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[1] | 551 | ///////////////////////////////////////////////// |
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| 552 | void hal_fpu_context_restore( thread_t * thread ) |
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| 553 | { |
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[459] | 554 | // get pointer on FPU context and cast to uint32_t |
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[1] | 555 | uint32_t ctx = (uint32_t)thread->fpu_context; |
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| 556 | |
---|
| 557 | asm volatile( |
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| 558 | ".set noreorder \n" |
---|
| 559 | "lwc1 $f0, 0*4(%0) \n" |
---|
| 560 | "lwc1 $f1, 1*4(%0) \n" |
---|
| 561 | "lwc1 $f2, 2*4(%0) \n" |
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| 562 | "lwc1 $f3, 3*4(%0) \n" |
---|
| 563 | "lwc1 $f4, 4*4(%0) \n" |
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| 564 | "lwc1 $f5, 5*4(%0) \n" |
---|
| 565 | "lwc1 $f6, 6*4(%0) \n" |
---|
| 566 | "lwc1 $f7, 7*4(%0) \n" |
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| 567 | "lwc1 $f8, 8*4(%0) \n" |
---|
| 568 | "lwc1 $f9, 9*4(%0) \n" |
---|
| 569 | "lwc1 $f10, 10*4(%0) \n" |
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| 570 | "lwc1 $f11, 11*4(%0) \n" |
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| 571 | "lwc1 $f12, 12*4(%0) \n" |
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| 572 | "lwc1 $f13, 13*4(%0) \n" |
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| 573 | "lwc1 $f14, 14*4(%0) \n" |
---|
| 574 | "lwc1 $f15, 15*4(%0) \n" |
---|
| 575 | "lwc1 $f16, 16*4(%0) \n" |
---|
| 576 | "lwc1 $f17, 17*4(%0) \n" |
---|
| 577 | "lwc1 $f18, 18*4(%0) \n" |
---|
| 578 | "lwc1 $f19, 19*4(%0) \n" |
---|
| 579 | "lwc1 $f20, 20*4(%0) \n" |
---|
| 580 | "lwc1 $f21, 21*4(%0) \n" |
---|
| 581 | "lwc1 $f22, 22*4(%0) \n" |
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| 582 | "lwc1 $f23, 23*4(%0) \n" |
---|
| 583 | "lwc1 $f24, 24*4(%0) \n" |
---|
| 584 | "lwc1 $f25, 25*4(%0) \n" |
---|
| 585 | "lwc1 $f26, 26*4(%0) \n" |
---|
| 586 | "lwc1 $f27, 27*4(%0) \n" |
---|
| 587 | "lwc1 $f28, 28*4(%0) \n" |
---|
| 588 | "lwc1 $f29, 29*4(%0) \n" |
---|
| 589 | "lwc1 $f30, 30*4(%0) \n" |
---|
| 590 | "lwc1 $f31, 31*4(%0) \n" |
---|
| 591 | ".set reorder \n" |
---|
| 592 | : : "r"(ctx) ); |
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| 593 | |
---|
| 594 | } // end hal_cpu_context_restore() |
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| 595 | |
---|
| 596 | |
---|