[75] | 1 | /* |
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[279] | 2 | * soclib_mmc.c - soclib L2 cache controller driver implementation. |
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[75] | 3 | * |
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| 4 | * Author Alain Greiner (2016) |
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| 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH.. |
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| 9 | * |
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| 10 | * ALMOS-MKH. is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH. is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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| 24 | |
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[451] | 25 | #include <hal_kernel_types.h> |
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[75] | 26 | #include <chdev.h> |
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| 27 | #include <dev_mmc.h> |
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| 28 | #include <soclib_mmc.h> |
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| 29 | #include <spinlock.h> |
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| 30 | #include <thread.h> |
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| 31 | #include <printk.h> |
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| 32 | |
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| 33 | |
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| 34 | /////////////////////////////////////// |
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| 35 | void soclib_mmc_init( chdev_t * chdev ) |
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| 36 | { |
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| 37 | // get pointer on MMC segment base |
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| 38 | uint32_t * base = (uint32_t *)GET_PTR( chdev->base ); |
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| 39 | |
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[257] | 40 | // set driver specific fields in device descriptor |
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| 41 | chdev->cmd = &soclib_mmc_cmd; |
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| 42 | chdev->isr = &soclib_mmc_isr; |
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| 43 | |
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[75] | 44 | // enable MMC IRQ |
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| 45 | *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_IRQ_ENABLE) = 1; |
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| 46 | } |
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| 47 | |
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| 48 | |
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| 49 | ////////////////////////////////////////////////////////////// |
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| 50 | void __attribute__ ((noinline)) soclib_mmc_cmd( xptr_t th_xp ) |
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| 51 | { |
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| 52 | xptr_t dev_xp; // extended pointer on MMC device |
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| 53 | uint32_t type; // MMC command : type |
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[440] | 54 | void * buf_ptr; // MMC command : buffer pointer |
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[75] | 55 | uint32_t buf_size; // MMC command : buffer size |
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| 56 | uint32_t reg_index; // MMC command : register index in MMC peripheral |
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| 57 | uint32_t * reg_ptr; // MMC command : pointer on dst/src buffer in client cluster |
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| 58 | |
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| 59 | // get client thread cluster and local pointer |
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| 60 | cxy_t th_cxy = GET_CXY( th_xp ); |
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[440] | 61 | thread_t * th_ptr = GET_PTR( th_xp ); |
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[75] | 62 | |
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| 63 | // get command type and extended pointer on MMC device |
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[279] | 64 | type = hal_remote_lw ( XPTR( th_cxy , &th_ptr->mmc_cmd.type ) ); |
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| 65 | dev_xp = (xptr_t)hal_remote_lwd( XPTR( th_cxy , &th_ptr->mmc_cmd.dev_xp ) ); |
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[75] | 66 | |
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| 67 | // get MMC device cluster and local pointer |
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| 68 | cxy_t dev_cxy = GET_CXY( dev_xp ); |
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[440] | 69 | chdev_t * dev_ptr = GET_PTR( dev_xp ); |
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[75] | 70 | |
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[440] | 71 | // get cluster and pointers for SOCLIB_MMC peripheral segment base |
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| 72 | xptr_t seg_xp = (xptr_t)hal_remote_lwd( XPTR( dev_cxy , &dev_ptr->base ) ); |
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| 73 | cxy_t seg_cxy = GET_CXY( seg_xp ); |
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| 74 | uint32_t * seg_ptr = GET_PTR( seg_xp ); |
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[75] | 75 | |
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| 76 | if( (type == MMC_CC_INVAL) || (type == MMC_CC_SYNC) ) |
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| 77 | { |
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[440] | 78 | // get buffer pointer and size |
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| 79 | buf_ptr = hal_remote_lpt( XPTR( th_cxy , &th_ptr->mmc_cmd.buf_ptr ) ); |
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| 80 | buf_size = hal_remote_lw ( XPTR( th_cxy , &th_ptr->mmc_cmd.buf_size ) ); |
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[75] | 81 | |
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[440] | 82 | // set command type |
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| 83 | uint32_t cc_cmd; |
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[75] | 84 | if( type == MMC_CC_INVAL ) cc_cmd = SOCLIB_MMC_CC_INVAL; |
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| 85 | else cc_cmd = SOCLIB_MMC_CC_SYNC; |
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| 86 | |
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| 87 | // set SOCLIB_MMC registers to start INVAL/SYNC operation |
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[440] | 88 | hal_remote_sw( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_ADDR_LO ) , (uint32_t)buf_ptr ); |
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| 89 | hal_remote_sw( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_ADDR_HI ) , (uint32_t)dev_cxy ); |
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| 90 | hal_remote_sw( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_BUF_LENGTH ) , buf_size ); |
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| 91 | hal_remote_sw( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_CMD_TYPE ) , cc_cmd ); |
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[75] | 92 | } |
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| 93 | else // (type == MMC_GET_ERROR) or (type == MMC_GET_ERROR) pr (type == MMC_GET_INSTRU ) |
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| 94 | { |
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| 95 | // get src/dst buffer local pointer and register index |
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[279] | 96 | reg_ptr = (uint32_t *)hal_remote_lpt( XPTR( th_cxy , &th_ptr->mmc_cmd.reg_ptr ) ); |
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| 97 | reg_index = hal_remote_lw( XPTR( th_cxy , &th_ptr->mmc_cmd.reg_index ) ); |
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[75] | 98 | |
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| 99 | // move register to/from local buffer |
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| 100 | if( (type == MMC_GET_ERROR) || (type == MMC_GET_INSTRU) ) |
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| 101 | { |
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[440] | 102 | *reg_ptr = hal_remote_lw( XPTR( seg_cxy , seg_ptr + reg_index ) ); |
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[75] | 103 | } |
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| 104 | else // type == MMC_SET_ERROR |
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| 105 | { |
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[440] | 106 | hal_remote_sw( XPTR( seg_cxy , seg_ptr + reg_index ) , *reg_ptr ); |
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[75] | 107 | } |
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| 108 | } |
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| 109 | } // end soclib_mmc_cmd() |
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| 110 | |
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| 111 | |
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| 112 | //////////////////////////////////////////////////////////////// |
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| 113 | void __attribute__ ((noinline)) soclib_mmc_isr( chdev_t * chdev ) |
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| 114 | { |
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| 115 | // get pointer on MMC segment base |
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| 116 | uint32_t * base = (uint32_t *)GET_PTR( chdev->base ); |
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| 117 | |
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| 118 | // get faulty ADDRESS and SRCID from MMC registers |
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| 119 | uint32_t paddr_lo = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_ADDR_LO); |
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| 120 | uint32_t paddr_hi = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_ADDR_HI); |
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| 121 | uint32_t srcid = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_SRCID); |
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| 122 | |
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| 123 | paddr_t paddr = (((paddr_t)paddr_hi)<<32) + ((paddr_t)paddr_lo); |
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| 124 | |
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| 125 | // reset MMC IRQ |
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| 126 | *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_IRQ_RESET) = 0; |
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| 127 | |
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| 128 | // print an error message on kernel terminal TODO : should be improved |
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| 129 | printk("\n[ERROR] reported from MMC in cluster %x : faulty address = %l / srcid = %x\n", |
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| 130 | paddr , srcid ); |
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| 131 | |
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| 132 | } // end soclib_mmc_isr() |
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| 133 | |
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| 134 | |
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| 135 | |
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