source: trunk/hal/tsar_mips32/drivers/soclib_mmc.c @ 651

Last change on this file since 651 was 626, checked in by alain, 6 years ago

This version has been tested on the sort multithreaded application
for TSAR_IOB architectures ranging from 1 to 8 clusters.
It fixes three bigs bugs:
1) the dev_ioc device API has been modified: the dev_ioc_sync_read()
and dev_ioc_sync_write() function use now extended pointers on the
kernel buffer to access a mapper stored in any cluster.
2) the hal_uspace API has been modified: the hal_copy_to_uspace()
and hal_copy_from_uspace() functions use now a (cxy,ptr) couple
to identify the target buffer (equivalent to an extended pointer.
3) an implementation bug has been fixed in the assembly code contained
in the hal_copy_to_uspace() and hal_copy_from_uspace() functions.

File size: 5.1 KB
RevLine 
[75]1/*
[626]2 * soclib_mmc.c - soclib L2 cache driver implementation.
[75]3 *
[626]4 * Author     Alain Greiner (2016,2017,2018,2019)
[75]5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH..
9 *
10 * ALMOS-MKH. is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH. is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24
[451]25#include <hal_kernel_types.h>
[75]26#include <chdev.h>
27#include <dev_mmc.h>
28#include <soclib_mmc.h>
29#include <thread.h>
30#include <printk.h>
31
32
33///////////////////////////////////////
34void soclib_mmc_init( chdev_t * chdev )
35{
36    // get pointer on MMC segment base
37    uint32_t * base = (uint32_t *)GET_PTR( chdev->base );
38
[257]39    // set driver specific fields in device descriptor
40    chdev->cmd = &soclib_mmc_cmd;
41    chdev->isr = &soclib_mmc_isr;
42
[75]43    // enable MMC IRQ
44    *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_IRQ_ENABLE) = 1;
45} 
46
47
48//////////////////////////////////////////////////////////////
49void __attribute__ ((noinline)) soclib_mmc_cmd( xptr_t th_xp )
50{
51    xptr_t     dev_xp;       // extended pointer on MMC device
52    uint32_t   type;         // MMC command : type
[440]53    void     * buf_ptr;      // MMC command : buffer pointer
[75]54    uint32_t   buf_size;     // MMC command : buffer size
55    uint32_t   reg_index;    // MMC command : register index in MMC peripheral
56    uint32_t * reg_ptr;      // MMC command : pointer on dst/src buffer in client cluster
57
58    // get client thread cluster and local pointer
59    cxy_t      th_cxy = GET_CXY( th_xp );
[440]60    thread_t * th_ptr = GET_PTR( th_xp );
[75]61
62    // get command type and extended pointer on MMC device
[626]63    type   =         hal_remote_l32( XPTR( th_cxy , &th_ptr->mmc_cmd.type   ) );
[570]64    dev_xp = (xptr_t)hal_remote_l64( XPTR( th_cxy , &th_ptr->mmc_cmd.dev_xp ) );
[75]65
66    // get MMC device cluster and local pointer
67    cxy_t     dev_cxy = GET_CXY( dev_xp );
[440]68    chdev_t * dev_ptr = GET_PTR( dev_xp );
[75]69
[440]70    // get cluster and pointers for SOCLIB_MMC peripheral segment base
[570]71    xptr_t     seg_xp = (xptr_t)hal_remote_l64( XPTR( dev_cxy , &dev_ptr->base ) );
[440]72    cxy_t      seg_cxy = GET_CXY( seg_xp );
73    uint32_t * seg_ptr = GET_PTR( seg_xp );
[75]74
75    if( (type == MMC_CC_INVAL) || (type == MMC_CC_SYNC) )
76    {
[440]77        // get buffer pointer and size
78        buf_ptr  = hal_remote_lpt( XPTR( th_cxy , &th_ptr->mmc_cmd.buf_ptr ) );
[570]79        buf_size = hal_remote_l32 ( XPTR( th_cxy , &th_ptr->mmc_cmd.buf_size ) );
[75]80
[440]81        // set command type
82        uint32_t   cc_cmd;
[75]83        if( type == MMC_CC_INVAL )  cc_cmd = SOCLIB_MMC_CC_INVAL;
84        else                        cc_cmd = SOCLIB_MMC_CC_SYNC; 
85
86        // set SOCLIB_MMC registers to start INVAL/SYNC operation
[570]87        hal_remote_s32( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_ADDR_LO    ) , (uint32_t)buf_ptr );
88        hal_remote_s32( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_ADDR_HI    ) , (uint32_t)dev_cxy );
89        hal_remote_s32( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_BUF_LENGTH ) , buf_size ); 
90        hal_remote_s32( XPTR( seg_cxy , seg_ptr + SOCLIB_MMC_CMD_TYPE   ) , cc_cmd ); 
[75]91    }
92    else  // (type == MMC_GET_ERROR) or (type == MMC_GET_ERROR) pr (type == MMC_GET_INSTRU )
93    {
94        // get src/dst buffer local pointer and register index
[279]95        reg_ptr   = (uint32_t *)hal_remote_lpt( XPTR( th_cxy , &th_ptr->mmc_cmd.reg_ptr ) );
[570]96        reg_index = hal_remote_l32( XPTR( th_cxy , &th_ptr->mmc_cmd.reg_index ) );
[75]97
98        // move register to/from local buffer
99        if( (type == MMC_GET_ERROR) || (type == MMC_GET_INSTRU) )
100        {
[570]101            *reg_ptr =  hal_remote_l32( XPTR( seg_cxy , seg_ptr + reg_index ) );
[75]102        }
103        else  // type == MMC_SET_ERROR
104        {
[570]105            hal_remote_s32( XPTR( seg_cxy , seg_ptr + reg_index ) , *reg_ptr );
[75]106        }
107    }
108} // end soclib_mmc_cmd()
109
110
111////////////////////////////////////////////////////////////////
112void __attribute__ ((noinline)) soclib_mmc_isr( chdev_t * chdev )
113{
114    // get pointer on MMC segment base
115    uint32_t * base = (uint32_t *)GET_PTR( chdev->base );
116
117    // get faulty ADDRESS and SRCID from MMC registers
118    uint32_t paddr_lo = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_ADDR_LO);
119    uint32_t paddr_hi = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_ADDR_HI);
120    uint32_t srcid    = *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_SRCID);
121
122    paddr_t paddr = (((paddr_t)paddr_hi)<<32) + ((paddr_t)paddr_lo);
123   
124    // reset MMC IRQ
125    *(base + (SOCLIB_MMC_ERROR_FUNC << 7) + SOCLIB_MMC_ERROR_IRQ_RESET) = 0;
126   
127    // print an error message on kernel terminal TODO : should be improved
128    printk("\n[ERROR] reported from MMC in cluster %x : faulty address = %l / srcid = %x\n",
129           paddr , srcid );
130
131} // end soclib_mmc_isr()
132
133
134
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