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source: trunk/hal/tsar_mips32/drivers/soclib_pic.c @ 212

Last change on this file since 212 was 205, checked in by alain, 7 years ago
Change dev_pic_enable_irq() and dev_pic_disable_irq() prototypes to handle remote IRQs.
File size: 17.7 KB

Line
1	/*
2	* soclib_pic.c - soclib PIC driver implementation.
3	*
4	* Author Alain Greiner (2016,2017)
5	*
6	* Copyright (c) UPMC Sorbonne Universites
7	*
8	* This file is part of ALMOS-MKH.
9	*
10	* ALMOS-MKH is free software; you can redistribute it and/or modify it
11	* under the terms of the GNU General Public License as published by
12	* the Free Software Foundation; version 2.0 of the License.
13	*
14	* ALMOS-MKH is distributed in the hope that it will be useful, but
15	* WITHOUT ANY WARRANTY; without even the implied warranty of
16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17	* General Public License for more details.
18	*
19	* You should have received a copy of the GNU General Public License
20	* along with ALMOS-MKH; if not, write to the Free Software Foundation,
21	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22	*/
23
24	#include <hal_types.h>
25	#include <chdev.h>
26	#include <soclib_pic.h>
27	#include <errno.h>
28	#include <string.h>
29	#include <vfs.h>
30	#include <cluster.h>
31	#include <printk.h>
32	#include <core.h>
33	#include <thread.h>
34
35	//////////////////////////////////////////////////////////////////////////////////////
36	// Extern variables
37	//////////////////////////////////////////////////////////////////////////////////////
38
39	extern chdev_directory_t chdev_dir; // defined in chdev.h / allocated in kerneL-init.c
40
41	extern iopic_input_t iopic_input; // defined in dev_pic.h / allocated in kernel_init.c
42	extern lapic_input_t lapic_input; // defined in dev_pic.h / allocated in kernel_init.c
43
44	//////////////////////////////////////////////////////////////////////////////////////
45	// SOCLIB PIC private functions
46	//////////////////////////////////////////////////////////////////////////////////////
47
48	///////////////////////////////
49	uint32_t soclib_pic_wti_alloc()
50	{
51	uint32_t index;
52
53	// get pointer on cluster extension for SOCLIB PIC (XCU descriptor)
54	soclib_pic_cluster_t * ext_ptr = LOCAL_CLUSTER->pic_extend;
55
56	assert( (ext_ptr->first_free_wti < ext_ptr->wti_nr) , __FUNCTION__ ,
57	"no free WTI found : too much external IRQs\n");
58
59	// update WTI allocator
60	index = ext_ptr->first_free_wti;
61	ext_ptr->first_free_wti++;
62
63	return index;
64
65	} // end soclib_pic_wti_alloc()
66
67	///////////////////////////////////////
68	inline uint32_t * soclib_pic_xcu_base()
69	{
70	return ((soclib_pic_cluster_t *)(LOCAL_CLUSTER->pic_extend))->xcu_base;
71	}
72
73	/////////////////////////////////////////////////////////
74	inline uint32_t * soclib_pic_remote_xcu_base( cxy_t cxy )
75	{
76	soclib_pic_cluster_t * extend;
77
78	// get extended pointer on PIC extension in remote cluster
79	extend = hal_remote_lpt( XPTR( cxy , &cluster_manager.pic_extend ) );
80
81	return (uint32_t *)hal_remote_lpt( XPTR( cxy , &extend->xcu_base ) );
82
83	}
84
85
86	//////////////////////////////////////////
87	uint32_t soclib_pic_ack_timer( lid_t lid )
88	{
89	// get local XCU segment base
90	uint32_t * base = soclib_pic_xcu_base();
91
92	// read from register
93	return base[(XCU_PTI_ACK << 5) \| lid];
94
95	} // end soclib_pic_ack_timer()
96
97	///////////////////////////////////////////
98	void soclib_pic_xcu_status( lid_t lid,
99	uint32_t * hwi_status,
100	uint32_t * wti_status,
101	uint32_t * pti_status )
102	{
103	// get local XCU segment base
104	uint32_t * base = soclib_pic_xcu_base();
105
106	// read PRIO register
107	uint32_t prio = base[(XCU_PRIO << 5) \| lid];
108
109	*wti_status = (prio & 0x4) ? (((prio >> 24) & 0x1F) + 1) : 0;
110	*hwi_status = (prio & 0x2) ? (((prio >> 16) & 0x1F) + 1) : 0;
111	*pti_status = (prio & 0x1) ? (((prio >> 8) & 0x1F) + 1) : 0;
112
113	}
114
115	/////////////////////////////
116	void soclib_pic_irq_handler()
117	{
118	uint32_t hwi_status; // HWI index + 1 / no pending HWI if 0
119	uint32_t wti_status; // WTI index + 1 / no pending WTI if 0
120	uint32_t pti_status; // PTI index + 1 / no pending PTI if 0
121	chdev_t * src_chdev; // pointer on source chdev descriptor
122	uint32_t index; // IRQ index
123
124	core_t * core = CURRENT_THREAD->core;
125
126	// get XCU status
127	soclib_pic_xcu_status( core->lid,
128	&hwi_status,
129	&wti_status,
130	&pti_status );
131
132	// analyse status and handle up to 3 pending IRQ (one WTI, one HWI, one PTI)
133
134	if( wti_status ) // pending WTI
135	{
136	index = wti_status - 1;
137
138	if( index < LOCAL_CLUSTER->cores_nr ) // it is an IPI
139	{
140	assert( (index == core->lid) , __FUNCTION__ , "illegal IPI index" );
141
142	// TODO acknowledge WTI [AG]
143
144	// TODO force scheduling [AG]
145	}
146	else // it is an external device
147	{
148	// get pointer on source chdev
149	src_chdev = ((soclib_pic_core_t *)core->pic_extend)->wti_vector[index];
150
151	if( src_chdev == NULL ) // strange, but not fatal
152	{
153	printk("\n[WARNING] in %s : no handler for WTI %d on core %d in cluster %x\n",
154	__FUNCTION__ , index , core->lid , local_cxy );
155
156	core->spurious_irqs ++;
157
158	// TODO disable this WTI in local XCU [AG]
159	}
160	else // call relevant ISR
161	{
162	irq_dmsg("\n[INFO] %s received WTI : index = %d for core %d in cluster %d\n",
163	__FUNCTION__ , index , core->lid , local_cxy );
164
165	// call ISR
166	src_chdev->isr( src_chdev );
167	}
168	}
169	}
170
171	if( hwi_status ) // pending HWI
172	{
173	index = hwi_status - 1;
174
175	// get pointer on source chdev
176	src_chdev = ((soclib_pic_core_t *)core->pic_extend)->hwi_vector[index];
177
178	if( src_chdev == NULL ) // strange, but not fatal
179	{
180	printk("\n[WARNING] in %s : no handler for HWI %d on core %d in cluster %x\n",
181	__FUNCTION__ , index , core->lid , local_cxy );
182
183	core->spurious_irqs ++;
184
185	// TODO disable this HWI in local XCU [AG]
186	}
187	else // call relevant ISR
188	{
189	irq_dmsg("\n[INFO] %s received HWI : index = %d for core %d in cluster %d\n",
190	__FUNCTION__ , index , core->lid , local_cxy );
191
192	// call ISR
193	src_chdev->isr( src_chdev );
194	}
195	}
196
197	if( pti_status ) // pending PTI
198	{
199	index = pti_status - 1;
200
201	irq_dmsg("\n[INFO] %s received PTI : index = %d for cpu %d in cluster %d\n",
202	__FUNCTION__ , index , core->lid , local_cxy );
203
204	assert( (index == core->lid) , __FUNCTION__ , "unconsistent PTI index\n");
205
206	// acknowledge PTI
207	soclib_pic_ack_timer( index );
208
209	// TODO execute all actions related to TICK event
210	core_clock( core );
211	}
212	} // end soclib_pic_irq_handler()
213
214
215
216
217	//////////////////////////////////////////////////////////////////////////////////////
218	// SOCLIC PIC device generic API
219	//////////////////////////////////////////////////////////////////////////////////////
220
221	/////////////////////////////////////
222	void soclib_pic_init( chdev_t * pic )
223	{
224	uint32_t i; // for loop on IOPIC inputs
225	uint32_t x; // for loop on clusters in a row
226	uint32_t y; // for loop on clusters in a column inputs
227	uint32_t lid; // for loop on cores in a cluster
228
229	// get target architecture parameters
230	cluster_t * cluster = LOCAL_CLUSTER;
231	uint32_t x_size = cluster->x_size;
232	uint32_t y_size = cluster->y_size;
233	uint32_t y_width = cluster->y_width;
234	uint32_t ncores = cluster->cores_nr;
235
236	// get IOPIC controller cluster and segment base pointer
237	cxy_t iopic_seg_cxy = (cxy_t)GET_CXY( pic->base );
238	uint32_t * iopic_seg_ptr = (uint32_t *)GET_PTR( pic->base );
239
240	// reset the IOPIC component registers : mask all input IRQs
241	for( i = 0 ; i < CONFIG_MAX_EXTERNAL_IRQS ; i++ )
242	{
243	xptr_t iopic_seg_xp = XPTR( iopic_seg_cxy,
244	iopic_seg_ptr + i*IOPIC_SPAN + IOPIC_MASK );
245	hal_remote_sw( iopic_seg_xp , 0 );
246	}
247
248	// GET XCU controller segment base
249	uint32_t * base = soclib_pic_xcu_base();
250
251	// reset the XCU component registers in all clusters:
252	// mask all HWIs, all WTIs, and all PTIs, for all cores
253	for( x = 0 ; x < x_size ; x++ )
254	{
255	for( y = 0 ; y < y_size ; y++ )
256	{
257	for( lid = 0 ; lid < ncores ; lid++ )
258	{
259	cxy_t cxy = (x<<y_width) + y;
260	xptr_t hwi_mask_xp = XPTR( cxy , base + (XCU_MSK_HWI_DISABLE << 5 \| lid) );
261	xptr_t wti_mask_xp = XPTR( cxy , base + (XCU_MSK_WTI_DISABLE << 5 \| lid) );
262	xptr_t pti_mask_xp = XPTR( cxy , base + (XCU_MSK_PTI_DISABLE << 5 \| lid) );
263	hal_remote_sw( hwi_mask_xp , 0xFFFFFFFF );
264	hal_remote_sw( wti_mask_xp , 0xFFFFFFFF );
265	hal_remote_sw( pti_mask_xp , 0xFFFFFFFF );
266	}
267	}
268	}
269	} // end soclib_pic_init()
270
271	//////////////////////////////////////////////////
272	void soclib_pic_extend_init( uint32_t * xcu_base )
273	{
274	soclib_pic_cluster_t * cluster_ext_ptr;
275	soclib_pic_core_t * core_ext_ptr;
276	kmem_req_t req;
277	uint32_t lid;
278	uint32_t idx;
279
280	cluster_t * cluster = LOCAL_CLUSTER;
281
282	// create core extension for all cores in cluster
283	for( lid = 0 ; lid < cluster->cores_nr ; lid++ )
284	{
285	// allocate memory for core extension
286	req.type = KMEM_GENERIC;
287	req.size = sizeof(soclib_pic_core_t);
288	req.flags = AF_KERNEL;
289	core_ext_ptr = kmem_alloc( &req );
290
291	assert( (core_ext_ptr != NULL) , __FUNCTION__ ,
292	"cannot allocate memory for core extension\n");
293
294	// reset the HWI / WTI interrupt vectors
295	for( idx = 0 ; idx < SOCLIB_MAX_HWI ; idx++ ) core_ext_ptr->hwi_vector[idx] = NULL;
296	for( idx = 0 ; idx < SOCLIB_MAX_WTI ; idx++ ) core_ext_ptr->wti_vector[idx] = NULL;
297
298	// register PIC extension in core descriptor
299	cluster->core_tbl[lid].pic_extend = core_ext_ptr;
300	}
301
302	// allocate memory for cluster extension
303	req.type = KMEM_GENERIC;
304	req.size = sizeof(soclib_pic_cluster_t);
305	req.flags = AF_KERNEL;
306	cluster_ext_ptr = kmem_alloc( &req );
307
308	assert( (cluster_ext_ptr != NULL) , __FUNCTION__ ,
309	"cannot allocate memory for cluster extension\n");
310
311	// get XCU characteristics from the XCU config register
312	uint32_t config = xcu_base[XCU_CONFIG<<5];
313	uint32_t wti_nr = (config >> 16) & 0xFF;
314	uint32_t hwi_nr = (config >> 8 ) & 0xFF;
315	uint32_t pti_nr = (config ) & 0xFF;
316
317	// initialize the cluster extension
318	// The first WTI slots are for IPIs (one slot per core)
319	cluster_ext_ptr->xcu_base = xcu_base;
320	cluster_ext_ptr->hwi_nr = hwi_nr;
321	cluster_ext_ptr->wti_nr = wti_nr;
322	cluster_ext_ptr->pti_nr = pti_nr;
323	cluster_ext_ptr->first_free_wti = cluster->cores_nr;
324
325	// register PIC extension in cluster manager
326	cluster->pic_extend = cluster_ext_ptr;
327
328	} // end soclib_pic_extend_init()
329
330	////////////////////////////////////////
331	void soclib_pic_bind_irq( lid_t lid,
332	chdev_t * src_chdev )
333	{
334	// get extended & local pointers on PIC chdev descriptor
335	xptr_t pic_xp = chdev_dir.pic;
336	cxy_t pic_cxy = GET_CXY( pic_xp );
337	chdev_t * pic_ptr = (chdev_t *)GET_PTR( pic_xp );
338
339	// get extended and local pointers on IOPIC segment base
340	xptr_t seg_pic_xp = hal_remote_lwd( XPTR( pic_cxy , &pic_ptr->base ) );
341	cxy_t seg_pic_cxy = GET_CXY( seg_pic_xp );
342	uint32_t * seg_pic_ptr = (uint32_t *)GET_PTR( seg_pic_xp );
343
344	// get local pointer on XCU segment base
345	uint32_t * seg_xcu_ptr = soclib_pic_xcu_base();
346
347	// get the source chdev functionnal type, channel, and direction
348	uint32_t func = src_chdev->func;
349	uint32_t channel = src_chdev->channel;
350	bool_t is_rx = src_chdev->is_rx;
351
352	if( (func == DEV_FUNC_IOC) \|\| (func == DEV_FUNC_NIC) \|\|
353	(func == DEV_FUNC_TXT) \|\| (func == DEV_FUNC_IOB) ) // external IRQ => WTI
354	{
355	// get external IRQ index
356	uint32_t irq_id;
357	if ( func == DEV_FUNC_IOC ) irq_id = iopic_input.ioc[channel];
358	else if( func == DEV_FUNC_TXT ) irq_id = iopic_input.txt[channel];
359	else if( (func == DEV_FUNC_NIC) && is_rx ) irq_id = iopic_input.nic_rx[channel];
360	else if( (func == DEV_FUNC_NIC) && !is_rx ) irq_id = iopic_input.nic_tx[channel];
361	else if( func == DEV_FUNC_IOB ) irq_id = iopic_input.iob;
362	else assert( false , __FUNCTION__ , "illegal device functionnal type\n");
363
364	// get a WTI mailbox from local XCU descriptor
365	uint32_t wti_id = soclib_pic_wti_alloc();
366
367	// register IRQ type and index in chdev
368	src_chdev->irq_type = SOCLIB_TYPE_WTI;
369	src_chdev->irq_id = wti_id;
370
371	// compute extended pointer on WTI mailbox in local XCU
372	xptr_t wti_xp = XPTR( local_cxy , &seg_xcu_ptr[(XCU_WTI_REG << 5) \| wti_id] );
373
374	// set the IOPIC_ADDRESS and IOPIC_EXTEND registers in IOPIC
375	uint32_t lsb_wdata = (uint32_t)wti_xp;
376	uint32_t msb_wdata = (uint32_t)(wti_xp >> 32);
377	xptr_t lsb_xp = XPTR( seg_pic_cxy , seg_pic_ptr+irq_id*IOPIC_SPAN+IOPIC_ADDRESS );
378	xptr_t msb_xp = XPTR( seg_pic_cxy , seg_pic_ptr+irq_id*IOPIC_SPAN+IOPIC_EXTEND );
379	hal_remote_sw( lsb_xp , lsb_wdata );
380	hal_remote_sw( msb_xp , msb_wdata );
381
382	// unmask IRQ in IOPIC
383	hal_remote_sw( XPTR( seg_pic_cxy , seg_pic_ptr+irq_id*IOPIC_SPAN+IOPIC_MASK ), 1 );
384
385	// update the WTI interrupt vector for core[lid]
386	core_t * core = &LOCAL_CLUSTER->core_tbl[lid];
387	((soclib_pic_core_t *)core->pic_extend)->wti_vector[wti_id] = src_chdev;
388	}
389	else if( (func == DEV_FUNC_DMA) \|\| (func == DEV_FUNC_MMC) ) // internal IRQ => HWI
390	{
391	// get internal IRQ index
392	uint32_t hwi_id;
393	if( func == DEV_FUNC_DMA ) hwi_id = lapic_input.dma[channel];
394	else hwi_id = lapic_input.mmc;
395
396	// register IRQ type and index in chdev
397	src_chdev->irq_type = SOCLIB_TYPE_HWI;
398	src_chdev->irq_id = hwi_id;
399
400	// update the HWI interrupt vector for core[lid]
401	core_t * core = &LOCAL_CLUSTER->core_tbl[lid];
402	((soclib_pic_core_t *)core->pic_extend)->wti_vector[hwi_id] = src_chdev;
403	}
404	else
405	{
406	assert( false , __FUNCTION__ , "illegal device functionnal type\n" );
407	}
408	} // end soclib_pic_bind_irq();
409
410	///////////////////////////////////////
411	void soclib_pic_enable_irq( lid_t lid,
412	xptr_t src_chdev_xp )
413	{
414	// get cluster and local pointer on remote src_chdev
415	cxy_t src_chdev_cxy = GET_CXY( src_chdev_xp );
416	chdev_t * src_chdev_ptr = (chdev_t *)GET_PTR( src_chdev_xp );
417
418	// get local pointer on remote XCU segment base
419	uint32_t * seg_xcu_ptr = soclib_pic_remote_xcu_base( src_chdev_cxy );
420
421	// get the source chdev IRQ type and index
422	uint32_t irq_type = hal_remote_lw( XPTR( src_chdev_cxy , &src_chdev_ptr->irq_type ) );
423	uint32_t irq_id = hal_remote_lw( XPTR( src_chdev_cxy , &src_chdev_ptr->irq_id ) );
424
425	if( irq_type == SOCLIB_TYPE_HWI )
426	{
427	// enable this HWI in remote XCU controller
428	hal_remote_sw( XPTR( src_chdev_cxy ,
429	&seg_xcu_ptr[(XCU_MSK_HWI_ENABLE << 5) \| lid] ) , (1 << irq_id) );
430	}
431	else if( irq_type == SOCLIB_TYPE_WTI )
432	{
433	// enable this WTI in local XCU controller
434	hal_remote_sw( XPTR( src_chdev_cxy ,
435	&seg_xcu_ptr[(XCU_MSK_WTI_ENABLE << 5) \| lid] ) , (1 << irq_id) );
436	}
437	else
438	{
439	assert( false , __FUNCTION__ , "illegal IRQ type\n" );
440	}
441	} // end soclib_pic_enable_irq()
442
443	////////////////////////////////////////
444	void soclib_pic_disable_irq( lid_t lid,
445	xptr_t src_chdev_xp )
446	{
447	// get cluster and local pointer on remote src_chdev
448	cxy_t src_chdev_cxy = GET_CXY( src_chdev_xp );
449	chdev_t * src_chdev_ptr = (chdev_t *)GET_PTR( src_chdev_xp );
450
451	// get local pointer on remote XCU segment base
452	uint32_t * seg_xcu_ptr = soclib_pic_remote_xcu_base( src_chdev_cxy );
453
454	// get the source chdev IRQ type and index
455	uint32_t irq_type = hal_remote_lw( XPTR( src_chdev_cxy , &src_chdev_ptr->irq_type ) );
456	uint32_t irq_id = hal_remote_lw( XPTR( src_chdev_cxy , &src_chdev_ptr->irq_id ) );
457
458	if( irq_type == SOCLIB_TYPE_HWI )
459	{
460	// enable this HWI in remote XCU controller
461	hal_remote_sw( XPTR( src_chdev_cxy ,
462	&seg_xcu_ptr[(XCU_MSK_HWI_DISABLE << 5) \| lid] ) , (1 << irq_id) );
463	}
464	else if( irq_type == SOCLIB_TYPE_WTI )
465	{
466	// enable this WTI in local XCU controller
467	hal_remote_sw( XPTR( src_chdev_cxy ,
468	&seg_xcu_ptr[(XCU_MSK_WTI_DISABLE << 5) \| lid] ) , (1 << irq_id) );
469	}
470	else
471	{
472	assert( false , __FUNCTION__ , "illegal IRQ type\n" );
473	}
474	} // end soclib_pic_enable_irq()
475
476	///////////////////////////////////////////////
477	void soclib_pic_enable_timer( uint32_t period )
478	{
479	// calling core local index
480	lid_t lid = CURRENT_CORE->lid;
481
482	// get XCU segment base
483	uint32_t * base = soclib_pic_xcu_base();
484
485	// set period value in XCU
486	base[(XCU_PTI_PER << 5) \| lid] = period;
487
488	// enable the PTI in local XCU controller
489	base[(XCU_MSK_PTI_ENABLE << 5) \| lid] = 1 << lid;
490	}
491
492	///////////////////////////////////////
493	void soclib_pic_send_ipi( cxy_t cxy,
494	lid_t lid )
495	{
496	// get pointer on local XCU segment base
497	uint32_t * base = soclib_pic_xcu_base();
498
499	// write to WTI mailbox[cxy][lid]
500	hal_remote_sw( XPTR( cxy , &base[(XCU_WTI_REG << 5) \| lid] ) , 0 );
501	}
502
503
504

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