[25] | 1 | /* |
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| 2 | * hal_boot.S - Kernel boot entry point |
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[145] | 3 | * |
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[29] | 4 | * Copyright (c) 2017 Maxime Villard |
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| 5 | * This code is inspired a lot from the NetBSD boot procedure, written by |
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| 6 | * Maxime Villard too. XXX copyright |
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[25] | 7 | * |
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[29] | 8 | * This file is part of ALMOS-MKH. |
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[25] | 9 | * |
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[29] | 10 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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[25] | 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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[29] | 14 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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[25] | 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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[234] | 20 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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[25] | 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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[29] | 24 | #define x86_ASM |
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[25] | 25 | #include <hal_boot.h> |
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[32] | 26 | #include <hal_multiboot.h> |
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[25] | 27 | #include <hal_register.h> |
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[193] | 28 | #include <hal_kentry.h> |
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[25] | 29 | #include <hal_segmentation.h> |
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| 30 | |
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| 31 | #define MULTIBOOT_HEADER_MAGIC 0x1BADB002 |
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| 32 | #define MULTIBOOT_HEADER_FLAGS 0x00000000 |
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| 33 | #define MULTIBOOT_INFO_MAGIC 0x2BADB002 |
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| 34 | #define CHECKSUM -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) |
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| 35 | |
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| 36 | #if L2_SLOT_KERNBASE > 0 |
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| 37 | #define TABLE_L2_ENTRIES (2 * (NKL2_KIMG_ENTRIES + 1)) |
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| 38 | #else |
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| 39 | #define TABLE_L2_ENTRIES (NKL2_KIMG_ENTRIES + 1) |
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| 40 | #endif |
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| 41 | |
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| 42 | #if L3_SLOT_KERNBASE > 0 |
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| 43 | #define TABLE_L3_ENTRIES (2 * NKL3_KIMG_ENTRIES) |
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| 44 | #else |
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| 45 | #define TABLE_L3_ENTRIES NKL3_KIMG_ENTRIES |
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| 46 | #endif |
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| 47 | |
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| 48 | #define PROC0_PML4_OFF 0 |
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| 49 | #define PROC0_STK_OFF (PROC0_PML4_OFF + 1 * PAGE_SIZE) |
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| 50 | #define PROC0_PTP3_OFF (PROC0_STK_OFF + STKPAGES * PAGE_SIZE) |
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| 51 | #define PROC0_PTP2_OFF (PROC0_PTP3_OFF + NKL4_KIMG_ENTRIES * PAGE_SIZE) |
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| 52 | #define PROC0_PTP1_OFF (PROC0_PTP2_OFF + TABLE_L3_ENTRIES * PAGE_SIZE) |
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| 53 | #define TABLESIZE \ |
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| 54 | ((NKL4_KIMG_ENTRIES + TABLE_L3_ENTRIES + TABLE_L2_ENTRIES + 1 + STKPAGES) \ |
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| 55 | * PAGE_SIZE) |
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| 56 | |
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| 57 | /* |
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| 58 | * fillkpt - Fill in a kernel page table |
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| 59 | * eax = pte (page frame | control | status) |
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| 60 | * ebx = page table address |
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| 61 | * ecx = number of pages to map |
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| 62 | * |
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| 63 | * Each entry is 8 (PDE_SIZE) bytes long: we must set the 4 upper bytes to 0. |
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| 64 | */ |
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| 65 | #define fillkpt \ |
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| 66 | cmpl $0,%ecx ; /* zero-sized? */ \ |
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| 67 | je 2f ; \ |
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| 68 | 1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: 0 */ \ |
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| 69 | movl %eax,(%ebx) ; /* store phys addr */ \ |
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| 70 | addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ |
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| 71 | addl $PAGE_SIZE,%eax ; /* next phys page */ \ |
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| 72 | loop 1b ; \ |
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| 73 | 2: ; |
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| 74 | |
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| 75 | /* |
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| 76 | * fillkpt_nox - Same as fillkpt, but sets the NX/XD bit. |
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| 77 | */ |
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| 78 | #define fillkpt_nox \ |
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| 79 | cmpl $0,%ecx ; /* zero-sized? */ \ |
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| 80 | je 2f ; \ |
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| 81 | 1: movl $PG_NX32,(PDE_SIZE-4)(%ebx); /* upper 32 bits: NX */ \ |
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| 82 | movl %eax,(%ebx) ; /* store phys addr */ \ |
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| 83 | addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ |
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| 84 | addl $PAGE_SIZE,%eax ; /* next phys page */ \ |
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| 85 | loop 1b ; \ |
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| 86 | 2: ; |
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| 87 | |
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| 88 | /* |
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| 89 | * fillkpt_blank - Fill in a kernel page table with blank entries |
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| 90 | * ebx = page table address |
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| 91 | * ecx = number of pages to map |
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| 92 | */ |
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| 93 | #define fillkpt_blank \ |
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| 94 | cmpl $0,%ecx ; /* zero-sized? */ \ |
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| 95 | je 2f ; \ |
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| 96 | 1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: 0 */ \ |
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| 97 | movl $0,(%ebx) ; /* lower 32 bits: 0 */ \ |
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| 98 | addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ |
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| 99 | loop 1b ; \ |
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| 100 | 2: ; |
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| 101 | |
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[29] | 102 | /* |
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| 103 | * killkpt - Destroy a kernel page table (long mode) |
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| 104 | * rbx = page table address |
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| 105 | * rcx = number of pages to destroy |
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| 106 | */ |
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| 107 | #define killkpt \ |
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| 108 | 1: movq $0,(%rbx) ; \ |
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| 109 | addq $PDE_SIZE,%rbx ; \ |
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| 110 | loop 1b ; |
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| 111 | |
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[25] | 112 | /* 32bit version of PG_NX */ |
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| 113 | #define PG_NX32 0x80000000 |
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| 114 | |
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| 115 | #define RELOC(x) ((x) - KERNBASE) |
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| 116 | |
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| 117 | .globl start_x86_64 |
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| 118 | .globl L4paddr |
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[29] | 119 | .globl iom_base |
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[25] | 120 | |
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| 121 | /* |
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| 122 | * The multiboot header |
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| 123 | */ |
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| 124 | .section .boot,"ax",@progbits |
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| 125 | multiboot_header: |
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| 126 | .align 4 |
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| 127 | .long MULTIBOOT_HEADER_MAGIC |
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| 128 | .long MULTIBOOT_HEADER_FLAGS |
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| 129 | .long CHECKSUM |
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| 130 | |
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| 131 | /* |
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| 132 | * The variables used in the boot procedure. |
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| 133 | */ |
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| 134 | .section .data |
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| 135 | .align 4 |
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| 136 | |
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| 137 | .type L4paddr, @object |
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| 138 | L4paddr: .quad 0 /* paddr of L4 */ |
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| 139 | |
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[29] | 140 | .type iom_base, @object |
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| 141 | iom_base: .quad 0 /* virt. addr. of ISA I/O MEM */ |
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| 142 | |
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| 143 | |
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[25] | 144 | #define GDT64_LIMIT gdt64_end-gdt64_start-1 |
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| 145 | /* Temporary gdt64, with base address in low memory */ |
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| 146 | .type gdt64_lo, @object |
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| 147 | gdt64_lo: |
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| 148 | .word GDT64_LIMIT |
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| 149 | .quad RELOC(gdt64_start) |
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| 150 | .align 64 |
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| 151 | |
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| 152 | /* Temporary gdt64, with base address in high memory */ |
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| 153 | .type gdt64_hi, @object |
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| 154 | gdt64_hi: |
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| 155 | .word GDT64_LIMIT |
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| 156 | .quad gdt64_start |
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| 157 | .align 64 |
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| 158 | #undef GDT64_LIMIT |
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| 159 | |
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| 160 | .type gdt64_start, @object |
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| 161 | gdt64_start: |
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| 162 | .quad 0x0000000000000000 /* always empty */ |
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| 163 | .quad 0x00af9a000000ffff /* kernel CS */ |
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| 164 | .quad 0x00cf92000000ffff /* kernel DS */ |
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| 165 | gdt64_end: |
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| 166 | |
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| 167 | .type farjmp64, @object |
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| 168 | farjmp64: |
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| 169 | .long RELOC(longmode) |
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[29] | 170 | .word GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL) |
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[25] | 171 | .align 64 |
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| 172 | |
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| 173 | /* Space for the temporary stack */ |
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| 174 | .size tmpstk, tmpstk - . |
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| 175 | .space 512 |
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| 176 | tmpstk: |
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| 177 | |
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| 178 | .text |
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| 179 | |
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| 180 | start_x86_64: |
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| 181 | .code32 |
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| 182 | |
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| 183 | /* Warm boot */ |
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| 184 | movw $0x1234,0x472 |
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[32] | 185 | cld |
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[25] | 186 | |
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| 187 | /* Make sure it is a multiboot-compliant bootloader. */ |
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[32] | 188 | cmpl $MULTIBOOT_INFO_MAGIC,%eax |
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| 189 | je 1f |
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| 190 | ret /* what to do? */ |
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| 191 | 1: |
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[25] | 192 | |
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| 193 | movl $RELOC(tmpstk),%esp |
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| 194 | |
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| 195 | /* Reset the PSL. */ |
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| 196 | pushl $PSL_MBO |
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| 197 | popfl |
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| 198 | |
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[32] | 199 | /* |
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| 200 | * Copy the various multiboot structures |
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| 201 | */ |
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| 202 | movl %ebx,%esi /* src */ |
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| 203 | movl $RELOC(mb_info),%edi /* dst */ |
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| 204 | movl $MULTIBOOT_INFO_SIZE,%ecx /* len */ |
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| 205 | rep |
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| 206 | movsb /* copy esi -> edi */ |
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| 207 | |
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| 208 | testl $MULTIBOOT_INFO_HAS_LOADER_NAME,MB_MI_FLAGS(%ebx) |
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| 209 | jz 1f |
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| 210 | movl MB_MI_LOADER_NAME(%ebx),%esi /* src */ |
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| 211 | movl $RELOC(mb_loader_name),%edi /* dst */ |
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| 212 | copy_loop: |
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| 213 | cmpb $0,(%esi) |
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| 214 | je copy_end |
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| 215 | movsb /* copy esi -> edi */ |
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| 216 | jmp copy_loop |
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| 217 | copy_end: |
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| 218 | movsb /* copy esi -> edi */ |
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| 219 | 1: |
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| 220 | |
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| 221 | testl $MULTIBOOT_INFO_HAS_MMAP,MB_MI_FLAGS(%ebx) |
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| 222 | jz 1f |
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| 223 | movl MB_MI_MMAP_ADDR(%ebx),%esi /* src */ |
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| 224 | movl $RELOC(mb_mmap),%edi /* dst */ |
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| 225 | movl MB_MI_MMAP_LENGTH(%ebx),%ecx /* len */ |
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| 226 | |
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| 227 | rep |
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| 228 | movsb /* copy esi -> edi */ |
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| 229 | 1: |
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| 230 | |
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[312] | 231 | testl $MULTIBOOT_INFO_HAS_CMDLINE,MB_MI_FLAGS(%ebx) |
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| 232 | jz 1f |
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| 233 | movl MB_MI_CMDLINE(%ebx),%esi /* src */ |
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| 234 | movl $RELOC(mb_cmdline),%edi /* dst */ |
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| 235 | movl $PAGE_SIZE,%ecx /* len */ |
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| 236 | |
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| 237 | rep |
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| 238 | movsb /* copy esi -> edi */ |
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| 239 | 1: |
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| 240 | |
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[25] | 241 | /* |
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| 242 | * There are four levels of pages in amd64: PML4 -> PDP -> PD -> PT. They will |
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| 243 | * be referred to as: L4 -> L3 -> L2 -> L1. |
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| 244 | * |
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| 245 | * Virtual address space of the kernel: |
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[32] | 246 | * +---------------+------+-----------------------------------+-------------+ |
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| 247 | * | TEXT + RODATA | DATA | L4 -> PROC0 STK -> L3 -> L2 -> L1 | ISA I/O MEM | |
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| 248 | * +---------------+------+-----------------------------------+-------------+ |
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| 249 | * (1) (2) |
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[25] | 250 | * |
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| 251 | * PROC0 STK is obviously not linked as a page level. It just happens to be |
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| 252 | * caught between L4 and L3. |
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| 253 | * |
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| 254 | * (PROC0 STK + L4 + L3 + L2 + L1) is later referred to as BOOTSTRAP TABLES. |
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| 255 | * |
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| 256 | * ISA I/O MEM has no physical page allocated here, just virtual addresses. |
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| 257 | * |
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| 258 | * Important note: the kernel segments are properly 4k-aligned |
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[32] | 259 | * (see kernel_x86.ld), so there's no need to enforce alignment. |
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[25] | 260 | */ |
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| 261 | |
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| 262 | /* Find end of kernel image; brings us on (1). */ |
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| 263 | movl $RELOC(__kernel_end),%edi |
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| 264 | |
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| 265 | /* Align up for BOOTSTRAP TABLES. */ |
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| 266 | movl %edi,%esi |
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| 267 | addl $PGOFSET,%esi |
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| 268 | andl $~PGOFSET,%esi |
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| 269 | |
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| 270 | /* We are on the BOOTSTRAP TABLES. Save L4's physical address. */ |
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| 271 | movl $RELOC(L4paddr),%ebp |
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| 272 | movl %esi,(%ebp) |
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| 273 | movl $0,4(%ebp) |
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| 274 | |
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| 275 | /* Now, zero out the BOOTSTRAP TABLES (before filling them in). */ |
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| 276 | movl %esi,%edi |
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| 277 | xorl %eax,%eax |
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| 278 | cld |
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| 279 | movl $TABLESIZE,%ecx |
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| 280 | shrl $2,%ecx |
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| 281 | rep |
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| 282 | stosl /* copy eax -> edi */ |
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| 283 | |
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| 284 | /* |
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| 285 | * Build the page tables and levels. We go from L1 to L4, and link the levels |
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| 286 | * together. Note: RELOC computes &addr - KERNBASE in 32 bits; the value can't |
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| 287 | * be > 4G, or we can't deal with it anyway, since we are in 32bit mode. |
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| 288 | */ |
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| 289 | /* |
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| 290 | * Build L1. |
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| 291 | */ |
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| 292 | leal (PROC0_PTP1_OFF)(%esi),%ebx |
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| 293 | |
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| 294 | /* Skip the area below the kernel text. */ |
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| 295 | movl $(KERNTEXTOFF_LO - KERNBASE_LO),%ecx |
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| 296 | shrl $PGSHIFT,%ecx |
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| 297 | fillkpt_blank |
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| 298 | |
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| 299 | /* Map the kernel code RX. */ |
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| 300 | movl $(KERNTEXTOFF_LO - KERNBASE_LO),%eax /* start of TEXT */ |
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| 301 | movl $RELOC(__kernel_data_start),%ecx |
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| 302 | subl %eax,%ecx |
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| 303 | shrl $PGSHIFT,%ecx |
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[29] | 304 | orl $(PG_V|PG_KR|PG_G),%eax |
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[25] | 305 | fillkpt |
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| 306 | |
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| 307 | /* Map the kernel data RW. */ |
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| 308 | movl $RELOC(__kernel_data_start),%eax |
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| 309 | movl $RELOC(__kernel_end),%ecx |
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| 310 | subl %eax,%ecx |
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| 311 | shrl $PGSHIFT,%ecx |
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[29] | 312 | orl $(PG_V|PG_KW|PG_G),%eax |
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[25] | 313 | fillkpt_nox |
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| 314 | |
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| 315 | /* Map the BOOTSTRAP TABLES RW. */ |
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| 316 | movl $RELOC(__kernel_end),%eax /* start of BOOTSTRAP TABLES */ |
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| 317 | movl $TABLESIZE,%ecx /* length of BOOTSTRAP TABLES */ |
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| 318 | shrl $PGSHIFT,%ecx |
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[29] | 319 | orl $(PG_V|PG_KW|PG_G),%eax |
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[25] | 320 | fillkpt_nox |
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| 321 | |
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| 322 | /* We are on (2). Map ISA I/O MEM RW. */ |
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| 323 | movl $IOM_BEGIN,%eax |
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| 324 | movl $IOM_SIZE,%ecx /* size of ISA I/O MEM */ |
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| 325 | shrl $PGSHIFT,%ecx |
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[29] | 326 | orl $(PG_V|PG_KW|PG_G),%eax |
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[25] | 327 | fillkpt_nox |
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| 328 | |
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| 329 | /* |
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| 330 | * Build L2. Linked to L1. |
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| 331 | */ |
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| 332 | leal (PROC0_PTP2_OFF)(%esi),%ebx |
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| 333 | leal (PROC0_PTP1_OFF)(%esi),%eax |
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| 334 | orl $(PG_V|PG_KW),%eax |
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| 335 | movl $(NKL2_KIMG_ENTRIES+1),%ecx |
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| 336 | fillkpt |
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| 337 | |
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| 338 | #if L2_SLOT_KERNBASE > 0 |
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| 339 | /* If needed, set up level 2 entries for actual kernel mapping */ |
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| 340 | leal (PROC0_PTP2_OFF + L2_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx |
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| 341 | leal (PROC0_PTP1_OFF)(%esi),%eax |
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| 342 | orl $(PG_V|PG_KW),%eax |
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| 343 | movl $(NKL2_KIMG_ENTRIES+1),%ecx |
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| 344 | fillkpt |
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| 345 | #endif |
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| 346 | |
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| 347 | /* |
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| 348 | * Build L3. Linked to L2. |
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| 349 | */ |
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| 350 | leal (PROC0_PTP3_OFF)(%esi),%ebx |
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| 351 | leal (PROC0_PTP2_OFF)(%esi),%eax |
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| 352 | orl $(PG_V|PG_KW),%eax |
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| 353 | movl $NKL3_KIMG_ENTRIES,%ecx |
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| 354 | fillkpt |
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| 355 | |
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| 356 | #if L3_SLOT_KERNBASE > 0 |
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| 357 | /* If needed, set up level 3 entries for actual kernel mapping */ |
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| 358 | leal (PROC0_PTP3_OFF + L3_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx |
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| 359 | leal (PROC0_PTP2_OFF)(%esi),%eax |
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| 360 | orl $(PG_V|PG_KW),%eax |
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| 361 | movl $NKL3_KIMG_ENTRIES,%ecx |
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| 362 | fillkpt |
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| 363 | #endif |
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| 364 | |
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| 365 | /* |
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| 366 | * Build L4 for identity mapping. Linked to L3. |
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| 367 | */ |
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| 368 | leal (PROC0_PML4_OFF)(%esi),%ebx |
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| 369 | leal (PROC0_PTP3_OFF)(%esi),%eax |
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| 370 | orl $(PG_V|PG_KW),%eax |
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| 371 | movl $NKL4_KIMG_ENTRIES,%ecx |
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| 372 | fillkpt |
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| 373 | |
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| 374 | /* Set up L4 entries for actual kernel mapping */ |
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| 375 | leal (PROC0_PML4_OFF + L4_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx |
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| 376 | leal (PROC0_PTP3_OFF)(%esi),%eax |
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| 377 | orl $(PG_V|PG_KW),%eax |
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| 378 | movl $NKL4_KIMG_ENTRIES,%ecx |
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| 379 | fillkpt |
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| 380 | |
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| 381 | /* Install recursive top level PDE (one entry) */ |
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| 382 | leal (PROC0_PML4_OFF + PDIR_SLOT_PTE * PDE_SIZE)(%esi),%ebx |
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| 383 | leal (PROC0_PML4_OFF)(%esi),%eax |
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| 384 | orl $(PG_V|PG_KW),%eax |
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| 385 | movl $1,%ecx |
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| 386 | fillkpt_nox |
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| 387 | |
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| 388 | /* |
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| 389 | * Startup checklist: |
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| 390 | * 1. Enable PAE (and SSE while here). |
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| 391 | */ |
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| 392 | movl %cr4,%eax |
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[29] | 393 | orl $(CR4_PAE|CR4_OSFXSR|CR4_OSXMMEXCPT|CR4_PGE),%eax |
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[25] | 394 | movl %eax,%cr4 |
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| 395 | |
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| 396 | /* |
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| 397 | * 2. Set Long Mode Enable in EFER. Also enable the syscall extensions, |
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| 398 | * and NOX. |
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| 399 | */ |
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| 400 | movl $MSR_EFER,%ecx |
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| 401 | rdmsr |
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| 402 | xorl %eax,%eax /* XXX */ |
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| 403 | orl $(EFER_LME|EFER_SCE|EFER_NXE),%eax |
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| 404 | wrmsr |
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| 405 | |
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| 406 | /* |
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| 407 | * 3. Load %cr3 with pointer to PML4. |
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| 408 | */ |
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| 409 | movl %esi,%eax |
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| 410 | movl %eax,%cr3 |
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| 411 | |
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| 412 | /* |
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| 413 | * 4. Enable paging and the rest of it. |
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| 414 | */ |
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| 415 | movl %cr0,%eax |
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| 416 | orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax |
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[243] | 417 | andl $~(CR0_CD|CR0_NW),%eax |
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[368] | 418 | orl $(CR0_EM),%eax /* FPU not implemented yet */ |
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[25] | 419 | movl %eax,%cr0 |
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| 420 | jmp compat |
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| 421 | compat: |
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| 422 | |
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| 423 | /* |
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| 424 | * 5. Not quite done yet, we're now in a compatibility segment, in |
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| 425 | * legacy mode. We must jump to a long mode segment. Need to set up |
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| 426 | * a temporary GDT with a long mode segment in it to do that. |
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| 427 | */ |
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| 428 | movl $RELOC(gdt64_lo),%eax |
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| 429 | lgdt (%eax) |
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| 430 | movl $RELOC(farjmp64),%eax |
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| 431 | ljmp *(%eax) |
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| 432 | |
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| 433 | .code64 |
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| 434 | longmode: |
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| 435 | /* |
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| 436 | * 6. Finally, we're in long mode. However, we're still in the identity |
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| 437 | * mapped area (could not jump out of that earlier because it would |
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| 438 | * have been a > 32bit jump). We can do that now, so here we go. |
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| 439 | */ |
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| 440 | movabsq $longmode_hi,%rax |
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[29] | 441 | jmp *%rax |
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[25] | 442 | |
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| 443 | longmode_hi: |
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| 444 | /* |
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| 445 | * We left the identity mapped area. Base address of |
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| 446 | * the temporary gdt64 should now be in high memory. |
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| 447 | */ |
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| 448 | movq $RELOC(gdt64_hi),%rax |
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| 449 | lgdt (%rax) |
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| 450 | |
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| 451 | /* |
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| 452 | * We have arrived. There's no need anymore for the identity mapping in |
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| 453 | * low memory, remove it. |
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| 454 | */ |
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| 455 | movq $KERNBASE,%r8 |
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| 456 | |
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[29] | 457 | #if L2_SLOT_KERNBASE > 0 |
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| 458 | movq $(NKL2_KIMG_ENTRIES+1),%rcx |
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| 459 | leaq (PROC0_PTP2_OFF)(%rsi),%rbx /* old, phys address */ |
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| 460 | addq %r8,%rbx /* new, virt address */ |
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| 461 | killkpt |
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| 462 | #endif |
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[25] | 463 | |
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[29] | 464 | #if L3_SLOT_KERNBASE > 0 |
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| 465 | movq $NKL3_KIMG_ENTRIES,%rcx |
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| 466 | leaq (PROC0_PTP3_OFF)(%rsi),%rbx /* old, phys address */ |
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| 467 | addq %r8,%rbx /* new, virt address */ |
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| 468 | killkpt |
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| 469 | #endif |
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[25] | 470 | |
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[29] | 471 | movq $NKL4_KIMG_ENTRIES,%rcx |
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| 472 | leaq (PROC0_PML4_OFF)(%rsi),%rbx /* old, phys address of PML4 */ |
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| 473 | addq %r8,%rbx /* new, virt address of PML4 */ |
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| 474 | killkpt |
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[25] | 475 | |
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[32] | 476 | /* Save the virtual address of ISA I/O MEM. */ |
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[29] | 477 | movq $(TABLESIZE+KERNBASE),%rdx |
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| 478 | addq %rsi,%rdx |
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| 479 | movq %rdx,iom_base(%rip) |
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[25] | 480 | |
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[29] | 481 | /* Set up bootstrap stack. */ |
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| 482 | leaq (PROC0_STK_OFF)(%rsi),%rax |
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| 483 | addq %r8,%rax |
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| 484 | leaq (STKSIZE)(%rax),%rsp |
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| 485 | xorq %rbp,%rbp /* mark end of frames */ |
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| 486 | |
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| 487 | xorw %ax,%ax |
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| 488 | movw %ax,%gs |
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| 489 | movw %ax,%fs |
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| 490 | |
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| 491 | /* The first physical page available. */ |
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| 492 | leaq (TABLESIZE)(%rsi),%rdi |
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| 493 | |
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| 494 | call init_x86_64 |
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| 495 | |
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