| 1 | /* |
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| 2 | * hal_cpu.S - Miscellaneous CPU functions |
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| 3 | * |
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| 4 | * Copyright (c) 2017 Maxime Villard |
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| 5 | * |
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| 6 | * This file is part of ALMOS-MKH. |
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| 7 | * |
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| 8 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 9 | * under the terms of the GNU General Public License as published by |
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| 10 | * the Free Software Foundation; version 2.0 of the License. |
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| 11 | * |
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| 12 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 15 | * General Public License for more details. |
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| 16 | * |
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| 17 | * You should have received a copy of the GNU General Public License |
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| 18 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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| 19 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 20 | */ |
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| 21 | |
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| 22 | #define x86_ASM |
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| 23 | #include <hal_boot.h> |
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| 24 | #include <hal_segmentation.h> |
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| 25 | #include <hal_register.h> |
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| 26 | |
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| 27 | ASM_ENTRY(lgdt) |
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| 28 | lgdt (%rdi) |
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| 29 | /* Reload the prefetch queue */ |
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| 30 | jmp 1f |
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| 31 | nop |
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| 32 | 1: /* Reload stale selectors */ |
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| 33 | movl $GDT_FIXED_SEL(GDT_KDATA_SEL, SEL_KPL),%eax |
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| 34 | movl %eax,%ds |
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| 35 | movl %eax,%es |
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| 36 | movl %eax,%ss |
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| 37 | ret |
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| 38 | |
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| 39 | ASM_ENTRY(lidt) |
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| 40 | lidt (%rdi) |
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| 41 | ret |
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| 42 | |
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| 43 | ASM_ENTRY(ltr) |
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| 44 | ltr %di |
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| 45 | ret |
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| 46 | |
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| 47 | ASM_ENTRY(invlpg) |
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| 48 | invlpg (%rdi) |
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| 49 | ret |
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| 50 | |
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| 51 | ASM_ENTRY(sti) |
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| 52 | sti |
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| 53 | ret |
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| 54 | |
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| 55 | ASM_ENTRY(cli) |
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| 56 | cli |
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| 57 | ret |
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| 58 | |
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| 59 | ASM_ENTRY(rdtsc) |
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| 60 | xorq %rax,%rax |
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| 61 | rdtsc |
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| 62 | shlq $32,%rdx |
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| 63 | orq %rdx,%rax |
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| 64 | ret |
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| 65 | |
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| 66 | ASM_ENTRY(in8) |
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| 67 | movq %rdi,%rdx |
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| 68 | xorq %rax,%rax |
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| 69 | inb %dx,%al |
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| 70 | ret |
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| 71 | |
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| 72 | ASM_ENTRY(in16) |
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| 73 | movq %rdi,%rdx |
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| 74 | xorq %rax,%rax |
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| 75 | inw %dx,%ax |
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| 76 | ret |
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| 77 | |
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| 78 | ASM_ENTRY(out8) |
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| 79 | movq %rdi,%rdx |
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| 80 | movq %rsi,%rax |
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| 81 | outb %al,%dx |
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| 82 | ret |
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| 83 | |
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| 84 | ASM_ENTRY(out16) |
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| 85 | movq %rdi,%rdx |
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| 86 | movq %rsi,%rax |
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| 87 | outw %ax,%dx |
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| 88 | ret |
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| 89 | |
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| 90 | ASM_ENTRY(rdmsr) |
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| 91 | movq %rdi,%rcx |
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| 92 | xorq %rax,%rax |
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| 93 | rdmsr |
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| 94 | shlq $32,%rdx |
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| 95 | orq %rdx,%rax |
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| 96 | ret |
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| 97 | |
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| 98 | ASM_ENTRY(wrmsr) |
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| 99 | movq %rdi,%rcx |
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| 100 | movq %rsi,%rax |
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| 101 | movq %rsi,%rdx |
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| 102 | shrq $32,%rdx |
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| 103 | wrmsr |
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| 104 | ret |
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| 105 | |
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| 106 | ASM_ENTRY(mfence) |
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| 107 | mfence |
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| 108 | ret |
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| 109 | |
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| 110 | ASM_ENTRY(rcr0) |
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| 111 | movq %cr0,%rax |
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| 112 | ret |
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| 113 | |
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| 114 | ASM_ENTRY(rcr2) |
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| 115 | movq %cr2,%rax |
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| 116 | ret |
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| 117 | |
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| 118 | ASM_ENTRY(rcr3) |
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| 119 | movq %cr3,%rax |
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| 120 | ret |
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| 121 | |
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| 122 | ASM_ENTRY(rcr4) |
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| 123 | movq %cr4,%rax |
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| 124 | ret |
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| 125 | |
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| 126 | ASM_ENTRY(lcr4) |
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| 127 | movq %rdi,%cr4 |
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| 128 | ret |
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| 129 | |
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| 130 | ASM_ENTRY(cpuid) |
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| 131 | movq %rbx,%r8 |
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| 132 | movq %rdi,%rax |
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| 133 | movq %rsi,%rcx |
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| 134 | movq %rdx,%rsi |
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| 135 | cpuid |
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| 136 | movl %eax,0(%rsi) |
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| 137 | movl %ebx,4(%rsi) |
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| 138 | movl %ecx,8(%rsi) |
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| 139 | movl %edx,12(%rsi) |
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| 140 | movq %r8,%rbx |
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| 141 | ret |
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| 142 | |
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| 143 | /* |
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| 144 | * To flush all TLB entries, we must re-set the CR4_PGE flag in %cr4. |
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| 145 | */ |
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| 146 | ASM_ENTRY(tlbflushg) |
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| 147 | movq %cr4,%rax |
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| 148 | movq %rax,%rdx |
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| 149 | andq $~CR4_PGE,%rdx |
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| 150 | movq %rdx,%cr4 |
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| 151 | movq %rax,%cr4 |
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| 152 | ret |
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| 153 | |
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| 154 | ASM_ENTRY(tlbflush) |
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| 155 | movq %cr3,%rax |
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| 156 | movq %rax,%cr3 |
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| 157 | ret |
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| 158 | |
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| 159 | ASM_ENTRY(x86_stop) /* debug only */ |
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| 160 | int $0x0b |
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| 161 | ret |
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| 162 | |
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| 163 | ASM_ENTRY(pause) |
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| 164 | pause |
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| 165 | ret |
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| 166 | |
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| 167 | ASM_ENTRY(wbinvd) |
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| 168 | wbinvd |
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| 169 | ret |
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| 170 | |
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| 171 | /* -------------------------------------------------------------------------- */ |
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| 172 | |
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| 173 | ASM_ENTRY(atomic_cas_32) |
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| 174 | movl %esi,%eax |
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| 175 | lock |
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| 176 | cmpxchgl %edx,(%rdi) |
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| 177 | /* %eax now contains the old value */ |
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| 178 | ret |
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| 179 | |
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| 180 | ASM_ENTRY(atomic_add_32) |
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| 181 | movl %esi,%eax |
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| 182 | lock |
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| 183 | xaddl %eax,(%rdi) |
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| 184 | /* %eax now contains the old value */ |
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| 185 | ret |
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| 186 | |
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| 187 | ASM_ENTRY(atomic_and_32) |
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| 188 | movl (%rdi),%eax |
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| 189 | 1: |
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| 190 | movl %eax,%ecx |
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| 191 | andl %esi,%ecx |
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| 192 | lock |
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| 193 | cmpxchgl %ecx,(%rdi) |
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| 194 | jnz 1b |
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| 195 | /* %eax now contains the old value */ |
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| 196 | ret |
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| 197 | |
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| 198 | ASM_ENTRY(atomic_or_32) |
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| 199 | movl (%rdi),%eax |
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| 200 | 1: |
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| 201 | movl %eax,%ecx |
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| 202 | orl %esi,%ecx |
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| 203 | lock |
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| 204 | cmpxchgl %ecx,(%rdi) |
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| 205 | jnz 1b |
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| 206 | /* %eax now contains the old value */ |
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| 207 | ret |
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| 208 | |
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