1 | /* |
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2 | * hal_gpt.c - implementation of the Generic Page Table API for x86_64 |
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3 | * |
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4 | * Copyright (c) 2017 Maxime Villard |
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5 | * |
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6 | * This file is part of ALMOS-MKH. |
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7 | * |
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8 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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9 | * under the terms of the GNU General Public License as published by |
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10 | * the Free Software Foundation; version 2.0 of the License. |
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11 | * |
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12 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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15 | * General Public License for more details. |
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16 | * |
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17 | * You should have received a copy of the GNU General Public License |
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18 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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19 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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20 | */ |
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21 | |
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22 | #include <hal_kernel_types.h> |
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23 | #include <hal_boot.h> /* XXX */ |
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24 | #include <hal_gpt.h> |
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25 | #include <hal_special.h> |
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26 | #include <hal_internal.h> |
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27 | |
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28 | #include <printk.h> |
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29 | #include <bits.h> |
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30 | #include <string.h> |
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31 | #include <process.h> |
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32 | #include <kmem.h> |
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33 | #include <thread.h> |
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34 | #include <cluster.h> |
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35 | #include <ppm.h> |
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36 | #include <page.h> |
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37 | |
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38 | extern vaddr_t __kernel_end; |
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39 | size_t kimg_size __in_kdata = 0; |
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40 | |
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41 | paddr_t pa_avail __in_kdata = 0; |
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42 | vaddr_t va_avail __in_kdata = 0; |
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43 | vaddr_t tmpva __in_kdata = (KERNBASE + NKL2_KIMG_ENTRIES * NBPD_L2); |
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44 | |
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45 | paddr_t hal_gpt_bootstrap_palloc(size_t npages) |
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46 | { |
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47 | paddr_t pa = pa_avail; |
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48 | pa_avail += npages * PAGE_SIZE; |
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49 | return pa; |
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50 | } |
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51 | |
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52 | vaddr_t hal_gpt_bootstrap_valloc(size_t npages) |
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53 | { |
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54 | vaddr_t va = va_avail; |
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55 | va_avail += npages * PAGE_SIZE; |
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56 | return va; |
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57 | } |
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58 | |
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59 | /* |
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60 | * Reset the bootstrap VA we've used in cluster0 so far. After this |
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61 | * function, cluster0's heap is empty. |
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62 | */ |
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63 | void hal_gpt_bootstrap_reset( void ) |
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64 | { |
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65 | /* |
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66 | * Re-enter cluster0's space, because we altered it when mapping the ACPI |
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67 | * tables. |
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68 | */ |
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69 | hal_gpt_enter_range(CLUSTER_MIN_VA(0), 0, CLUSTER_PA_SIZE / PAGE_SIZE); |
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70 | hal_gpt_leave_range(CLUSTER_MIN_VA(0), (KERNTEXTOFF - KERNBASE) / PAGE_SIZE); |
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71 | |
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72 | va_avail = CLUSTER_MIN_VA(0) + KERNEL_VA_SIZE; |
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73 | } |
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74 | |
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75 | /* |
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76 | * Uniformize the PA and VA offsets, and return the value. After this function, |
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77 | * we are guaranteed to have [VA = PA + constant_offset]. And therefore we can |
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78 | * only call hal_gpt_bootstrap_valloc, without entering it in a PA. |
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79 | */ |
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80 | size_t hal_gpt_bootstrap_uniformize( void ) |
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81 | { |
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82 | size_t pa_offset = pa_avail - 0; |
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83 | size_t va_offset = va_avail - CLUSTER_MIN_VA(0); |
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84 | |
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85 | if (pa_offset < va_offset) |
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86 | pa_avail += (va_offset - pa_offset); |
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87 | else if (pa_offset > va_offset) |
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88 | va_avail += (pa_offset - va_offset); |
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89 | |
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90 | return MAX(pa_offset, va_offset); |
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91 | } |
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92 | |
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93 | void hal_gpt_enter(vaddr_t va, paddr_t pa, pt_entry_t flags) |
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94 | { |
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95 | XASSERT(va % PAGE_SIZE == 0); |
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96 | XASSERT(pa % PAGE_SIZE == 0); |
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97 | //XASSERT(va == tmpva || PTE_BASE[pl1_i(va)] == 0); |
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98 | PTE_BASE[pl1_i(va)] = (pa & PG_FRAME) | flags; |
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99 | invlpg(va); |
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100 | } |
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101 | |
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102 | void hal_gpt_enter_range(vaddr_t va, paddr_t pa, size_t n) |
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103 | { |
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104 | pt_entry_t flags = PG_V | PG_KW | PG_NX; |
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105 | size_t i; |
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106 | for (i = 0; i < n; i++) { |
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107 | hal_gpt_enter(va + i * PAGE_SIZE, pa + i * PAGE_SIZE, flags); |
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108 | } |
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109 | } |
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110 | |
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111 | void hal_gpt_leave(vaddr_t va) |
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112 | { |
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113 | XASSERT(va % PAGE_SIZE == 0); |
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114 | XASSERT(PTE_BASE[pl1_i(va)] != 0); |
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115 | PTE_BASE[pl1_i(va)] = 0; |
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116 | invlpg(va); |
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117 | } |
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118 | |
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119 | void hal_gpt_leave_range(vaddr_t va, size_t n) |
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120 | { |
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121 | size_t i; |
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122 | for (i = 0; i < n; i++) { |
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123 | hal_gpt_leave(va + i * PAGE_SIZE); |
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124 | } |
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125 | } |
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126 | |
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127 | /* |
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128 | * Create a page tree that can map va_start->va_end. The caller can then |
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129 | * enter these addresses to physical locations. |
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130 | * |
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131 | * This function is a bit complicated, and may need to be revisited. |
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132 | */ |
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133 | void hal_gpt_maptree_area(vaddr_t va_start, vaddr_t va_end) |
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134 | { |
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135 | pt_entry_t flags = PG_V | PG_KW | PG_NX; |
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136 | size_t L4start, L4end, nL4e; |
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137 | size_t L3start, L3end, nL3e; |
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138 | size_t L2start, L2end, nL2e; |
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139 | paddr_t L3page, L2page, L1page; |
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140 | paddr_t pa; |
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141 | size_t i, npa; |
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142 | pt_entry_t *pde; |
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143 | |
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144 | /* Allocate L3 */ |
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145 | L4start = pl4_i(va_start); |
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146 | L4end = pl4_i(va_end); |
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147 | nL4e = (L4end - L4start + 1); |
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148 | L3page = hal_gpt_bootstrap_palloc(nL4e); |
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149 | |
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150 | /* Allocate L2 */ |
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151 | L3start = pl3_i(va_start); |
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152 | L3end = pl3_i(va_end); |
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153 | nL3e = (L3end - L3start + 1); |
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154 | L2page = hal_gpt_bootstrap_palloc(nL3e); |
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155 | |
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156 | /* Allocate L1 */ |
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157 | L2start = pl2_i(va_start); |
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158 | L2end = pl2_i(va_end); |
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159 | nL2e = (L2end - L2start + 1); |
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160 | L1page = hal_gpt_bootstrap_palloc(nL2e); |
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161 | |
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162 | /* Zero out L1 */ |
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163 | for (i = 0; i < nL2e; i++) { |
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164 | pa = L1page + i * PAGE_SIZE; |
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165 | hal_gpt_enter(tmpva, pa, flags); |
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166 | |
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167 | memset((void *)tmpva, 0, PAGE_SIZE); |
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168 | } |
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169 | |
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170 | /* Zero out L2 */ |
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171 | for (i = 0; i < nL3e; i++) { |
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172 | pa = L2page + i * PAGE_SIZE; |
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173 | hal_gpt_enter(tmpva, pa, flags); |
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174 | |
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175 | memset((void *)tmpva, 0, PAGE_SIZE); |
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176 | } |
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177 | |
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178 | /* Zero out L3 */ |
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179 | for (i = 0; i < nL4e; i++) { |
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180 | pa = L3page + i * PAGE_SIZE; |
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181 | hal_gpt_enter(tmpva, pa, flags); |
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182 | |
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183 | memset((void *)tmpva, 0, PAGE_SIZE); |
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184 | } |
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185 | |
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186 | /* Create L2, linked to L1 */ |
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187 | npa = (L2start / NPDPG) * PAGE_SIZE; |
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188 | for (i = L2start; i <= L2end; i++) { |
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189 | pa = (paddr_t)&(((pt_entry_t *)L2page)[i]); |
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190 | pa -= npa; /* shift on the left */ |
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191 | pa &= PG_FRAME; /* rounddown to a page boundary */ |
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192 | hal_gpt_enter(tmpva, pa, flags); |
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193 | |
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194 | pde = (pt_entry_t *)tmpva; |
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195 | pa = L1page + (i - L2start) * PAGE_SIZE; |
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196 | pde[i % NPDPG] = (pa & PG_FRAME) | PG_V | PG_KW; |
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197 | } |
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198 | |
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199 | /* Create L3, linked to L2 */ |
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200 | npa = (L3start / NPDPG) * PAGE_SIZE; |
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201 | for (i = L3start; i <= L3end; i++) { |
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202 | pa = (paddr_t)&(((pt_entry_t *)L3page)[i]); |
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203 | pa -= npa; /* shift on the left */ |
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204 | pa &= PG_FRAME; /* rounddown to a page boundary */ |
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205 | hal_gpt_enter(tmpva, pa, flags); |
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206 | |
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207 | pde = (pt_entry_t *)tmpva; |
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208 | pa = L2page + (i - L3start) * PAGE_SIZE; |
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209 | pde[i % NPDPG] = (pa & PG_FRAME) | PG_V | PG_KW; |
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210 | } |
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211 | |
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212 | /* Link L3 into L4 */ |
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213 | for (i = 0; i < nL4e; i++) { |
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214 | pa = L3page + i * PAGE_SIZE; |
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215 | L4_BASE[L4start + i] = (pa & PG_FRAME) | PG_V | PG_KW; |
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216 | } |
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217 | } |
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218 | |
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219 | void hal_gpt_init(paddr_t firstpa) |
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220 | { |
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221 | /* Initialize global values */ |
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222 | pa_avail = firstpa; |
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223 | va_avail = CLUSTER_MIN_VA(0) + KERNEL_VA_SIZE; |
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224 | kimg_size = ((uint64_t)&__kernel_end - KERNBASE); |
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225 | XASSERT(kimg_size % PAGE_SIZE == 0); |
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226 | |
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227 | /* |
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228 | * Create cluster0's page tree, enter the space, and unmap the area |
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229 | * below the kernel. |
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230 | */ |
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231 | hal_gpt_maptree_area(CLUSTER_MIN_VA(0), CLUSTER_MIN_VA(0) + CLUSTER_PA_SIZE); |
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232 | hal_gpt_enter_range(CLUSTER_MIN_VA(0), 0, CLUSTER_PA_SIZE / PAGE_SIZE); |
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233 | hal_gpt_leave_range(CLUSTER_MIN_VA(0), (KERNTEXTOFF - KERNBASE) / PAGE_SIZE); |
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234 | } |
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235 | |
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236 | /* -------------------------------------------------------------------------- */ |
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237 | |
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238 | static uint32_t hal_gpt_pte_to_attr(pt_entry_t *pte) |
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239 | { |
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240 | uint32_t attr = 0; |
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241 | |
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242 | if (*pte & PG_V) |
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243 | attr |= (GPT_MAPPED | GPT_READABLE); |
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244 | if (*pte & PG_RW) |
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245 | attr |= GPT_WRITABLE; |
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246 | if (!(*pte & PG_NX)) |
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247 | attr |= GPT_EXECUTABLE; |
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248 | if (*pte & PG_u) |
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249 | attr |= GPT_USER; |
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250 | if (!(*pte & PG_PS)) |
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251 | attr |= GPT_SMALL; |
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252 | |
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253 | return attr; |
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254 | } |
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255 | |
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256 | static pt_entry_t hal_gpt_attr_to_pte(uint32_t attr) |
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257 | { |
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258 | pt_entry_t pte = 0; |
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259 | |
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260 | if (attr & GPT_MAPPED) |
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261 | pte |= PG_V; |
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262 | if (attr & GPT_WRITABLE) |
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263 | pte |= PG_RW; |
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264 | if (!(attr & GPT_EXECUTABLE)) |
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265 | pte |= PG_NX; |
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266 | if (attr & GPT_USER) |
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267 | pte |= PG_u; |
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268 | |
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269 | return pte; |
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270 | } |
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271 | |
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272 | error_t hal_gpt_create(gpt_t *gpt) |
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273 | { |
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274 | page_t *page; |
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275 | xptr_t page_xp; |
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276 | |
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277 | /* check page size */ |
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278 | if (CONFIG_PPM_PAGE_SIZE != 4096) { |
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279 | panic("for x86, the page must be 4 Kbytes"); |
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280 | } |
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281 | |
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282 | /* allocate a physical page for L4 */ |
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283 | kmem_req_t req; |
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284 | req.type = KMEM_PAGE; |
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285 | req.size = 1; |
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286 | req.flags = AF_KERNEL | AF_ZERO; |
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287 | page = (page_t *)kmem_alloc(&req); |
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288 | |
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289 | if (page == NULL) { |
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290 | printk("\n[ERROR] in %s : cannot allocate physical memory for PT1\n", __FUNCTION__); |
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291 | return ENOMEM; |
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292 | } |
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293 | |
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294 | page_xp = XPTR(local_cxy, page); |
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295 | |
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296 | /* populate the kernel entries */ |
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297 | pt_entry_t *L4src, *L4dst; |
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298 | extern paddr_t L4paddr; // XXX XXX smp |
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299 | vaddr_t L4vaddr = L4paddr + KERNBASE; // XXX |
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300 | L4src = (pt_entry_t *)L4vaddr; |
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301 | L4dst = (pt_entry_t *)ppm_page2base(page_xp); |
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302 | memcpy(&L4dst[256], &L4src[256], 256 * sizeof(pt_entry_t)); |
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303 | L4dst[L4_SLOT_PTE] = (ppm_page2ppn(page_xp) << CONFIG_PPM_PAGE_SHIFT) | |
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304 | PG_V | PG_KW | PG_NX; |
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305 | |
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306 | /* initialize generic page table descriptor */ |
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307 | gpt->ptr = GET_PTR(ppm_page2base(page_xp)); |
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308 | gpt->ppn = ppm_page2ppn(page_xp); |
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309 | gpt->page = GET_PTR(page_xp); |
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310 | |
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311 | return 0; |
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312 | } |
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313 | |
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314 | void hal_gpt_destroy( gpt_t * gpt ) |
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315 | { |
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316 | x86_panic((char *)__func__); |
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317 | } |
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318 | |
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319 | void hal_gpt_print( gpt_t * gpt , pid_t pid ) |
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320 | { |
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321 | x86_panic((char *)__func__); |
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322 | } |
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323 | |
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324 | error_t hal_gpt_set_pte(gpt_t *gpt, vpn_t vpn, uint32_t attr, ppn_t ppn) |
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325 | { |
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326 | vaddr_t va = vpn << CONFIG_PPM_PAGE_SHIFT; |
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327 | paddr_t pa; |
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328 | kmem_req_t req; |
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329 | page_t *page; |
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330 | xptr_t page_xp; |
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331 | |
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332 | req.type = KMEM_PAGE; |
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333 | req.size = 0; |
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334 | req.flags = AF_KERNEL | AF_ZERO; |
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335 | |
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336 | if (!(attr & GPT_MAPPED)) |
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337 | x86_panic("hal_gpt_set_pte: unmapped!"); |
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338 | if (!(attr & GPT_USER)) |
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339 | x86_panic("hal_gpt_set_pte: kernel!"); |
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340 | if (!(attr & GPT_SMALL)) |
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341 | x86_panic("hal_gpt_set_pte: large!"); |
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342 | |
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343 | if (!(L4_BASE[pl4_i(va)] & PG_V)) { |
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344 | /* if L4 is not present, create it */ |
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345 | page = (page_t *)kmem_alloc(&req); |
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346 | if (page == NULL) { |
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347 | x86_panic("out of memory in hal_gpt_set_pte (L4)!"); |
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348 | return ENOMEM; |
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349 | } |
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350 | |
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351 | page_xp = XPTR(local_cxy, page); |
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352 | pa = (paddr_t)PADDR(local_cxy, ppm_page2base(page_xp)); |
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353 | |
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354 | L4_BASE[pl4_i(va)] = pa | PG_V | PG_u | PG_RW; |
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355 | |
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356 | } |
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357 | |
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358 | if (!(L3_BASE[pl3_i(va)] & PG_V)) { |
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359 | /* if L3 is not present, create it */ |
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360 | page = (page_t *)kmem_alloc(&req); |
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361 | if (page == NULL) { |
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362 | x86_panic("out of memory in hal_gpt_set_pte (L3)!"); |
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363 | return ENOMEM; |
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364 | } |
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365 | |
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366 | page_xp = XPTR(local_cxy, page); |
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367 | pa = (paddr_t)PADDR(local_cxy, ppm_page2base(page_xp)); |
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368 | |
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369 | L3_BASE[pl3_i(va)] = pa | PG_V | PG_u | PG_RW; |
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370 | } |
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371 | |
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372 | if (!(L2_BASE[pl2_i(va)] & PG_V)) { |
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373 | /* if L2 is not present, create it */ |
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374 | page = (page_t *)kmem_alloc(&req); |
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375 | if (page == NULL) { |
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376 | x86_panic("out of memory in hal_gpt_set_pte (L2)!"); |
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377 | return ENOMEM; |
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378 | } |
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379 | |
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380 | page_xp = XPTR(local_cxy, page); |
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381 | pa = (paddr_t)PADDR(local_cxy, ppm_page2base(page_xp)); |
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382 | |
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383 | L2_BASE[pl2_i(va)] = pa | PG_V | PG_u | PG_RW; |
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384 | } |
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385 | |
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386 | pa = ppn << CONFIG_PPM_PAGE_SHIFT; |
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387 | L1_BASE[pl1_i(va)] = pa | hal_gpt_attr_to_pte(attr); |
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388 | |
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389 | return 0; |
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390 | } |
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391 | |
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392 | void hal_gpt_get_pte(gpt_t *gpt, vpn_t vpn, uint32_t *attr, ppn_t *ppn) |
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393 | { |
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394 | vaddr_t va = vpn << CONFIG_PPM_PAGE_SHIFT; |
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395 | |
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396 | *attr = 0; |
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397 | if (!(L4_BASE[pl4_i(va)] & PG_V)) { |
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398 | return; |
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399 | } |
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400 | if (!(L3_BASE[pl3_i(va)] & PG_V)) { |
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401 | return; |
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402 | } |
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403 | if (!(L2_BASE[pl2_i(va)] & PG_V)) { |
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404 | return; |
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405 | } |
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406 | |
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407 | if (L2_BASE[pl2_i(va)] & PG_PS) { |
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408 | /* large page */ |
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409 | *attr = hal_gpt_pte_to_attr(&L2_BASE[pl2_i(va)]); |
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410 | *ppn = (L2_BASE[pl2_i(va)] & PG_2MFRAME) >> CONFIG_PPM_PAGE_SHIFT; |
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411 | } else { |
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412 | /* small page */ |
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413 | *attr = hal_gpt_pte_to_attr(&L1_BASE[pl1_i(va)]); |
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414 | *ppn = (L1_BASE[pl1_i(va)] & PG_FRAME) >> CONFIG_PPM_PAGE_SHIFT; |
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415 | } |
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416 | |
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417 | x86_panic((char *)__func__); |
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418 | } |
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419 | |
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420 | void hal_gpt_reset_pte( gpt_t * gpt, |
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421 | vpn_t vpn ) |
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422 | { |
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423 | x86_panic((char *)__func__); |
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424 | } |
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425 | |
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426 | error_t hal_gpt_lock_pte( gpt_t * gpt, |
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427 | vpn_t vpn ) |
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428 | { |
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429 | x86_panic((char *)__func__); |
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430 | return 0; |
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431 | } |
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432 | |
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433 | error_t hal_gpt_unlock_pte( gpt_t * gpt, |
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434 | vpn_t vpn ) |
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435 | { |
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436 | x86_panic((char *)__func__); |
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437 | return 0; |
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438 | } |
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439 | |
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440 | error_t hal_gpt_copy( gpt_t * dst_gpt, |
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441 | gpt_t * src_gpt, |
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442 | bool_t cow ) |
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443 | { |
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444 | x86_panic((char *)__func__); |
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445 | return 0; |
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446 | } |
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447 | |
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