1 | /* |
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2 | * hal_init.c - C initialization procedure for x86. |
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3 | * |
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4 | * Copyright (c) 2017 Maxime Villard |
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5 | * |
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6 | * This file is part of ALMOS-MKH. |
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7 | * |
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8 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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9 | * under the terms of the GNU General Public License as published by |
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10 | * the Free Software Foundation; version 2.0 of the License. |
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11 | * |
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12 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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15 | * General Public License for more details. |
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16 | * |
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17 | * You should have received a copy of the GNU General Public License |
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18 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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19 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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20 | */ |
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21 | |
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22 | #include <hal_types.h> |
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23 | #include <hal_boot.h> |
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24 | #include <hal_multiboot.h> |
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25 | #include <hal_segmentation.h> |
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26 | #include <hal_acpi.h> |
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27 | #include <hal_apic.h> |
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28 | #include <hal_internal.h> |
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29 | #include <hal_remote.h> |
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30 | #include <hal_irqmask.h> |
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31 | |
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32 | #include <memcpy.h> |
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33 | #include <thread.h> |
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34 | #include <string.h> |
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35 | #include <process.h> |
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36 | #include <printk.h> |
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37 | #include <vmm.h> |
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38 | #include <core.h> |
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39 | #include <cluster.h> |
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40 | #include <chdev.h> |
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41 | |
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42 | #include <boot_info.h> |
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43 | |
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44 | void kernel_init(boot_info_t *info); |
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45 | |
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46 | static void gdt_create(); |
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47 | static void idt_create(); |
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48 | void cpu_attach(); |
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49 | |
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50 | size_t mytest __in_kdata = 0; |
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51 | |
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52 | struct multiboot_info mb_info __in_kdata; |
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53 | char mb_loader_name[PAGE_SIZE] __in_kdata; |
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54 | uint8_t mb_mmap[PAGE_SIZE] __in_kdata; |
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55 | |
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56 | /* -------------------------------------------------------------------------- */ |
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57 | |
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58 | static void |
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59 | dump_memmap() |
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60 | { |
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61 | size_t mmap_length = mb_info.mi_mmap_length; |
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62 | uint8_t *mmap_addr = (uint8_t *)&mb_mmap; |
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63 | size_t i; |
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64 | |
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65 | if (!(mb_info.mi_flags & MULTIBOOT_INFO_HAS_MMAP)) |
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66 | x86_panic("No mmap"); |
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67 | |
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68 | i = 0; |
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69 | while (i < mmap_length) { |
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70 | struct multiboot_mmap *mm; |
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71 | |
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72 | mm = (struct multiboot_mmap *)(mmap_addr + i); |
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73 | |
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74 | x86_printf("-> [%Z, %Z] %s\n", mm->mm_base_addr, |
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75 | mm->mm_base_addr + mm->mm_length, |
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76 | (mm->mm_type == 1) ? "ram" : "rsv" ); |
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77 | |
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78 | i += mm->mm_size + 4; |
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79 | } |
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80 | } |
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81 | |
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82 | /* -------------------------------------------------------------------------- */ |
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83 | |
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84 | static void init_bootinfo_icu(boot_device_t *dev) |
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85 | { |
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86 | extern uint32_t hwi_baseidx; |
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87 | extern uint32_t wti_baseidx; |
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88 | extern uint32_t pti_baseidx; |
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89 | extern size_t ioapic_pins; |
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90 | |
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91 | memset(dev, 0, sizeof(boot_device_t)); |
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92 | |
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93 | dev->base = 0; |
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94 | dev->type = (DEV_FUNC_ICU << 16) | IMPL_ICU_XCU; |
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95 | dev->channels = 1; |
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96 | |
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97 | #if NOTYET |
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98 | /* |
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99 | * Give 20% of the pins to HWI, 80% to WTI. |
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100 | */ |
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101 | dev->param0 = (ioapic_pins * 20) / 100; /* hwi_nr */ |
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102 | dev->param1 = ioapic_pins - dev->param0; /* wti_nr */ |
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103 | #else |
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104 | dev->param0 = 1; /* hwi_nr */ |
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105 | dev->param1 = 1; /* wti_nr */ |
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106 | #endif |
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107 | |
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108 | /* |
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109 | * We always set 1 for pti_nr. On x86, timer interrupts are handled by |
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110 | * LAPIC, which is per-cpu and not global. Therefore, we always have one |
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111 | * timer for each CPU, and its IRQ number is faked to 0. |
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112 | */ |
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113 | dev->param2 = 1; /* pti_nr */ |
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114 | |
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115 | dev->param3 = 0; |
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116 | |
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117 | /* Set the base idx for the XCU driver */ |
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118 | hwi_baseidx = 0; |
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119 | wti_baseidx = dev->param0; |
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120 | pti_baseidx = 0xFFFFFFFF; |
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121 | |
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122 | #ifdef NOTYET |
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123 | uint32_t irqs; /*! number of input IRQs */ |
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124 | boot_irq_t irq[32]; /*! array of input IRQS (PIC and ICU only) */ |
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125 | #endif |
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126 | } |
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127 | |
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128 | static size_t init_bootinfo_pages_nr() |
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129 | { |
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130 | size_t mmap_length = mb_info.mi_mmap_length; |
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131 | uint8_t *mmap_addr = (uint8_t *)&mb_mmap; |
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132 | paddr_t maxpa, pa; |
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133 | size_t i; |
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134 | |
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135 | i = 0; |
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136 | maxpa = 0; |
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137 | while (i < mmap_length) { |
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138 | struct multiboot_mmap *mm; |
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139 | |
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140 | mm = (struct multiboot_mmap *)(mmap_addr + i); |
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141 | |
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142 | if (mm->mm_type == 1) { |
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143 | pa = mm->mm_base_addr + mm->mm_length; |
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144 | if (pa > maxpa) |
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145 | maxpa = pa; |
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146 | } |
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147 | |
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148 | i += mm->mm_size + 4; |
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149 | } |
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150 | |
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151 | return (maxpa / PAGE_SIZE); |
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152 | } |
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153 | |
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154 | static size_t init_bootinfo_rsvd(boot_rsvd_t *rsvd) |
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155 | { |
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156 | size_t mmap_length = mb_info.mi_mmap_length; |
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157 | uint8_t *mmap_addr = (uint8_t *)&mb_mmap; |
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158 | size_t i, rsvd_nr; |
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159 | |
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160 | memset(rsvd, 0, sizeof(boot_rsvd_t) * CONFIG_PPM_MAX_RSVD); |
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161 | |
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162 | i = 0, rsvd_nr = 0; |
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163 | while (i < mmap_length) { |
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164 | struct multiboot_mmap *mm; |
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165 | |
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166 | mm = (struct multiboot_mmap *)(mmap_addr + i); |
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167 | |
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168 | if (mm->mm_type != 1) { |
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169 | rsvd[rsvd_nr].first_page = |
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170 | rounddown(mm->mm_base_addr, PAGE_SIZE) / PAGE_SIZE; |
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171 | rsvd[rsvd_nr].npages = |
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172 | roundup(mm->mm_length, PAGE_SIZE) / PAGE_SIZE; |
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173 | rsvd_nr++; |
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174 | if (rsvd_nr == CONFIG_PPM_MAX_RSVD) |
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175 | x86_panic("too many memory holes"); |
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176 | } |
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177 | |
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178 | i += mm->mm_size + 4; |
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179 | } |
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180 | |
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181 | return rsvd_nr; |
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182 | } |
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183 | |
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184 | static void init_bootinfo_core(boot_core_t *core) |
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185 | { |
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186 | memset(core, 0, sizeof(boot_core_t)); |
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187 | |
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188 | core->gid = hal_lapic_gid(); |
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189 | core->lid = 0; |
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190 | core->cxy = 0; |
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191 | } |
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192 | |
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193 | static void init_bootinfo_txt(boot_device_t *dev) |
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194 | { |
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195 | memset(dev, 0, sizeof(boot_device_t)); |
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196 | |
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197 | dev->base = 0xB8000; |
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198 | dev->type = (DEV_FUNC_TXT << 16) | IMPL_TXT_X86; |
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199 | dev->channels = 1; |
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200 | dev->param0 = 0; |
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201 | dev->param1 = 0; |
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202 | dev->param2 = 0; |
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203 | dev->param3 = 0; |
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204 | |
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205 | #ifdef NOTYET |
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206 | uint32_t irqs; /*! number of input IRQs */ |
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207 | boot_irq_t irq[32]; /*! array of input IRQS (PIC and ICU only) */ |
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208 | #endif |
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209 | } |
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210 | |
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211 | static void init_bootinfo(boot_info_t *info) |
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212 | { |
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213 | size_t offset; |
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214 | |
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215 | extern uint64_t __kernel_data_start; |
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216 | extern uint64_t __kernel_end; |
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217 | |
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218 | memset(info, 0, sizeof(boot_info_t)); |
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219 | |
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220 | info->signature = 0; |
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221 | |
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222 | info->paddr_width = 0; |
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223 | info->x_width = 1; |
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224 | info->y_width = 1; |
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225 | info->x_size = 1; |
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226 | info->y_size = 1; |
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227 | info->io_cxy = 0; |
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228 | |
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229 | info->ext_dev_nr = 1; |
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230 | init_bootinfo_txt(&info->ext_dev[0]); |
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231 | |
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232 | info->cxy = 0; |
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233 | info->cores_nr = 1; |
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234 | init_bootinfo_core(&info->core[0]); |
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235 | |
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236 | info->rsvd_nr = init_bootinfo_rsvd((boot_rsvd_t *)&info->rsvd); |
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237 | |
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238 | init_bootinfo_icu(&info->dev_icu); |
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239 | /* TODO: dev_mmc */ |
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240 | /* TODO: dev_dma */ |
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241 | |
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242 | offset = hal_gpt_bootstrap_uniformize(); |
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243 | info->pages_offset = offset / PAGE_SIZE; |
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244 | info->pages_nr = init_bootinfo_pages_nr(); |
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245 | |
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246 | info->kernel_code_start = (intptr_t)(KERNTEXTOFF - KERNBASE); |
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247 | info->kernel_code_end = (intptr_t)(&__kernel_data_start - KERNBASE) - 1; |
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248 | info->kernel_data_start = (intptr_t)(&__kernel_data_start - KERNBASE); |
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249 | info->kernel_code_end = (intptr_t)(&__kernel_end - KERNBASE) - 1; |
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250 | } |
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251 | |
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252 | void init_x86_64(paddr_t firstpa) |
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253 | { |
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254 | boot_info_t btinfo; |
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255 | |
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256 | x86_printf("[+] init_x86_64 called\n"); |
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257 | |
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258 | /* Create the global structures */ |
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259 | gdt_create(); |
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260 | idt_create(); |
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261 | |
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262 | /* Attach cpu0 */ |
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263 | cpu_attach(); |
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264 | x86_printf("[+] cpu_attach called\n"); |
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265 | |
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266 | x86_printf("[+] bootloader: '%s'\n", mb_loader_name); |
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267 | |
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268 | dump_memmap(); |
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269 | x86_printf("[+] dump finished\n"); |
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270 | |
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271 | hal_gpt_init(firstpa); |
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272 | x86_printf("[+] hal_gpt_init called\n"); |
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273 | |
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274 | hal_acpi_init(); |
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275 | x86_printf("[+] hal_acpi_init called\n"); |
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276 | |
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277 | hal_gpt_bootstrap_reset(); |
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278 | x86_printf("[+] hal_gpt_bootstrap_reset called\n"); |
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279 | |
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280 | hal_apic_init(); |
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281 | x86_printf("[+] hal_apic_init called\n"); |
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282 | |
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283 | hal_tls_init_cpu0(); |
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284 | x86_printf("[+] hal_tls_init_cpu0 called\n"); |
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285 | |
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286 | x86_printf("-> mytest = %z\n", mytest); |
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287 | void *hoho = &init_x86_64; |
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288 | xptr_t myptr = XPTR(0, &mytest); |
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289 | |
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290 | hal_remote_spt(myptr, hoho); |
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291 | x86_printf("-> mytest = %Z\n", hal_remote_lpt(myptr)); |
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292 | |
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293 | init_bootinfo(&btinfo); |
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294 | |
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295 | reg_t dummy; |
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296 | hal_enable_irq(&dummy); |
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297 | |
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298 | while (1); |
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299 | |
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300 | kernel_init(&btinfo); |
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301 | |
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302 | x86_printf("[+] kernel_init called\n"); |
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303 | |
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304 | while (1); |
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305 | |
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306 | // void x86_stop(); |
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307 | // x86_stop(); |
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308 | } |
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309 | |
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310 | /* -------------------------------------------------------------------------- */ |
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311 | |
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312 | uint8_t gdtstore[PAGE_SIZE] __in_kdata; |
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313 | uint8_t idtstore[PAGE_SIZE] __in_kdata; |
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314 | struct tss cpu0_tss __in_kdata; |
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315 | uint8_t cpu0_intr_stack[STKSIZE] __in_kdata; |
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316 | uint8_t cpu0_dbfl_stack[STKSIZE] __in_kdata; |
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317 | uint8_t cpu0_nmfl_stack[STKSIZE] __in_kdata; |
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318 | |
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319 | static void |
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320 | setregion(struct region_descriptor *rd, void *base, uint16_t limit) |
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321 | { |
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322 | rd->rd_limit = limit; |
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323 | rd->rd_base = (uint64_t)base; |
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324 | } |
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325 | |
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326 | /* -------------------------------------------------------------------------- */ |
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327 | |
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328 | static void |
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329 | gdt_set_memseg(struct gdt_memseg *sd, void *base, size_t limit, |
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330 | int type, int dpl, int gran, int is64) |
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331 | { |
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332 | sd->sd_lolimit = (unsigned)limit; |
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333 | sd->sd_lobase = (unsigned long)base; |
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334 | sd->sd_type = type; |
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335 | sd->sd_dpl = dpl; |
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336 | sd->sd_p = 1; |
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337 | sd->sd_hilimit = (unsigned)limit >> 16; |
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338 | sd->sd_avl = 0; |
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339 | sd->sd_long = is64; |
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340 | sd->sd_def32 = 0; |
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341 | sd->sd_gran = gran; |
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342 | sd->sd_hibase = (unsigned long)base >> 24; |
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343 | } |
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344 | |
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345 | static void |
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346 | gdt_set_sysseg(struct gdt_sysseg *sd, void *base, size_t limit, |
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347 | int type, int dpl, int gran) |
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348 | { |
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349 | memset(sd, 0, sizeof *sd); |
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350 | sd->sd_lolimit = (unsigned)limit; |
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351 | sd->sd_lobase = (uint64_t)base; |
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352 | sd->sd_type = type; |
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353 | sd->sd_dpl = dpl; |
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354 | sd->sd_p = 1; |
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355 | sd->sd_hilimit = (unsigned)limit >> 16; |
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356 | sd->sd_gran = gran; |
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357 | sd->sd_hibase = (uint64_t)base >> 24; |
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358 | } |
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359 | |
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360 | static void gdt_create() |
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361 | { |
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362 | memset(&gdtstore, 0, PAGE_SIZE); |
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363 | |
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364 | /* Flat segments */ |
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365 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_KCODE_SEL), 0, |
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366 | 0xfffff, SDT_MEMERA, SEL_KPL, 1, 1); |
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367 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_KDATA_SEL), 0, |
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368 | 0xfffff, SDT_MEMRWA, SEL_KPL, 1, 1); |
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369 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_UCODE_SEL), 0, |
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370 | 0xfffff, SDT_MEMERA, SEL_UPL, 1, 1); |
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371 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_UDATA_SEL), 0, |
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372 | 0xfffff, SDT_MEMRWA, SEL_UPL, 1, 1); |
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373 | } |
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374 | |
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375 | void cpu_load_gdt() |
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376 | { |
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377 | struct region_descriptor region; |
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378 | setregion(®ion, &gdtstore, PAGE_SIZE - 1); |
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379 | lgdt(®ion); |
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380 | } |
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381 | |
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382 | /* -------------------------------------------------------------------------- */ |
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383 | |
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384 | static void |
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385 | idt_set_seg(struct idt_seg *seg, void *func, int ist, int type, int dpl, int sel) |
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386 | { |
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387 | seg->gd_looffset = (uint64_t)func & 0xffff; |
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388 | seg->gd_selector = sel; |
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389 | seg->gd_ist = ist; |
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390 | seg->gd_type = type; |
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391 | seg->gd_dpl = dpl; |
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392 | seg->gd_p = 1; |
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393 | seg->gd_hioffset = (uint64_t)func >> 16; |
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394 | seg->gd_zero = 0; |
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395 | seg->gd_xx1 = 0; |
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396 | seg->gd_xx2 = 0; |
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397 | seg->gd_xx3 = 0; |
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398 | } |
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399 | |
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400 | static void idt_create() |
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401 | { |
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402 | extern uint64_t x86_traps[], x86_intrs[], x86_rsvd; |
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403 | struct idt_seg *idt; |
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404 | size_t i; |
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405 | |
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406 | idt = (struct idt_seg *)&idtstore; |
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407 | |
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408 | /* First, put a dead entry */ |
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409 | for (i = 0; i < NIDT; i++) { |
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410 | idt_set_seg(&idt[i], (void *)&x86_rsvd, 0, |
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411 | SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); |
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412 | } |
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413 | |
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414 | /* General exceptions */ |
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415 | for (i = CPUVEC_MIN; i < CPUVEC_MAX; i++) { |
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416 | idt_set_seg(&idt[i], (void *)x86_traps[i - CPUVEC_MIN], 0, |
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417 | SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); |
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418 | } |
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419 | |
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420 | /* Dynamically configured interrupts */ |
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421 | for (i = DYNVEC_MIN; i < DYNVEC_MAX; i++) { |
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422 | idt_set_seg(&idt[i], (void *)x86_intrs[i - DYNVEC_MIN], 0, |
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423 | SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); |
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424 | } |
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425 | } |
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426 | |
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427 | void cpu_load_idt() |
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428 | { |
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429 | struct region_descriptor region; |
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430 | setregion(®ion, &idtstore, PAGE_SIZE - 1); |
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431 | lidt(®ion); |
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432 | } |
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433 | |
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434 | /* -------------------------------------------------------------------------- */ |
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435 | |
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436 | /* |
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437 | * The gdt bitmap must be per-cluster. |
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438 | */ |
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439 | int tss_alloc(struct tss *tss) |
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440 | { |
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441 | int slot; |
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442 | |
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443 | /* Once we have proper SMP support, we will change that */ |
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444 | slot = GDT_CPU0TSS_SEL; |
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445 | |
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446 | gdt_set_sysseg(GDT_ADDR_SYS(gdtstore, slot), tss, |
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447 | sizeof(*tss) - 1, SDT_SYS386TSS, SEL_KPL, 0); |
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448 | |
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449 | return GDT_DYNAM_SEL(slot, SEL_KPL); |
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450 | } |
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451 | |
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452 | void cpu_create_tss() |
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453 | { |
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454 | struct tss *tss = &cpu0_tss; |
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455 | int sel; |
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456 | |
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457 | /* Create the tss */ |
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458 | memset(tss, 0, sizeof(*tss)); |
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459 | tss->tss_iobase = IOMAP_INVALOFF << 16; |
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460 | tss->tss_ist[0] = (uint64_t)cpu0_intr_stack + STKSIZE; |
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461 | tss->tss_ist[1] = (uint64_t)cpu0_dbfl_stack + STKSIZE; |
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462 | tss->tss_ist[2] = (uint64_t)cpu0_nmfl_stack + STKSIZE; |
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463 | sel = tss_alloc(tss); |
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464 | |
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465 | /* Load it */ |
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466 | ltr(sel); |
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467 | } |
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468 | |
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469 | /* -------------------------------------------------------------------------- */ |
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470 | |
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471 | void cpu_attach() |
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472 | { |
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473 | cpu_load_gdt(); |
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474 | cpu_load_idt(); |
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475 | cpu_create_tss(); |
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476 | } |
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477 | |
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