| 1 | /* |
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| 2 | * hal_kentry.h - General values used in the different kernel entries |
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| 3 | * |
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| 4 | * Copyright (c) 2017 Maxime Villard |
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| 5 | * |
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| 6 | * This file is part of ALMOS-MKH. |
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| 7 | * |
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| 8 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 9 | * under the terms of the GNU General Public License as published by |
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| 10 | * the Free Software Foundation; version 2.0 of the License. |
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| 11 | * |
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| 12 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 15 | * General Public License for more details. |
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| 16 | * |
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| 17 | * You should have received a copy of the GNU General Public License |
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| 18 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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| 19 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 20 | */ |
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| 21 | |
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| 22 | #define T_PRIVINFLT 0 /* privileged instruction */ |
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| 23 | #define T_BPTFLT 1 /* breakpoint trap */ |
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| 24 | #define T_ARITHTRAP 2 /* arithmetic trap */ |
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| 25 | #define T_ASTFLT 3 /* asynchronous system trap */ |
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| 26 | #define T_PROTFLT 4 /* protection fault */ |
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| 27 | #define T_TRCTRAP 5 /* trace trap */ |
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| 28 | #define T_PAGEFLT 6 /* page fault */ |
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| 29 | #define T_ALIGNFLT 7 /* alignment fault */ |
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| 30 | #define T_DIVIDE 8 /* integer divide fault */ |
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| 31 | #define T_NMI 9 /* non-maskable interrupt */ |
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| 32 | #define T_OFLOW 10 /* overflow trap */ |
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| 33 | #define T_BOUND 11 /* bounds check fault */ |
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| 34 | #define T_DNA 12 /* device not available fault */ |
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| 35 | #define T_DOUBLEFLT 13 /* double fault */ |
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| 36 | #define T_FPOPFLT 14 /* fp coprocessor operand fetch fault */ |
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| 37 | #define T_TSSFLT 15 /* invalid tss fault */ |
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| 38 | #define T_SEGNPFLT 16 /* segment not present fault */ |
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| 39 | #define T_STKFLT 17 /* stack fault */ |
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| 40 | #define T_MCA 18 /* machine check */ |
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| 41 | #define T_XMM 19 /* SSE FP exception */ |
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| 42 | #define T_RESERVED 20 /* reserved fault base */ |
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| 43 | |
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| 44 | /* Trap's coming from user mode */ |
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| 45 | #define T_USER 0x100 |
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| 46 | |
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| 47 | #define CPUVAR(off) %gs:CPU_INFO_ ## off |
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| 48 | |
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| 49 | #define TF_REGSIZE (19 * 8) |
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| 50 | |
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| 51 | #define PSL_I 0x00000200 |
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| 52 | #define PSL_MBO 0x00000002 |
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| 53 | #define PSL_USERSET (PSL_MBO | PSL_I) |
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| 54 | |
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| 55 | #define INTR_SAVE_REGS \ |
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| 56 | subq $TF_REGSIZE,%rsp ; \ |
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| 57 | movq %rax,TF_RAX(%rsp) ; \ |
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| 58 | movq %rbx,TF_RBX(%rsp) ; \ |
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| 59 | movq %rcx,TF_RCX(%rsp) ; \ |
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| 60 | movq %rdx,TF_RDX(%rsp) ; \ |
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| 61 | movq %rbp,TF_RBP(%rsp) ; \ |
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| 62 | movq %rdi,TF_RDI(%rsp) ; \ |
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| 63 | movq %rsi,TF_RSI(%rsp) ; \ |
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| 64 | movq %r8,TF_R8(%rsp) ; \ |
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| 65 | movq %r9,TF_R9(%rsp) ; \ |
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| 66 | movq %r10,TF_R10(%rsp) ; \ |
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| 67 | movq %r11,TF_R11(%rsp) ; \ |
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| 68 | movq %r12,TF_R12(%rsp) ; \ |
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| 69 | movq %r13,TF_R13(%rsp) ; \ |
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| 70 | movq %r14,TF_R14(%rsp) ; \ |
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| 71 | movq %r15,TF_R15(%rsp) ; \ |
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| 72 | /* movw %gs,TF_GS(%rsp) */ ; \ |
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| 73 | movw %fs,TF_FS(%rsp) ; \ |
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| 74 | movw %es,TF_ES(%rsp) ; \ |
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| 75 | movw %ds,TF_DS(%rsp) ; \ |
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| 76 | cld |
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| 77 | |
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| 78 | #define INTR_RESTORE_REGS \ |
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| 79 | movq TF_RAX(%rsp),%rax ; \ |
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| 80 | movq TF_RBX(%rsp),%rbx ; \ |
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| 81 | movq TF_RCX(%rsp),%rcx ; \ |
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| 82 | movq TF_RDX(%rsp),%rdx ; \ |
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| 83 | movq TF_RBP(%rsp),%rbp ; \ |
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| 84 | movq TF_RDI(%rsp),%rdi ; \ |
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| 85 | movq TF_RSI(%rsp),%rsi ; \ |
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| 86 | movq TF_R8(%rsp),%r8 ; \ |
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| 87 | movq TF_R9(%rsp),%r9 ; \ |
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| 88 | movq TF_R10(%rsp),%r10 ; \ |
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| 89 | movq TF_R11(%rsp),%r11 ; \ |
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| 90 | movq TF_R12(%rsp),%r12 ; \ |
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| 91 | movq TF_R13(%rsp),%r13 ; \ |
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| 92 | movq TF_R14(%rsp),%r14 ; \ |
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| 93 | movq TF_R15(%rsp),%r15 ; \ |
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| 94 | /* movw TF_GS(%rsp),%gs */ ; \ |
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| 95 | movw TF_FS(%rsp),%fs ; \ |
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| 96 | movw TF_ES(%rsp),%es ; \ |
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| 97 | movw TF_DS(%rsp),%ds ; \ |
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| 98 | addq $TF_REGSIZE,%rsp ; \ |
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| 99 | cld |
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| 100 | |
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| 101 | #ifndef x86_ASM |
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| 102 | |
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| 103 | /* |
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| 104 | * The x86_64 CPU context. |
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| 105 | */ |
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| 106 | typedef struct hal_cpu_context_s { |
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| 107 | /* Pushed by INTR_SAVE_REGS */ |
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| 108 | uint64_t tf_rax; |
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| 109 | uint64_t tf_rbx; |
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| 110 | uint64_t tf_rcx; |
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| 111 | uint64_t tf_rdx; |
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| 112 | uint64_t tf_rdi; |
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| 113 | uint64_t tf_rsi; |
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| 114 | uint64_t tf_rbp; |
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| 115 | uint64_t tf_r8; |
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| 116 | uint64_t tf_r9; |
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| 117 | uint64_t tf_r10; |
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| 118 | uint64_t tf_r11; |
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| 119 | uint64_t tf_r12; |
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| 120 | uint64_t tf_r13; |
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| 121 | uint64_t tf_r14; |
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| 122 | uint64_t tf_r15; |
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| 123 | uint64_t tf_gs; |
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| 124 | uint64_t tf_fs; |
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| 125 | uint64_t tf_es; |
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| 126 | uint64_t tf_ds; |
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| 127 | |
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| 128 | /* Pushed by the ISR */ |
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| 129 | uint64_t tf_trapno; |
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| 130 | |
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| 131 | /* Pushed by the hardware if exception */ |
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| 132 | uint64_t tf_err; /* in fact, this one may not... */ |
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| 133 | uint64_t tf_rip; |
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| 134 | uint64_t tf_cs; |
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| 135 | uint64_t tf_rflags; |
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| 136 | |
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| 137 | /* Always pushed by the hardware */ |
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| 138 | uint64_t tf_rsp; |
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| 139 | uint64_t tf_ss; |
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| 140 | } hal_cpu_context_t; |
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| 141 | |
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| 142 | #else |
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| 143 | |
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| 144 | /* offsets in the trapframe structure */ |
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| 145 | #define TF_RAX 0 |
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| 146 | #define TF_RBX 8 |
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| 147 | #define TF_RCX 16 |
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| 148 | #define TF_RDX 24 |
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| 149 | #define TF_RDI 32 |
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| 150 | #define TF_RSI 40 |
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| 151 | #define TF_RBP 48 |
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| 152 | #define TF_R8 56 |
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| 153 | #define TF_R9 64 |
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| 154 | #define TF_R10 72 |
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| 155 | #define TF_R11 80 |
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| 156 | #define TF_R12 88 |
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| 157 | #define TF_R13 96 |
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| 158 | #define TF_R14 104 |
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| 159 | #define TF_R15 112 |
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| 160 | #define TF_GS 120 |
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| 161 | #define TF_FS 128 |
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| 162 | #define TF_ES 136 |
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| 163 | #define TF_DS 144 |
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| 164 | |
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| 165 | #endif |
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| 166 | |
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