1 | /* |
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2 | * hal_segmentation.h - Segmentation-related values and structures |
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3 | * |
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4 | * Copyright (c) 2017 Maxime Villard |
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5 | * |
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6 | * This file is part of ALMOS-MKH. |
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7 | * |
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8 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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9 | * under the terms of the GNU General Public License as published by |
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10 | * the Free Software Foundation; version 2.0 of the License. |
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11 | * |
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12 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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15 | * General Public License for more details. |
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16 | * |
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17 | * You should have received a copy of the GNU General Public License |
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18 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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19 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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20 | */ |
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21 | |
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22 | /* |
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23 | * The GDT has NGDT_MEM entries of 8-byte-sized, static memory entries. Then |
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24 | * there is a certain number of 16-byte-sized TSS entries, one for each CPU. |
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25 | */ |
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26 | #define GDT_NULL_SEL 0 /* Null descriptor */ |
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27 | #define GDT_KCODE_SEL 1 /* Kernel code descriptor */ |
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28 | #define GDT_KDATA_SEL 2 /* Kernel data descriptor */ |
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29 | #define GDT_UCODE32_SEL 3 /* User code descriptor - 32bit */ |
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30 | #define GDT_UCODE_SEL 4 /* User code descriptor */ |
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31 | #define GDT_UDATA_SEL 5 /* User data descriptor */ |
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32 | #define NGDT_MEM 6 /* aligned */ |
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33 | |
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34 | #define GDT_CPUTSS_SEL 0 /* cpu TSS base index */ |
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35 | #define NGDT_DYN CONFIG_MAX_LOCAL_CORES /* one TSS per core */ |
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36 | |
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37 | /* |
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38 | * GDT Selectors Privileges |
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39 | */ |
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40 | #define ISPL(s) ((s) & SEL_RPL) |
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41 | #define USERMODE(c, f) (ISPL(c) == SEL_UPL) |
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42 | #define KERNELMODE(c, f) (ISPL(c) == SEL_KPL) |
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43 | #define SEL_KPL 0 /* kernel privilege level */ |
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44 | #define SEL_UPL 3 /* user privilege level */ |
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45 | #define SEL_RPL 3 /* requester's privilege level mask */ |
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46 | #define SEL_LDT 4 /* local descriptor table */ |
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47 | |
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48 | #define SYSSEL_START (NGDT_MEM * 8) |
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49 | |
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50 | /* Create a selector, with an index and a privilege */ |
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51 | #define GDT_FIXED_SEL(s,r) (((s) << 3) | r) |
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52 | #define GDT_DYNAM_SEL(s,r) ((SYSSEL_START + ((s) << 4)) | r) |
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53 | |
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54 | #ifndef x86_ASM |
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55 | |
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56 | /* |
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57 | * Offsets. |
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58 | */ |
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59 | #define GDT_ADDR_MEM(s,i) \ |
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60 | ((struct gdt_memseg *)((s) + ((i) << 3))) |
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61 | #define GDT_ADDR_SYS(s,i) \ |
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62 | ((struct gdt_sysseg *)((s) + (SYSSEL_START + ((i) << 4)))) |
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63 | |
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64 | /* |
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65 | * System segment descriptor (16 bytes): used for TSS and LDT. |
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66 | */ |
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67 | struct gdt_sysseg { |
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68 | uint64_t sd_lolimit:16; /* segment extent (lsb) */ |
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69 | uint64_t sd_lobase:24; /* segment base address (lsb) */ |
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70 | uint64_t sd_type:5; /* segment type */ |
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71 | uint64_t sd_dpl:2; /* segment descriptor priority level */ |
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72 | uint64_t sd_p:1; /* segment descriptor present */ |
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73 | uint64_t sd_hilimit:4; /* segment extent (msb) */ |
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74 | uint64_t sd_xx1:3; /* avl, long and def32 (not used) */ |
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75 | uint64_t sd_gran:1; /* limit granularity (byte/page) */ |
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76 | uint64_t sd_hibase:40; /* segment base address (msb) */ |
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77 | uint64_t sd_xx2:8; /* reserved */ |
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78 | uint64_t sd_zero:5; /* must be zero */ |
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79 | uint64_t sd_xx3:19; /* reserved */ |
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80 | } __packed; |
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81 | |
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82 | /* |
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83 | * Memory segment descriptor (8 bytes): used for cs, ds, etc. |
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84 | */ |
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85 | struct gdt_memseg { |
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86 | unsigned sd_lolimit:16; /* segment extent (lsb) */ |
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87 | unsigned sd_lobase:24; /* segment base address (lsb) */ |
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88 | unsigned sd_type:5; /* segment type */ |
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89 | unsigned sd_dpl:2; /* segment descriptor priority level */ |
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90 | unsigned sd_p:1; /* segment descriptor present */ |
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91 | unsigned sd_hilimit:4; /* segment extent (msb) */ |
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92 | unsigned sd_avl:1; /* available */ |
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93 | unsigned sd_long:1; /* long mode */ |
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94 | unsigned sd_def32:1; /* default 32 vs 16 bit size */ |
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95 | unsigned sd_gran:1; /* limit granularity (byte/page) */ |
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96 | unsigned sd_hibase:8; /* segment base address (msb) */ |
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97 | } __packed; |
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98 | |
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99 | /* |
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100 | * Common part of the above structures. Used to walk descriptor tables. |
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101 | */ |
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102 | struct common_segment_descriptor { |
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103 | unsigned sdc_lolimit:16; |
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104 | unsigned sdc_lobase:24; |
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105 | unsigned sdc_type:5; |
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106 | unsigned sdc_other:19; |
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107 | } __packed; |
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108 | |
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109 | /* |
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110 | * IDT descriptors (16 bytes). |
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111 | */ |
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112 | struct idt_seg { |
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113 | uint64_t gd_looffset:16;/* gate offset (lsb) */ |
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114 | uint64_t gd_selector:16;/* gate segment selector */ |
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115 | uint64_t gd_ist:3; /* IST select */ |
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116 | uint64_t gd_xx1:5; /* reserved */ |
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117 | uint64_t gd_type:5; /* segment type */ |
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118 | uint64_t gd_dpl:2; /* segment descriptor priority level */ |
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119 | uint64_t gd_p:1; /* segment descriptor present */ |
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120 | uint64_t gd_hioffset:48;/* gate offset (msb) */ |
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121 | uint64_t gd_xx2:8; /* reserved */ |
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122 | uint64_t gd_zero:5; /* must be zero */ |
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123 | uint64_t gd_xx3:19; /* reserved */ |
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124 | } __packed; |
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125 | |
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126 | /* |
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127 | * Region descriptors, used to load gdt/idt tables before segments yet exist. |
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128 | */ |
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129 | struct region_descriptor { |
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130 | uint16_t rd_limit; /* segment extent */ |
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131 | uint64_t rd_base; /* base address */ |
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132 | } __packed; |
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133 | |
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134 | struct tss { |
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135 | uint32_t tss_reserved1; |
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136 | uint64_t tss_rsp0; /* kernel stack pointer ring 0 */ |
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137 | uint64_t tss_rsp1; /* kernel stack pointer ring 1 */ |
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138 | uint64_t tss_rsp2; /* kernel stack pointer ring 2 */ |
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139 | uint32_t tss_reserved2; |
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140 | uint32_t tss_reserved3; |
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141 | uint64_t tss_ist[7]; /* Interrupt stack table */ |
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142 | uint32_t tss_reserved4; |
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143 | uint32_t tss_reserved5; |
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144 | uint32_t tss_iobase; |
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145 | } __packed; |
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146 | |
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147 | #define IOMAP_INVALOFF 0xffff |
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148 | |
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149 | /* |
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150 | * Our definition of Thread-Local Storage. |
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151 | */ |
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152 | struct tls { |
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153 | void *tls_self; |
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154 | uint32_t tls_gid; |
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155 | uint32_t tls_lid; |
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156 | uint64_t tls_rsp0; /* pointer for fast access */ |
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157 | reg_t tls_intr; |
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158 | void *tls_thr; |
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159 | } __packed; |
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160 | typedef struct tls tls_t; |
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161 | |
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162 | void lgdt(struct region_descriptor *); |
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163 | void lidt(struct region_descriptor *); |
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164 | void ltr(uint16_t); |
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165 | tls_t *curtls( void ); |
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166 | |
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167 | #define INTRS_ENABLED 0xFFEFAAAA |
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168 | #define INTRS_DISABLED 0xD0CCCCC0 |
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169 | |
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170 | #endif /* !x86_ASM */ |
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171 | |
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172 | /* TLS offsets */ |
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173 | #define TLS_SELF 0 |
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174 | #define TLS_GID 8 |
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175 | #define TLS_LID 12 |
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176 | #define TLS_RSP0 16 |
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177 | #define TLS_INTR 24 |
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178 | |
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179 | /* system segments and gate types */ |
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180 | #define SDT_SYSNULL 0 /* system null */ |
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181 | #define SDT_SYS286TSS 1 /* system 286 TSS available */ |
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182 | #define SDT_SYSLDT 2 /* system local descriptor table */ |
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183 | #define SDT_SYS286BSY 3 /* system 286 TSS busy */ |
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184 | #define SDT_SYS286CGT 4 /* system 286 call gate */ |
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185 | #define SDT_SYSTASKGT 5 /* system task gate */ |
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186 | #define SDT_SYS286IGT 6 /* system 286 interrupt gate */ |
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187 | #define SDT_SYS286TGT 7 /* system 286 trap gate */ |
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188 | #define SDT_SYSNULL2 8 /* system null again */ |
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189 | #define SDT_SYS386TSS 9 /* system 386 TSS available */ |
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190 | #define SDT_SYSNULL3 10 /* system null again */ |
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191 | #define SDT_SYS386BSY 11 /* system 386 TSS busy */ |
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192 | #define SDT_SYS386CGT 12 /* system 386 call gate */ |
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193 | #define SDT_SYSNULL4 13 /* system null again */ |
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194 | #define SDT_SYS386IGT 14 /* system 386 interrupt gate */ |
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195 | #define SDT_SYS386TGT 15 /* system 386 trap gate */ |
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196 | |
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197 | /* memory segment types */ |
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198 | #define SDT_MEMRO 16 /* memory read only */ |
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199 | #define SDT_MEMROA 17 /* memory read only accessed */ |
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200 | #define SDT_MEMRW 18 /* memory read write */ |
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201 | #define SDT_MEMRWA 19 /* memory read write accessed */ |
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202 | #define SDT_MEMROD 20 /* memory read only expand dwn limit */ |
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203 | #define SDT_MEMRODA 21 /* memory read only expand dwn limit accessed */ |
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204 | #define SDT_MEMRWD 22 /* memory read write expand dwn limit */ |
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205 | #define SDT_MEMRWDA 23 /* memory read write expand dwn limit accessed */ |
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206 | #define SDT_MEME 24 /* memory execute only */ |
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207 | #define SDT_MEMEA 25 /* memory execute only accessed */ |
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208 | #define SDT_MEMER 26 /* memory execute read */ |
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209 | #define SDT_MEMERA 27 /* memory execute read accessed */ |
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210 | #define SDT_MEMEC 28 /* memory execute only conforming */ |
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211 | #define SDT_MEMEAC 29 /* memory execute only accessed conforming */ |
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212 | #define SDT_MEMERC 30 /* memory execute read conforming */ |
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213 | #define SDT_MEMERAC 31 /* memory execute read accessed conforming */ |
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214 | |
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215 | /* |
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216 | * Entries in the Interrupt Descriptor Table (IDT) |
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217 | */ |
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218 | #define CPUVEC_MIN 0 |
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219 | #define CPUVEC_MAX 32 /* reserved entries for CPU exceptions */ |
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220 | |
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221 | #define DYNVEC_MIN (CPUVEC_MAX + 0) |
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222 | #define DYNVEC_MAX (CPUVEC_MAX + 4) |
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223 | |
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224 | #define VECTOR_APIC_SPURIOU (DYNVEC_MIN + 0) |
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225 | |
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226 | /* debug only, will be moved soon */ |
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227 | #define LAPIC_TIMER_VECTOR (DYNVEC_MIN + 1) |
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228 | #define IOAPIC_COM1_VECTOR (DYNVEC_MIN + 2) |
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229 | #define IOAPIC_KEYBOARD_VECTOR (DYNVEC_MIN + 3) |
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230 | |
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231 | #define NIDT 256 /* total number of IDT entries */ |
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232 | |
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