[75] | 1 | /* |
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| 2 | * soclib_hba.h - soclib AHCI block device driver definition. |
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| 3 | * |
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| 4 | * Author Alain Greiner (2016) |
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| 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH. |
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| 9 | * |
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| 10 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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| 24 | #ifndef _SOCLIB_HBA_H_ |
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| 25 | #define _SOCLIB_HBA_H_ |
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| 26 | |
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| 27 | #include <chdev.h> |
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| 28 | #include <hal_types.h> |
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| 29 | |
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| 30 | /***************************************************************************************** |
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| 31 | * This driver supports the SocLib VciMultiAhci component, that is a multi-channels, |
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| 32 | * block oriented, external storage controler, respecting the AHCI standard. |
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| 33 | * |
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| 34 | * 1. Each HBA channel define an independant physical disk, but this driver |
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| 35 | * supports only channel 0, because ALMOS-MKH uses only one physical disk. |
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| 36 | * |
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| 37 | * 2. The SOCLIB HBA component support split memory buffers (several physical |
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| 38 | * buffers for one single command), but this driver supports only one |
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| 39 | * single buffer I/O operation. |
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| 40 | * |
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| 41 | * 3. The "command list" can register up to 32 independant commands, posted |
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| 42 | * by different user threads. The command list is filled by the server |
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| 43 | * thread associated to the device, using one free slot per command, until the |
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| 44 | * device waiting queue of client threads is empty. |
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| 45 | * |
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| 46 | * 4. As there is only one interrupt, and the registered I/O operation can complete |
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| 47 | * in any order, this interrupt is not linked to a specific I/O operation. |
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| 48 | * The associated HBA_ISR unblock all client threads that have a completed command, |
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| 49 | * using the "hba_active_slots" and "hba_owner_thread[32]" global variables. |
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| 50 | ****************************************************************************************/ |
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| 51 | |
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| 52 | /***************************************************************************************** |
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| 53 | * HBA component registers offsets |
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| 54 | ****************************************************************************************/ |
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| 55 | |
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| 56 | enum SoclibMultiAhciRegisters |
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| 57 | { |
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| 58 | HBA_PXCLB_REG = 0, // command list base address 32 LSB bits |
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| 59 | HBA_PXCLBU_REG = 1, // command list base address 32 MSB bits |
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| 60 | HBA_PXIS_REG = 4, // interrupt status |
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| 61 | HBA_PXIE_REG = 5, // interrupt enable |
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| 62 | HBA_PXCMD_REG = 6, // run |
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| 63 | HBA_BLOCK_SIZE_REG = 7, // number of bytes per block |
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| 64 | HBA_BLOCK_COUNT_REG = 8, // number of blocks |
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| 65 | HBA_PXCI_REG = 14, // command bit-vector |
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| 66 | |
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| 67 | }; |
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| 68 | |
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| 69 | /***************************************************************************************** |
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| 70 | * This structure defines the command header (16 bytes) |
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| 71 | ****************************************************************************************/ |
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| 72 | |
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| 73 | typedef struct hba_cmd_header_s |
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| 74 | { |
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| 75 | unsigned int res0; // reserved |
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| 76 | unsigned char lba0; // LBA 7:0 |
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| 77 | unsigned char lba1; // LBA 15:8 |
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| 78 | unsigned char lba2; // LBA 23:16 |
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| 79 | unsigned char res1; // reserved |
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| 80 | unsigned char lba3; // LBA 31:24 |
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| 81 | unsigned char lba4; // LBA 39:32 |
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| 82 | unsigned char lba5; // LBA 47:40 |
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| 83 | unsigned char res2; // reserved |
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| 84 | unsigned int res3; // reserved |
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| 85 | |
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| 86 | } |
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| 87 | hba_cmd_header_t; |
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| 88 | |
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| 89 | /***************************************************************************************** |
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| 90 | * This structure defines the command buffer (16 bytes) |
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| 91 | ****************************************************************************************/ |
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| 92 | |
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| 93 | typedef struct hba_cmd_buffer_s |
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| 94 | { |
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| 95 | unsigned int dba; // Buffer base address 32 LSB bits |
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| 96 | unsigned int dbau; // Buffer base address 32 MSB bits |
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| 97 | unsigned int res0; // reserved |
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| 98 | unsigned int dbc; // Buffer byte count |
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| 99 | } |
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| 100 | hba_cmd_buffer_t; |
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| 101 | |
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| 102 | /***************************************************************************************** |
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| 103 | * This structure defines a command table (32 bytes, because we support only one buffer) |
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| 104 | ****************************************************************************************/ |
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| 105 | |
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| 106 | typedef struct hba_cmd_table_s |
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| 107 | { |
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| 108 | hba_cmd_header_t header; // contains LBA |
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| 109 | hba_cmd_buffer_t buffer; // only one physical buffer |
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| 110 | } |
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| 111 | hba_cmd_table_t; |
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| 112 | |
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| 113 | /***************************************************************************************** |
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| 114 | * This structure defines a command descriptor (16 bytes) |
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| 115 | ****************************************************************************************/ |
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| 116 | |
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| 117 | typedef struct hba_cmd_desc_s |
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| 118 | { |
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| 119 | unsigned char flag[2]; // W in bit 6 of flag[0] |
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| 120 | unsigned char prdtl[2]; // Number of buffers |
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| 121 | unsigned int prdbc; // Number of bytes actually transfered |
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| 122 | unsigned int ctba; // Command Table base address 32 LSB bits |
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| 123 | unsigned int ctbau; // Command Table base address 32 MSB bits |
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| 124 | } |
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| 125 | hba_cmd_desc_t; |
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| 126 | |
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| 127 | /******************************************************************************************** |
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| 128 | * This function access the SOCLIB_HBA hardware registers to get the block size and the |
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| 129 | * number of blocks, and initialises the "extension" field of the IOC device descriptor. |
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| 130 | ******************************************************************************************** |
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| 131 | * @ chdev : local pointer on the generic IOC chdev descriptor. |
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| 132 | *******************************************************************************************/ |
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| 133 | extern void soclib_hba_init( chdev_t * chdev ); |
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| 134 | |
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| 135 | /******************************************************************************************** |
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| 136 | * This function is called by the server thread associated to the IOC device. |
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| 137 | * It decodes the IOC device command embedded in the calling thread descriptor, |
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| 138 | * (format defined in the dev_ioc.h file) and starts execution of this generic command, |
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| 139 | * accessing the relevant SOCLIB_HBA hardware registers. |
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| 140 | * It registers the command in the SOCLIB_HBA device and returns without blocking |
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| 141 | * because this AHCI component supports up to 32 concurrent I/O operations. |
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| 142 | * It simply deschedules without blocking if the number of registered I/O operations |
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| 143 | * becomes larger than 32, which should be a rare event. |
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| 144 | ******************************************************************************************** |
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| 145 | * @ xp_thread : extended pointer on the client thread. |
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| 146 | *******************************************************************************************/ |
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| 147 | extern void soclib_hba_cmd( xptr_t thread_xp ); |
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| 148 | |
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| 149 | /******************************************************************************************** |
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| 150 | * This Interrupt Service Routine is executed when the IRQ signaling the completion of |
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| 151 | * one or several I/O operations registered in the SOCLIB_AHCI device is received. |
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| 152 | * It acknowledges the IRQ by accessing the proper SOCLIB_HBA register, and unblock |
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| 153 | * all client thread that have an I/O operation completed. |
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| 154 | ******************************************************************************************** |
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| 155 | * @ chdev : local pointer on the generic IOC device descriptor. |
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| 156 | *******************************************************************************************/ |
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| 157 | extern void soclib_hba_isr( chdev_t * chdev ); |
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| 158 | |
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| 159 | |
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| 160 | #endif /* _SOCLIB_HBA_H_ */ |
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