| 1 | /* |
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| 2 | * hal_register.h - Values available in some x86 registers |
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| 3 | * |
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| 4 | * Copyright (c) 2017 Maxime Villard |
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| 5 | * |
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| 6 | * This file is part of ALMOS-MKH. |
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| 7 | * |
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| 8 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 9 | * under the terms of the GNU General Public License as published by |
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| 10 | * the Free Software Foundation; version 2.0 of the License. |
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| 11 | * |
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| 12 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 15 | * General Public License for more details. |
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| 16 | * |
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| 17 | * You should have received a copy of the GNU General Public License |
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| 18 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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| 19 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 20 | */ |
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| 21 | |
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| 22 | /* |
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| 23 | * %cr0 |
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| 24 | */ |
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| 25 | #define CR0_PE 0x00000001 /* Protected mode Enable */ |
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| 26 | #define CR0_MP 0x00000002 /* "Math" Present (NPX or NPX emulator) */ |
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| 27 | #define CR0_EM 0x00000004 /* EMulate non-NPX coproc. (trap ESC only) */ |
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| 28 | #define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */ |
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| 29 | #define CR0_ET 0x00000010 /* Extension Type (387 (if set) vs 287) */ |
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| 30 | #define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */ |
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| 31 | #define CR0_WP 0x00010000 /* Write Protect (honor PG_RW in all modes) */ |
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| 32 | #define CR0_AM 0x00040000 /* Alignment Mask (set to enable AC flag) */ |
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| 33 | #define CR0_NW 0x20000000 /* Not Write-through */ |
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| 34 | #define CR0_CD 0x40000000 /* Cache Disable */ |
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| 35 | #define CR0_PG 0x80000000 /* PaGing enable */ |
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| 36 | |
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| 37 | /* |
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| 38 | * %cr4 |
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| 39 | */ |
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| 40 | #define CR4_VME 0x00000001 /* virtual 8086 mode extension enable */ |
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| 41 | #define CR4_PVI 0x00000002 /* protected mode virtual interrupt enable */ |
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| 42 | #define CR4_TSD 0x00000004 /* restrict RDTSC instruction to cpl 0 */ |
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| 43 | #define CR4_DE 0x00000008 /* debugging extension */ |
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| 44 | #define CR4_PSE 0x00000010 /* large (4MB) page size enable */ |
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| 45 | #define CR4_PAE 0x00000020 /* physical address extension enable */ |
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| 46 | #define CR4_MCE 0x00000040 /* machine check enable */ |
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| 47 | #define CR4_PGE 0x00000080 /* page global enable */ |
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| 48 | #define CR4_PCE 0x00000100 /* enable RDPMC instruction for all cpls */ |
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| 49 | #define CR4_OSFXSR 0x00000200 /* enable fxsave/fxrestor and SSE */ |
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| 50 | #define CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */ |
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| 51 | #define CR4_UMIP 0x00000800 /* user-mode instruction prevention */ |
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| 52 | #define CR4_VMXE 0x00002000 /* enable VMX operations */ |
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| 53 | #define CR4_SMXE 0x00004000 /* enable SMX operations */ |
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| 54 | #define CR4_FSGSBASE 0x00010000 /* enable *FSBASE and *GSBASE instructions */ |
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| 55 | #define CR4_PCIDE 0x00020000 /* enable Process Context IDentifiers */ |
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| 56 | #define CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */ |
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| 57 | #define CR4_SMEP 0x00100000 /* enable SMEP support */ |
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| 58 | #define CR4_SMAP 0x00200000 /* enable SMAP support */ |
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| 59 | #define CR4_PKE 0x00400000 /* protection key enable */ |
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| 60 | |
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| 61 | /* |
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| 62 | * MSRs |
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| 63 | */ |
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| 64 | #define MSR_EFER 0xc0000080 /* Extended feature enable */ |
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| 65 | #define EFER_SCE 0x00000001 /* SYSCALL extension */ |
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| 66 | #define EFER_LME 0x00000100 /* Long Mode Active */ |
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| 67 | #define EFER_LMA 0x00000400 /* Long Mode Enabled */ |
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| 68 | #define EFER_NXE 0x00000800 /* No-Execute Enabled */ |
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| 69 | #define EFER_SVME 0x00001000 /* Secure Virtual Machine En. */ |
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| 70 | #define EFER_LMSLE 0x00002000 /* Long Mode Segment Limit E. */ |
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| 71 | #define EFER_FFXSR 0x00004000 /* Fast FXSAVE/FXRSTOR En. */ |
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| 72 | #define EFER_TCE 0x00008000 /* Translation Cache Ext. */ |
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| 73 | |
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| 74 | #define MSR_STAR 0xc0000081 /* 32 bit syscall gate addr */ |
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| 75 | #define MSR_LSTAR 0xc0000082 /* 64 bit syscall gate addr */ |
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| 76 | #define MSR_CSTAR 0xc0000083 /* compat syscall gate addr */ |
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| 77 | #define MSR_SFMASK 0xc0000084 /* flags to clear on syscall */ |
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| 78 | |
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| 79 | #define MSR_FSBASE 0xc0000100 /* 64bit offset for fs: */ |
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| 80 | #define MSR_GSBASE 0xc0000101 /* 64bit offset for gs: */ |
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| 81 | #define MSR_KERNELGSBASE 0xc0000102 /* storage for swapgs ins */ |
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| 82 | |
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