1 | /* |
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2 | * dev_icu.h - ICU (Interrupt Controler Unit) generic device API. |
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3 | * |
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4 | * Authors Alain Greiner (2016) |
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5 | * |
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6 | * Copyright (c) UPMC Sorbonne Universites |
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7 | * |
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8 | * This file is part of ALMOS-MKH. |
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9 | * |
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10 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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11 | * under the terms of the GNU General Public License as published by |
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12 | * the Free Software Foundation; version 2.0 of the License. |
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13 | * |
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14 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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17 | * General Public License for more details. |
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18 | * |
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19 | * You should have received a copy of the GNU General Public License |
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20 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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22 | */ |
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23 | |
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24 | #ifndef _DEV_ICU_H_ |
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25 | #define _DEV_ICU_H_ |
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26 | |
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27 | #include <kernel_config.h> |
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28 | #include <hal_types.h> |
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29 | #include <spinlock.h> |
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30 | |
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31 | /***************************************************************************************** |
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32 | * Generic Internal Interrupt Controler definition |
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33 | * |
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34 | * The ICU (Interrupt Controller Unit) device describes an internal peripheral, |
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35 | * acting in all clusters containing cores. He is in charge of concentrating all IRQs |
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36 | * (interrupt requests) generated by peripherals to signal the completion of an I/O |
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37 | * operation. Each IRQ is routed to the core that started the I/O operation. |
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38 | * The ICU device must also help the kernel to select the ISR (Interrupt Service Routine) |
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39 | * that must be executed by the target core. |
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40 | * |
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41 | * This component can be implemented as a dedicated hardware component distributed |
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42 | * in all clusters, or emulated in software, as long as it implements the specified API. |
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43 | * For the TSAR architecture, this generic ICU device is implemented by the two hardware |
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44 | * components soclib_xicu and and soclib_iopic, and their associated drivers. |
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45 | * |
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46 | * ALMOS-MKH defines three types of IRQs, that are handled by this ICU device: |
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47 | * - HWI : The HardWare Interrupts are generated by local internal peripherals. |
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48 | * They are connected to the local ICU, to be routed to a given local core. |
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49 | * - WTI : The Write Triggered Interrupts are actually mailboxes implemented in the |
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50 | * local ICU. They are used to implement software IPIs (Inter-Processor-Interrupts), |
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51 | * or to route an IRQ generated by an external peripheral to a local core. |
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52 | * - PTI : The Programmable Timer Interrupts are actually timers generating periodic |
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53 | * interrupts controled by softare and contained in the local ICU, and routed to |
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54 | * a local core. |
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55 | * |
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56 | * The max numbers of interrupts of each type in a given cluster are defined by the |
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57 | * CONFIG_IRQ_HWI_MAX, CONFIG_IRQ_WTI_MAX, and CONFIG_IRQ_PTI_MAX parameters. |
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58 | * The actual numbers (hwi_nr / wti_nr / pti_nr) for a given manycore architecture |
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59 | * are defined in the boot_info file and stored in the ICU device extension. |
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60 | * |
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61 | * The generic ICU device provides three main services: |
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62 | * 1) It allows the kernel to selectively enable/disable any IRQ (identified by its type |
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63 | * and index) for a given core. It is the kernel responsibility to enable a given IRQ |
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64 | * to the core that started the I/O operation core, as a given IRQ event should be |
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65 | * handled by only one core. |
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66 | * 2) It makes a global OR between all enabled IRQs for a given core, to interrupt |
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67 | * the core when at least one enabled IRQ is active. |
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68 | * 3) It is capable to return the highest priority active IRQ of each type. The priority |
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69 | * scheme depends on the ICU device implementation. |
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70 | * |
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71 | * To select the ISR to be executed for a given IRQ routed to a given core, ALMOS-MKH |
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72 | * uses three interrupts vectors, implemented as three arrays (HWI/WTI/PTI), |
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73 | * stored in the core descriptor. Each entry in one interrupt vector array contains |
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74 | * a pointer on the chdev descriptor that is the "source" of the interrupt. |
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75 | * This chdev descriptor contains a link to the ISR to be executed. |
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76 | * |
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77 | * The ICU peripheral does not execute I/O operations, but is just acting as a |
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78 | * dynamically configurable interrupt router for other I/O operations. |
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79 | * Therefore, ALMOS-MKH does not use the ICU device waiting queue, but calls directly |
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80 | * the ICU driver blocking functions, using the device lock to get exclusive access to |
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81 | * the ICU device state. |
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82 | ****************************************************************************************/ |
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83 | |
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84 | /**** Forward declarations ****/ |
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85 | |
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86 | struct chdev_s; |
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87 | |
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88 | /***************************************************************************************** |
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89 | * This defines the (implementation independant) extension for the generic ICU device. |
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90 | ****************************************************************************************/ |
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91 | |
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92 | typedef struct icu_extend_s |
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93 | { |
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94 | uint32_t hwi_nr; /*! actual number of HWI IRQs in the ICU device */ |
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95 | uint32_t wti_nr; /*! actual number of WTI IRQs in the ICU device */ |
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96 | uint32_t pti_nr; /*! actual number of PTI IRQs in the ICU device */ |
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97 | uint32_t wti_bitmap; /*! WTI mailbox allocator / 0 == free entry */ |
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98 | spinlock_t wti_lock; /*! lock protecting WTI mailbox allocator */ |
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99 | } |
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100 | icu_extend_t; |
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101 | |
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102 | /***************************************************************************************** |
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103 | * This enum defines the various implementations of the ICU internal interrupt controller. |
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104 | * This array must be kept consistent with the define in arch_info.h file |
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105 | ****************************************************************************************/ |
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106 | |
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107 | enum icu_impl_e |
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108 | { |
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109 | IMPL_ICU_XCU = 0, /* vci_xicu component used in TSAR */ |
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110 | IMPL_ICU_I86 = 1 /* TBD */ |
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111 | } |
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112 | icu_impl_t; |
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113 | |
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114 | /***************************************************************************************** |
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115 | * This enum defines the three types of interrupts. |
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116 | ****************************************************************************************/ |
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117 | |
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118 | typedef enum irq_type |
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119 | { |
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120 | HWI_TYPE, /*! Hardware Interrupt */ |
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121 | WTI_TYPE, /*! Write Triggered Interrupt */ |
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122 | PTI_TYPE /*! Programmable Timer Interrupt */ |
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123 | } |
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124 | irq_type_t; |
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125 | |
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126 | |
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127 | /***************************************************************************************** |
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128 | * This function makes two initialisations: |
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129 | * - It initialises the ICU specific fields of the chdev descriptor. |
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130 | * - it initialises the implementation specific ICU hardware device and associated |
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131 | * data structures if required. |
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132 | * It must be called by a local thread. |
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133 | ***************************************************************************************** |
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134 | * @ icu : pointer on ICU chdev descriptor. |
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135 | * @ hwi_nr : number of HWI irqs. |
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136 | * @ wti_nr : number of WTI irqs. |
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137 | * @ pti_nr : number of PTI irqs. |
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138 | ****************************************************************************************/ |
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139 | void dev_icu_init( struct chdev_s * icu, |
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140 | uint32_t hwi_nr, |
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141 | uint32_t wti_nr, |
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142 | uint32_t pti_nr ); |
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143 | |
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144 | /***************************************************************************************** |
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145 | * This function enables the routing of a given IRQ, to a given core in the local cluster. |
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146 | * This IRQ is identified by its type (HWI/WTI/PTI) and index in the local ICU. |
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147 | * The target core is identified by its local index. |
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148 | * It must be called by a local thread. |
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149 | * - It unmask the selected IRQ in the ICU. |
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150 | * - It registers the pointer on the "source" chdev descriptor in the |
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151 | * relevant interrupt vector of the selected core. |
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152 | * - It register the IRQ type and index in the "source" chdev descriptor. |
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153 | ***************************************************************************************** |
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154 | * @ lid : local index of selected core. |
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155 | * @ irq_type : HWI/WTI/PTI. |
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156 | * @ irq_id : IRQ index in ICU |
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157 | * @ chdev : pointer on source chdev descriptor. |
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158 | ****************************************************************************************/ |
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159 | void dev_icu_enable_irq( lid_t lid, |
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160 | uint32_t irq_type, |
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161 | uint32_t irq_id, |
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162 | struct chdev_s * chdev ); |
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163 | |
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164 | /***************************************************************************************** |
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165 | * This function disables one given IRQ for a given core in the local cluster. |
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166 | * This IRQ is identified by its type (HWI/WTI/PTI) and index in the local ICU. |
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167 | * The core is identified by its local index. |
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168 | * It must be called by a local thread. |
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169 | * - It mask the selected IRQ in the ICU. |
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170 | * - It removes the pointer on the "source" chdev descriptor from the |
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171 | * relevant interrupt vector of the selected core. |
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172 | * - The IRQ type and index fields are not modified in the "source" chdev descriptor. |
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173 | ***************************************************************************************** |
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174 | * @ lid : local index of selected core in remote cluster. |
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175 | * @ irq_type : HWI/WTI/PTI. |
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176 | * @ irq_id : IRQ index. |
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177 | ****************************************************************************************/ |
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178 | void dev_icu_disable_irq( lid_t lid, |
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179 | uint32_t irq_type, |
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180 | uint32_t irq_id ); |
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181 | |
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182 | /***************************************************************************************** |
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183 | * This function returns the set of enabled IRQs for a given core. |
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184 | ***************************************************************************************** |
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185 | * @ lid : local index of selected core in remote cluster. |
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186 | * @ hwi_mask : each non zero bit define an enabled HWI IRQ. |
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187 | * @ wti_mask : each non zero bit define an enabled WTI IRQ. |
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188 | * @ pti_mask : each non zero bit define an enabled PTI IRQ. |
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189 | ****************************************************************************************/ |
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190 | void dev_icu_get_masks( lid_t lid, |
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191 | uint32_t * hwi_mask, |
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192 | uint32_t * WTi_mask, |
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193 | uint32_t * pti_mask ); |
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194 | |
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195 | /***************************************************************************************** |
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196 | * This function set the period value for a timer identified by the PTI index, |
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197 | * in the local ICU device descriptor. |
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198 | * It must be called by a local thread. |
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199 | ***************************************************************************************** |
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200 | * @ pti_id : PTI index. |
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201 | * @ period : number of cycles. |
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202 | ****************************************************************************************/ |
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203 | void dev_icu_set_period( uint32_t pti_id, |
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204 | uint32_t period ); |
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205 | |
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206 | /***************************************************************************************** |
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207 | * This function acknowledge a PTI IRQ for a timer identified by the PTI index, |
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208 | * in the local ICU device descriptor. |
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209 | * It must be called by a local thread. |
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210 | ***************************************************************************************** |
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211 | * @ pti_id : PTI index. |
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212 | ****************************************************************************************/ |
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213 | void dev_icu_ack_timer( uint32_t pti_id ); |
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214 | |
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215 | /***************************************************************************************** |
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216 | * This function send an IPI (Inter Processor Interrupt) to a core identified by |
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217 | * its cluster identifier and local index. |
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218 | * It can be called by any thread running in any cluster. |
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219 | * This IPI force a context switch, and the handling of pending RPC(s). |
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220 | ***************************************************************************************** |
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221 | * @ cxy : destination cluster identifier. |
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222 | * @ lid : destination core local index. |
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223 | * @ return 0 if success (IPI registered) / returns EINVAL if illegal cxy or lid. |
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224 | ****************************************************************************************/ |
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225 | void dev_icu_send_ipi( cxy_t cxy, |
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226 | lid_t lid ); |
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227 | |
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228 | /***************************************************************************************** |
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229 | * This function is called by a core when it receives an IRQ from the ICU device. |
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230 | * It access the local ICU device descriptor to get the highest priority IRQ |
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231 | * of each type (HWI / WTI / PTI). |
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232 | * - If it is a WTI or an HWI, the function uses the calling core interrupt-vectors |
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233 | * to call the relevant ISR, registered in the source device descriptor. |
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234 | * - If it is a PTI, the source device descriptor is the ICU device itself, and it |
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235 | * call the core_clock() function to execute all operations related to the TICK event. |
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236 | ****************************************************************************************/ |
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237 | void dev_icu_irq_handler(); |
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238 | |
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239 | /***************************************************************************************** |
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240 | * This function implements the WTI mailbox allocator for the local ICU. |
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241 | * These mailbox are used by I/O operations for completion signaling. |
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242 | * It must be called by a thread running in the cluster containing the target ICU. |
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243 | * If there is no mailbox available, the client thread must deschedule and retry later. |
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244 | * If N is the total number of WTI mailboxes in a cluster, and NC the number of cores, |
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245 | * the number of dynamically allocatable WTI mailboxes is (N-NC) because the first N |
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246 | * WTI mailboxes are used by the IPIs (one IPI per core). |
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247 | * It does not access the hardware device. |
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248 | ***************************************************************************************** |
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249 | * @ return WTI index if success / returns 0xFFFFFFFF if no mailbox available. |
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250 | ****************************************************************************************/ |
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251 | uint32_t dev_icu_wti_alloc(); |
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252 | |
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253 | /***************************************************************************************** |
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254 | * This function releases a dynamically allocated WTI mailbox. |
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255 | * It must be called by a thread running in the cluster containing the target ICU. |
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256 | * It does not access the hardware device. |
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257 | ***************************************************************************************** |
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258 | * @ wti_id : WTI mailbox index. |
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259 | ****************************************************************************************/ |
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260 | void dev_icu_wti_release( uint32_t wti_id ); |
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261 | |
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262 | /***************************************************************************************** |
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263 | * This function returns a pointer on the WTI mailbox identified by its index |
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264 | * in the local ICU device. |
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265 | ***************************************************************************************** |
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266 | * @ wti_id : WTI mailbox index. |
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267 | * @ returns pointer on mailbox register. |
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268 | ****************************************************************************************/ |
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269 | uint32_t * dev_icu_wti_ptr( uint32_t wti_id ); |
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270 | |
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271 | #endif /* _DEV_ICU_H_ */ |
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