[1] | 1 | /* |
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| 2 | * dev_mmc.h - MMC (Generic L2 cache controller) device API definition. |
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| 3 | * |
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| 4 | * Authors Alain Greiner (2016) |
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| 5 | * |
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| 6 | * Copyright (c) UPMC Sorbonne Universites |
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| 7 | * |
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| 8 | * This file is part of ALMOS-MKH. |
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| 9 | * |
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| 10 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 11 | * under the terms of the GNU General Public License as published by |
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| 12 | * the Free Software Foundation; version 2.0 of the License. |
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| 13 | * |
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| 14 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 17 | * General Public License for more details. |
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| 18 | * |
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| 19 | * You should have received a copy of the GNU General Public License |
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| 20 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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| 21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 22 | */ |
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| 23 | |
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| 24 | #ifndef _DEV_MMC_H_ |
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| 25 | #define _DEV_MMC_H_ |
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| 26 | |
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[14] | 27 | #include <kernel_config.h> |
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[1] | 28 | #include <hal_types.h> |
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| 29 | #include <spinlock.h> |
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| 30 | |
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| 31 | /***************************************************************************************** |
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| 32 | * Generic L2 cache controller definition |
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| 33 | * |
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| 34 | * The MMC (Memory Cache Controller) device describes an internal peripheral, |
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| 35 | * acting in all clusters containing a level 2 cache controller. |
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| 36 | * |
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| 37 | * It supports five command types: |
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| 38 | * - MMC_CC_INVAL : invalidate all cache lines covering a given buffer in L2 cache. |
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| 39 | * - MMC_CC_SYNC : synchronize all cache lines covering a given buffer to L3 cache. |
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| 40 | * - MMC_GET_ERROR : return content of a given error signaling register. |
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| 41 | * - MMC_SET_ERROR : set a given error signaling register. |
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| 42 | * - MMC_GET_INSTRU : return content of a given instrumentation register. |
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| 43 | * |
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| 44 | * As all L2 caches can be accessed by any thread running in any cluster, a calling |
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| 45 | * thread must get exclusive access to the MMC configuration interface. |
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| 46 | * As these operations consume few cycles, and access conflicts are expected to be |
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| 47 | * rare events, the calling threads use a busy waiting strategy to get the device |
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[3] | 48 | * spinlock, but do not register in the device waiting queue, and no server thread |
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[1] | 49 | * is used for this device. |
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| 50 | ****************************************************************************************/ |
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| 51 | |
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[3] | 52 | /**** Forward declarations ****/ |
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| 53 | |
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| 54 | struct chdev_s; |
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| 55 | |
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[1] | 56 | /****************************************************************************************** |
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| 57 | * This enum defines the various implementations of the generic MMC peripheral. |
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| 58 | * It must be kept consistent with the define in arch_info.h file. |
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| 59 | *****************************************************************************************/ |
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| 60 | |
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| 61 | enum mmc_impl_e |
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| 62 | { |
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| 63 | IMPL_MMC_TSR = 0, |
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| 64 | } |
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| 65 | mmc_impl_t; |
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| 66 | |
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| 67 | /***************************************************************************************** |
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| 68 | * This structure defines the (implementation independant) command pased to the driver. |
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| 69 | * To have a fixed format, the arguments interpretation depends on the command type. |
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| 70 | ****************************************************************************************/ |
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| 71 | |
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| 72 | enum |
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| 73 | { |
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| 74 | MMC_CC_INVAL = 0, |
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| 75 | MMC_CC_SYNC = 1, |
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| 76 | MMC_GET_ERROR = 2, |
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| 77 | MMC_SET_ERROR = 3, |
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| 78 | MMC_GET_INSTRU = 4, |
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| 79 | }; |
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| 80 | |
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| 81 | typedef struct mmc_command_s |
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| 82 | { |
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[23] | 83 | xptr_t dev_xp; /*! extended pointer on target MMC device descriptor */ |
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[1] | 84 | uint32_t type; /*! CC_INVAL / CC_SYNC / GET_ERROR / SET_ERROR / GET_INSTRU */ |
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[23] | 85 | paddr_t buf_paddr; /*! physical address of memory buffer (used by INVAL/SYNC) */ |
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| 86 | uint32_t buf_size; /*! buffer size in bytes (used by INVAL/SYNC) */ |
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| 87 | uint32_t reg_index; /*! register index in MMC peripheral (used by SET/GET) */ |
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| 88 | uint32_t * reg_ptr; /*! local pointer on src/dst buffer (used by SET/GET) */ |
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[1] | 89 | error_t error; /*! operation status (0 if success) */ |
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| 90 | } |
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| 91 | mmc_command_t; |
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| 92 | |
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| 93 | /***************************************************************************************** |
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| 94 | * This function initializes the driver specific fields in the generic MMC device |
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| 95 | * descriptor, and the implementation specific driver. |
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| 96 | * It must be executed once in any cluster containing an L2 cache. |
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| 97 | ***************************************************************************************** |
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[3] | 98 | * @ chdev : pointer on MMC device descriptor. |
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[1] | 99 | ****************************************************************************************/ |
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[3] | 100 | void dev_mmc_init( struct chdev_s * chdev ); |
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[1] | 101 | |
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| 102 | /***************************************************************************************** |
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| 103 | * This function invalidates all cache lines covering a memory buffer |
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| 104 | * in the physical address space. |
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| 105 | * It can be executed by any thread in any cluster, because it uses remote accesses |
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| 106 | * to access both the MMC device descriptor, and the L2 cache configuration interface. |
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| 107 | ***************************************************************************************** |
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[23] | 108 | * @ buf_xp : extended pointer on memory buffer. |
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[1] | 109 | * @ buf_size : buffer size (bytes). |
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| 110 | * @ return 0 if success / return EINVAL if failure |
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| 111 | ****************************************************************************************/ |
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[23] | 112 | error_t dev_mmc_inval( xptr_t buf_xp, |
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| 113 | uint32_t buf_size ); |
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[1] | 114 | |
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| 115 | /***************************************************************************************** |
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| 116 | * This function forces the L2 cache to synchronize the L3 cache for all cache lines |
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| 117 | * covering a memory buffer in the physical address space. |
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| 118 | * It can be executed by any thread in any cluster, because it uses remote accesses |
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| 119 | * to access both the MMC device descriptor, and the L2 cache configuration interface. |
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| 120 | ***************************************************************************************** |
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[23] | 121 | * @ buf_xp : extended pointer on memory buffer. |
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[1] | 122 | * @ buf_size : buffer size (bytes). |
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| 123 | * @ return 0 if success / return EINVAL if failure |
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| 124 | ****************************************************************************************/ |
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[23] | 125 | error_t dev_mmc_sync( xptr_t buf_xp, |
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[1] | 126 | uint32_t buf_size ); |
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| 127 | |
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| 128 | /***************************************************************************************** |
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| 129 | * This function set a value in one error signaling MMC register. |
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| 130 | * It can be executed by any thread in any cluster, because it uses remote accesses |
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| 131 | * to access the L2 cache instrumentation interface in any cluster. |
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| 132 | ***************************************************************************************** |
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| 133 | * @ cxy : MMC cluster identifier. |
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| 134 | * @ index : register index in MMC peripheral. |
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| 135 | * @ wdata : value to be written. |
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| 136 | * @ return 0 if success / return EINVAL if failure |
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| 137 | ****************************************************************************************/ |
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| 138 | error_t dev_mmc_set_error( cxy_t cxy, |
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| 139 | uint32_t index, |
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| 140 | uint32_t wdata ); |
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| 141 | |
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| 142 | /***************************************************************************************** |
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| 143 | * This function returns the value contained in one error signaling MMC register. |
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| 144 | * It can be executed by any thread in any cluster, because it uses remote accesses |
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| 145 | * to access the L2 cache instrumentation interface in any cluster. |
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| 146 | ***************************************************************************************** |
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| 147 | * @ cxy : MMC cluster identifier. |
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| 148 | * @ index : error register index in MMC peripheral. |
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| 149 | * @ rdata : local pointer on buffer for returned value. |
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| 150 | * @ return 0 if success / return EINVAL if failure |
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| 151 | ****************************************************************************************/ |
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| 152 | error_t dev_mmc_get_error( cxy_t cxy, |
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| 153 | uint32_t index, |
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| 154 | uint32_t * rdata ); |
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| 155 | |
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| 156 | |
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| 157 | /***************************************************************************************** |
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| 158 | * This function returns the value contained in one instrumentation MMC register. |
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| 159 | * It can be executed by any thread in any cluster, because it uses remote accesses |
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| 160 | * to access the L2 cache configuration interface in any cluster. |
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| 161 | ***************************************************************************************** |
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| 162 | * @ cxy : MMC cluster identifier. |
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| 163 | * @ index : instrumentation register index in MMC peripheral. |
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| 164 | * @ rdata : local pointer on buffer for returned value. |
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| 165 | * @ return 0 if success / return EINVAL if failure |
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| 166 | ****************************************************************************************/ |
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| 167 | error_t dev_mmc_get_instrumentation( cxy_t cxy, |
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| 168 | uint32_t index, |
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| 169 | uint32_t * rdata ); |
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| 170 | |
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| 171 | #endif /* _DEV_MMC_H_ */ |
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