source: trunk/kernel/devices/dev_mmc.h @ 657

Last change on this file since 657 was 657, checked in by alain, 5 years ago

Introduce remote_buf.c/.h & socket.c/.h files.
Update dev_nic.c/.h files.
File size: 8.7 KB
Line 
1/*
2 * dev_mmc.h - MMC (Generic L2 cache controller) device API definition.
3 *
4 * Authors   Alain Greiner  (2016,2017,2018,2019,2020)
5 *
6 * Copyright (c) UPMC Sorbonne Universites
7 *
8 * This file is part of ALMOS-MKH.
9 *
10 * ALMOS-MKH is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2.0 of the License.
13 *
14 * ALMOS-MKH is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with ALMOS-MKH; if not, write to the Free Software Foundation,
21 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef _DEV_MMC_H_
25#define _DEV_MMC_H_
26
27#include <kernel_config.h>
28#include <hal_kernel_types.h>
29
30/*****************************************************************************************
31 *     Generic L2 cache controller definition
32 *
33 * The MMC (Memory Cache Controller) device describes an internal peripheral,
34 * acting in all clusters containing a level 2 cache controller.
35 *
36 * It supports three different services:
37 * 1) L2/L3 software cache-coherence operations.
38 * 2) error reporting for architecture specific addressing error.
39 * 3) architecture specific intrumentation registers access.
40 *
41 * It supports therefore five command types:
42 * - MMC_CC_INVAL   : invalidate all cache lines covering a given buffer in L2 cache.
43 * - MMC_CC_SYNC    : synchronize all cache lines covering a given buffer to L3 cache.
44 * - MMC_ERROR_GET  : return content of a given error signaling register.
45 * - MMC_ERROR_SET  : set a given error signaling register.
46 * - MMC_INSTR_GET  : return content of a given instrumentation register.
47 *
48 * As all L2 caches can be accessed by any thread running in any cluster, a calling
49 * thread must get exclusive access to the MMC configuration interface.
50 * As these operations consume few cycles, and access conflicts are expected to be
51 * rare events, the calling threads use a busy waiting strategy to get the device
52 * busylock, but do not register in the device waiting queue, and no server thread
53 * is used for this device.
54 ****************************************************************************************/
55 
56/****  Forward declarations  ****/
57
58struct chdev_s;
59
60/******************************************************************************************
61 * This enum defines the various implementations of the generic MMC peripheral.
62 * It must be kept consistent with the define in arch_info.h file.
63 *****************************************************************************************/
64
65enum mmc_impl_e
66{
67    IMPL_MMC_TSR =   0,     
68}
69mmc_impl_t;
70
71/*****************************************************************************************
72 * This structure defines the (implementation independant) command pased to the driver.
73 * To have a fixed format, the arguments interpretation depends on the command type.
74 ****************************************************************************************/
75
76enum
77{
78    MMC_CC_INVAL   = 0,
79    MMC_CC_SYNC    = 1,
80    MMC_ERROR_GET  = 2,
81    MMC_ERROR_SET  = 3,
82    MMC_INSTR_GET  = 4,
83};
84
85typedef struct mmc_command_s
86{
87    xptr_t      dev_xp;     /*! extended pointer on target MMC device descriptor        */
88    uint32_t    type;       /*! CC_INVAL / CC_SYNC / GET_ERROR / SET_ERROR / GET_INSTRU */
89    void      * buf_ptr;    /*! local pointer on memory buffer    (used by INVAL/SYNC)  */
90    uint32_t    buf_size;   /*! memory buffer size (bytes)        (used by INVAL/SYNC)  */
91    uint32_t    reg_index;  /*! register index in MMC peripheral  (used by SET/GET)     */
92    uint32_t  * reg_ptr;    /*! local pointer on src/dst buffer   (used by SET/GET)     */
93    error_t     error;      /*! operation status (0 if success)                         */
94}
95mmc_command_t;
96
97/*****************************************************************************************
98 * This function initializes the driver specific fields in the generic MMC device
99 * descriptor, and the implementation specific driver.
100 * It must be executed once in any cluster containing an L2 cache.
101 *****************************************************************************************
102 * @ chdev      : pointer on MMC device descriptor.
103 ****************************************************************************************/
104void dev_mmc_init( struct chdev_s * chdev );
105
106/*****************************************************************************************
107 * This function invalidates all cache lines covering a memory buffer
108 * in the physical address space.
109 * It can be executed by any thread in any cluster, because it uses remote accesses
110 * to access both the MMC device descriptor, and the L2 cache configuration interface.
111 *****************************************************************************************
112 * @ buf_xp     : extended pointer on memory buffer.
113 * @ buf_size   : buffer size (bytes).
114 * @ return 0 if success / return EINVAL if failure
115 ****************************************************************************************/
116error_t dev_mmc_inval( xptr_t     buf_xp,
117                       uint32_t   buf_size );
118
119/*****************************************************************************************
120 * This function forces the L2 cache to synchronize the L3 cache for all cache lines
121 * covering a memory buffer in the physical address space.
122 * It can be executed by any thread in any cluster, because it uses remote accesses
123 * to access both the MMC device descriptor, and the L2 cache configuration interface.
124 *****************************************************************************************
125 * @ buf_xp     : extended pointer on memory buffer.
126 * @ buf_size   : buffer size (bytes).
127 * @ return 0 if success / return EINVAL if failure
128 ****************************************************************************************/
129error_t dev_mmc_sync( xptr_t     buf_xp,
130                      uint32_t   buf_size );
131                       
132/*****************************************************************************************
133 * This function set a value in one (architecture specific) MMC_ERROR register.
134 * It can be executed by any thread in any cluster, because it uses remote accesses
135 * to access the L2 cache instrumentation interface in any cluster.
136 *****************************************************************************************
137 * @ cxy     : MMC cluster identifier.
138 * @ index   : register index in MMC peripheral.
139 * @ wdata   : value to be written.
140 * @ return 0 if success / return EINVAL if failure
141 ****************************************************************************************/
142error_t dev_mmc_error_set( cxy_t    cxy,
143                           uint32_t index,
144                           uint32_t wdata );
145             
146/*****************************************************************************************
147 * This function returns the value contained in one (architecture specific) MMC_ERROR
148 * register. It can be executed by any thread in any cluster, because it uses remote
149 * accesses to access the L2 cache instrumentation interface in any cluster.
150 *****************************************************************************************
151 * @ cxy     : MMC cluster identifier.
152 * @ index   : error register index in MMC peripheral.
153 * @ rdata   : local pointer on buffer for returned value.
154 * @ return 0 if success / return EINVAL if failure
155 ****************************************************************************************/
156error_t dev_mmc_error_get( cxy_t      cxy,
157                           uint32_t   index, 
158                           uint32_t * rdata );
159             
160/*****************************************************************************************
161 * This function returns the value contained in one (architecture specific) MMC_INSTR
162 * register. It can be executed by any thread in any cluster, because it uses remote
163 * accesses to access the L2 cache instrumentation interface in any cluster.
164 *****************************************************************************************
165 * @ cxy     : MMC cluster identifier.
166 * @ index   : error register index in MMC peripheral.
167 * @ rdata   : local pointer on buffer for returned value.
168 * @ return 0 if success / return EINVAL if failure
169 ****************************************************************************************/
170error_t dev_mmc_instr_get( cxy_t      cxy,
171                           uint32_t   index, 
172                           uint32_t * rdata );
173             
174#endif  /* _DEV_MMC_H_ */
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