1 | /* |
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2 | * ata.h - ATA interface registers |
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3 | * |
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4 | * Copyright (c) 2008,2009,2010,2011,2012 Ghassan Almaless |
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5 | * Copyright (c) 2011,2012 UPMC Sorbonne Universites |
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6 | * |
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7 | * This file is part of ALMOS-kernel. |
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8 | * |
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9 | * ALMOS-kernel is free software; you can redistribute it and/or modify it |
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10 | * under the terms of the GNU General Public License as published by |
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11 | * the Free Software Foundation; version 2.0 of the License. |
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12 | * |
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13 | * ALMOS-kernel is distributed in the hope that it will be useful, but |
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14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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16 | * General Public License for more details. |
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17 | * |
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18 | * You should have received a copy of the GNU General Public License |
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19 | * along with ALMOS-kernel; if not, write to the Free Software Foundation, |
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20 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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21 | */ |
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22 | |
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23 | #ifndef _ATA_H_ |
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24 | #define _ATA_H_ |
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25 | |
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26 | #include <types.h> |
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27 | #include <list.h> |
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28 | #include <driver.h> |
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29 | |
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30 | /* ATA Task File offsets */ |
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31 | #define ATA_DATA_REG 0 |
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32 | #define ATA_ERROR_REG 1 |
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33 | #define ATA_PRECOMPENSATION_REG 1 |
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34 | #define ATA_COUNT_REG 2 |
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35 | #define ATA_LBA_LOW_REG 3 |
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36 | #define ATA_LBA_MID_REG 4 |
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37 | #define ATA_LBA_HIGH_REG 5 |
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38 | #define ATA_DRIVE_REG 6 |
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39 | #define ATA_STATUS_REG 7 |
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40 | #define ATA_CMD_REG 7 |
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41 | |
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42 | #define ATA_DOR_PORT 0x3F6 |
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43 | |
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44 | /* ATA Status Register bits */ |
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45 | #define ATA_ERR 0x01 |
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46 | #define ATA_IDX 0x02 |
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47 | #define ATA_CORR 0x04 |
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48 | #define ATA_DRQ 0x08 |
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49 | #define ATA_DSC 0x10 |
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50 | #define ATA_WFT 0x20 |
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51 | #define ATA_DRDY 0x40 |
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52 | #define ATA_BSY 0x80 |
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53 | |
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54 | |
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55 | /* ATA Error Register bits */ |
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56 | |
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57 | /* Block device status */ |
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58 | #define ATA_IDLE 0 |
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59 | #define ATA_BUSY 1 |
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60 | #define ATA_READ_SUCCESS 2 |
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61 | #define ATA_WRITE_SUCCESS 3 |
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62 | #define ATA_READ_ERROR 4 |
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63 | #define ATA_WRITE_ERROR 5 |
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64 | #define ATA_ERROR 6 |
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65 | |
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66 | #define ATA_READ_CMD 0x020 |
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67 | #define ATA_WRITE_CMD 0x030 |
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68 | #define ATA_IDENTIFY_CMD 0x0EC |
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69 | |
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70 | #define ATA_LBA_CAP 0x0100 |
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71 | |
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72 | struct device_s; |
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73 | |
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74 | struct ata_identify_s |
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75 | { |
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76 | uint16_t general; |
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77 | uint16_t geometry[6]; |
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78 | uint16_t vendor_id1[3]; |
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79 | uint16_t info1[37]; |
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80 | uint16_t vendor_id2; |
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81 | uint16_t info2; |
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82 | uint16_t capabilities; |
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83 | uint16_t info3[10]; |
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84 | uint32_t sectors; |
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85 | //uint16_t lblock_lo; |
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86 | //uint16_t lblock_hi; |
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87 | uint32_t info4; |
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88 | uint16_t reserved1[64]; |
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89 | uint16_t vendor_id3[32]; |
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90 | uint16_t reserved2[96]; |
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91 | } __attribute__ ((packed)); |
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92 | |
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93 | struct ata_params_s |
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94 | { |
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95 | uint32_t blk_count; |
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96 | uint32_t blk_size; |
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97 | struct ata_identify_s info; |
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98 | }; |
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99 | |
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100 | struct ata_context_s |
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101 | { |
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102 | struct list_entry request_queue; |
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103 | struct wait_queue_s pending; |
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104 | struct ata_params_s params; |
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105 | }; |
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106 | |
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107 | void ibmpc_ata_init(struct device_s *hdd, void *base, uint_t irq); |
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108 | |
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109 | #endif /* _ATA_H_ */ |
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