source: trunk/libs/newlib/src/include/coff/arm.h @ 489

Last change on this file since 489 was 444, checked in by satin@…, 7 years ago

add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc

File size: 4.0 KB
RevLine 
[444]1/* ARM COFF support for BFD.
2   Copyright 1998, 1999, 2000, 2002, 2003, 2010, 2013
3   Free Software Foundation, Inc.
4
5   This file is part of BFD, the Binary File Descriptor library.
6
7   This program is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 3 of the License, or
10   (at your option) any later version.
11
12   This program is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program; if not, write to the Free Software Foundation,
19   Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
20
21#define COFFARM 1
22
23#define L_LNNO_SIZE 2
24#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
25#include "coff/external.h"
26
27/* Bits for f_flags:
28        F_RELFLG        relocation info stripped from file
29        F_EXEC          file is executable (no unresolved external references)
30        F_LNNO          line numbers stripped from file
31        F_LSYMS         local symbols stripped from file
32        F_INTERWORK     file supports switching between ARM and Thumb instruction sets
33        F_INTERWORK_SET the F_INTERWORK bit is valid
34        F_APCS_FLOAT    code passes float arguments in float registers
35        F_PIC           code is reentrant/position-independent
36        F_AR32WR        file has byte ordering of an AR32WR machine (e.g. vax)
37        F_APCS_26       file uses 26 bit ARM Procedure Calling Standard
38        F_APCS_SET      the F_APCS_26, F_APCS_FLOAT and F_PIC bits have been initialised
39        F_SOFT_FLOAT    code does not use floating point instructions.  */
40
41#define F_RELFLG        (0x0001)
42#define F_EXEC          (0x0002)
43#define F_LNNO          (0x0004)
44#define F_LSYMS         (0x0008)
45#define F_INTERWORK     (0x0010)
46#define F_INTERWORK_SET (0x0020)
47#define F_APCS_FLOAT    (0x0040)
48#undef  F_AR16WR
49#define F_PIC           (0x0080)
50#define F_AR32WR        (0x0100)
51#define F_APCS_26       (0x0400)
52#define F_APCS_SET      (0x0800)
53#define F_SOFT_FLOAT    (0x2000)
54#define F_VFP_FLOAT     (0x4000)
55
56/* Bits stored in flags field of the internal_f structure */
57
58#define F_INTERWORK     (0x0010)
59#define F_APCS_FLOAT    (0x0040)
60#define F_PIC           (0x0080)
61#define F_APCS26        (0x1000)
62#define F_ARM_ARCHITECTURE_MASK (0x4000+0x0800+0x0400)
63#define F_ARM_2         (0x0400)
64#define F_ARM_2a        (0x0800)
65#define F_ARM_3         (0x0c00)
66#define F_ARM_3M        (0x4000)
67#define F_ARM_4         (0x4400)
68#define F_ARM_4T        (0x4800)
69#define F_ARM_5         (0x4c00)
70
71/*
72  ARMMAGIC ought to encoded the procesor type,
73  but it is too late to change it now, instead
74  the flags field of the internal_f structure
75  is used as shown above.
76 
77  XXX - NC 5/6/97.  */
78
79#define ARMMAGIC        0xa00  /* I just made this up */
80
81#define ARMBADMAG(x) (((x).f_magic != ARMMAGIC))
82
83#define ARMPEMAGIC      0x1c0
84#define THUMBPEMAGIC    0x1c2
85#define ARMV7PEMAGIC    0x1c4
86
87#undef  ARMBADMAG
88#define ARMBADMAG(x) (((x).f_magic != ARMMAGIC) && ((x).f_magic != ARMPEMAGIC) && ((x).f_magic != THUMBPEMAGIC) && ((x).f_magic != ARMV7PEMAGIC))
89
90#define OMAGIC          0404    /* object files, eg as output */
91#define ZMAGIC          0413    /* demand load format, eg normal ld output */
92#define STMAGIC         0401    /* target shlib */
93#define SHMAGIC         0443    /* host   shlib */
94
95/* define some NT default values */
96/*  #define NT_IMAGE_BASE        0x400000 moved to internal.h */
97#define NT_SECTION_ALIGNMENT 0x1000
98#define NT_FILE_ALIGNMENT    0x200 
99#define NT_DEF_RESERVE       0x100000
100#define NT_DEF_COMMIT        0x1000
101
102/* We use the .rdata section to hold read only data.  */
103#define _LIT    ".rdata"
104
105/********************** RELOCATION DIRECTIVES **********************/
106#ifdef ARM_WINCE
107struct external_reloc
108{
109  char r_vaddr[4];
110  char r_symndx[4];
111  char r_type[2];
112};
113
114#define RELOC struct external_reloc
115#define RELSZ 10
116
117#else
118struct external_reloc
119{
120  char r_vaddr[4];
121  char r_symndx[4];
122  char r_type[2];
123  char r_offset[4];
124};
125
126#define RELOC struct external_reloc
127#define RELSZ 14
128#endif
129
130#define ARM_NOTE_SECTION ".note"
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