1 | /* M32R ELF support for BFD. |
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2 | Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2008, 2010 |
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3 | Free Software Foundation, Inc. |
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4 | |
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5 | This file is part of BFD, the Binary File Descriptor library. |
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6 | |
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7 | This program is free software; you can redistribute it and/or modify |
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8 | it under the terms of the GNU General Public License as published by |
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9 | the Free Software Foundation; either version 3 of the License, or |
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10 | (at your option) any later version. |
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11 | |
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12 | This program is distributed in the hope that it will be useful, |
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13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 | GNU General Public License for more details. |
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16 | |
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17 | You should have received a copy of the GNU General Public License |
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18 | along with this program; if not, write to the Free Software Foundation, |
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19 | Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
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20 | |
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21 | #ifndef _ELF_M32R_H |
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22 | #define _ELF_M32R_H |
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23 | |
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24 | #include "elf/reloc-macros.h" |
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25 | |
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26 | /* Relocations. */ |
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27 | START_RELOC_NUMBERS (elf_m32r_reloc_type) |
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28 | RELOC_NUMBER (R_M32R_NONE, 0) |
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29 | /* REL relocations */ |
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30 | RELOC_NUMBER (R_M32R_16, 1) /* For backwards compatibility. */ |
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31 | RELOC_NUMBER (R_M32R_32, 2) /* For backwards compatibility. */ |
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32 | RELOC_NUMBER (R_M32R_24, 3) /* For backwards compatibility. */ |
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33 | RELOC_NUMBER (R_M32R_10_PCREL, 4) /* For backwards compatibility. */ |
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34 | RELOC_NUMBER (R_M32R_18_PCREL, 5) /* For backwards compatibility. */ |
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35 | RELOC_NUMBER (R_M32R_26_PCREL, 6) /* For backwards compatibility. */ |
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36 | RELOC_NUMBER (R_M32R_HI16_ULO, 7) /* For backwards compatibility. */ |
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37 | RELOC_NUMBER (R_M32R_HI16_SLO, 8) /* For backwards compatibility. */ |
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38 | RELOC_NUMBER (R_M32R_LO16, 9) /* For backwards compatibility. */ |
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39 | RELOC_NUMBER (R_M32R_SDA16, 10) /* For backwards compatibility. */ |
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40 | RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)/* For backwards compatibility. */ |
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41 | RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12) /* For backwards compatibility. */ |
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42 | |
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43 | /* RELA relocations */ |
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44 | RELOC_NUMBER (R_M32R_16_RELA, 33) |
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45 | RELOC_NUMBER (R_M32R_32_RELA, 34) |
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46 | RELOC_NUMBER (R_M32R_24_RELA, 35) |
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47 | RELOC_NUMBER (R_M32R_10_PCREL_RELA, 36) |
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48 | RELOC_NUMBER (R_M32R_18_PCREL_RELA, 37) |
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49 | RELOC_NUMBER (R_M32R_26_PCREL_RELA, 38) |
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50 | RELOC_NUMBER (R_M32R_HI16_ULO_RELA, 39) |
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51 | RELOC_NUMBER (R_M32R_HI16_SLO_RELA, 40) |
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52 | RELOC_NUMBER (R_M32R_LO16_RELA, 41) |
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53 | RELOC_NUMBER (R_M32R_SDA16_RELA, 42) |
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54 | RELOC_NUMBER (R_M32R_RELA_GNU_VTINHERIT, 43) |
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55 | RELOC_NUMBER (R_M32R_RELA_GNU_VTENTRY, 44) |
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56 | |
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57 | RELOC_NUMBER (R_M32R_REL32, 45) |
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58 | |
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59 | RELOC_NUMBER (R_M32R_GOT24, 48) |
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60 | RELOC_NUMBER (R_M32R_26_PLTREL, 49) |
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61 | RELOC_NUMBER (R_M32R_COPY, 50) |
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62 | RELOC_NUMBER (R_M32R_GLOB_DAT, 51) |
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63 | RELOC_NUMBER (R_M32R_JMP_SLOT, 52) |
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64 | RELOC_NUMBER (R_M32R_RELATIVE, 53) |
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65 | RELOC_NUMBER (R_M32R_GOTOFF, 54) |
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66 | RELOC_NUMBER (R_M32R_GOTPC24, 55) |
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67 | RELOC_NUMBER (R_M32R_GOT16_HI_ULO, 56) |
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68 | RELOC_NUMBER (R_M32R_GOT16_HI_SLO, 57) |
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69 | RELOC_NUMBER (R_M32R_GOT16_LO, 58) |
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70 | RELOC_NUMBER (R_M32R_GOTPC_HI_ULO, 59) |
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71 | RELOC_NUMBER (R_M32R_GOTPC_HI_SLO, 60) |
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72 | RELOC_NUMBER (R_M32R_GOTPC_LO, 61) |
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73 | RELOC_NUMBER (R_M32R_GOTOFF_HI_ULO, 62) |
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74 | RELOC_NUMBER (R_M32R_GOTOFF_HI_SLO, 63) |
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75 | RELOC_NUMBER (R_M32R_GOTOFF_LO, 64) |
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76 | |
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77 | END_RELOC_NUMBERS (R_M32R_max) |
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78 | |
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79 | /* Processor specific section indices. These sections do not actually |
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80 | exist. Symbols with a st_shndx field corresponding to one of these |
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81 | values have a special meaning. */ |
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82 | |
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83 | /* Small common symbol. */ |
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84 | #define SHN_M32R_SCOMMON SHN_LORESERVE |
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85 | |
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86 | /* Processor specific section flags. */ |
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87 | |
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88 | /* This section contains sufficient relocs to be relaxed. |
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89 | When relaxing, even relocs of branch instructions the assembler could |
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90 | complete must be present because relaxing may cause the branch target to |
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91 | move. */ |
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92 | #define SHF_M32R_CAN_RELAX 0x10000000 |
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93 | |
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94 | /* Processor specific flags for the ELF header e_flags field. */ |
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95 | |
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96 | /* Two bit m32r architecture field. */ |
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97 | #define EF_M32R_ARCH 0x30000000 |
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98 | |
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99 | /* m32r code. */ |
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100 | #define E_M32R_ARCH 0x00000000 |
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101 | /* m32rx code. */ |
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102 | #define E_M32RX_ARCH 0x10000000 |
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103 | /* m32r2 code. */ |
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104 | #define E_M32R2_ARCH 0x20000000 |
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105 | |
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106 | /* 12 bit m32r new instructions field. */ |
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107 | #define EF_M32R_INST 0x0FFF0000 |
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108 | /* Parallel instructions. */ |
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109 | #define E_M32R_HAS_PARALLEL 0x00010000 |
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110 | /* Hidden instructions for m32rx: |
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111 | jc, jnc, macwhi-a, macwlo-a, mulwhi-a, mulwlo-a, sth+, shb+, sat, pcmpbz, |
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112 | sc, snc. */ |
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113 | #define E_M32R_HAS_HIDDEN_INST 0x00020000 |
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114 | /* New bit instructions: |
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115 | clrpsw, setpsw, bset, bclr, btst. */ |
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116 | #define E_M32R_HAS_BIT_INST 0x00040000 |
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117 | /* Floating point instructions. */ |
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118 | #define E_M32R_HAS_FLOAT_INST 0x00080000 |
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119 | |
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120 | /* 4 bit m32r ignore to check field. */ |
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121 | #define EF_M32R_IGNORE 0x0000000F |
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122 | |
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123 | #endif |
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