Context Navigation

← Previous Revision
Latest Revision
Next Revision →
Blame
Revision Log

ChangeLog-9103 @ 467

Last change on this file since 467 was 444, checked in by satin@…, 6 years ago
add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc
File size: 98.3 KB

Line
1	2005-04-13 H.J. Lu <hongjiu.lu@intel.com>
2
3	2003-11-18 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
4	* mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB.
5
6	2003-04-04 Svein E. Seldal <Svein.Seldal@solidas.com>
7	* tic4x.h: Namespace cleanup. Replace s/c4x/tic4x
8
9	2002-11-16 Klee Dienes <kdienes@apple.com>
10	* m88k.h (INSTAB): Remove 'next' field.
11	(instruction): Remove definition; replace with extern declaration
12	and mark as const.
13
14	2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
15	* tic4x.h: New file.
16
17	2002-07-25 Richard Sandiford <rsandifo@redhat.com>
18	* mips.h (CPU_R2000): Remove.
19
20	2003-10-21 Peter Barada <pbarada@mail.wm.sps.mot.com>
21	Bernardo Innocenti <bernie@develer.com>
22
23	* m68k.h: Add MCFv4/MCF5528x support.
24
25	2003-10-19 Hans-Peter Nilsson <hp@bitrange.com>
26
27	* mmix.h (JMP_INSN_BYTE): Define.
28
29	2003-09-30 Chris Demetriou <cgd@broadcom.com>
30
31	* mips.h: Document +E, +F, +G, +H, and +I operand types.
32	Update documentation of I, +B and +C operand types.
33	(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
34	(M_DEXT, M_DINS): New enum values.
35
36	2003-09-04 Nick Clifton <nickc@redhat.com>
37
38	* v850.h (PROCESSOR_V850E1): Define.
39
40	2003-08-19 Alan Modra <amodra@bigpond.net.au>
41
42	* ppc.h (PPC_OPCODE_440): Define. Formatting. Use hex for other
43	PPC_OPCODE_* defines.
44
45	2003-08-16 Jason Eckhardt <jle@rice.edu>
46
47	* i860.h (fmov.ds): Expand as famov.ds.
48	(fmov.sd): Expand as famov.sd.
49	(pfmov.ds): Expand as pfamov.ds.
50
51	2003-08-07 Michael Meissner <gnu@the-meissners.org>
52
53	* cgen.h: Remove PARAM macro usage in all prototypes.
54	(CGEN_EXTRACT_INFO): Use void * instead of PTR.
55	(cgen_print_fn): Ditto.
56	(CGEN_HW_ENTRY): Ditto.
57	(CGEN_MAYBE_MULTI_IFLD): Ditto.
58	(struct cgen_insn): Ditto.
59	(CGEN_CPU_TABLE): Ditto.
60
61	2003-08-07 Alan Modra <amodra@bigpond.net.au>
62
63	* alpha.h: Remove PARAMS macro.
64	* arc.h: Likewise.
65	* d10v.h: Likewise.
66	* d30v.h: Likewise.
67	* i370.h: Likewise.
68	* or32.h: Likewise.
69	* pj.h: Likewise.
70	* ppc.h: Likewise.
71	* sparc.h: Likewise.
72	* tic80.h: Likewise.
73	* v850.h: Likewise.
74
75	2003-07-18 Michael Snyder <msnyder@redhat.com>
76
77	* include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
78
79	2003-07-15 Richard Sandiford <rsandifo@redhat.com>
80
81	* mips.h (CPU_RM7000): New macro.
82	(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
83
84	2003-07-09 Alexandre Oliva <aoliva@redhat.com>
85
86	2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
87	* mn10300.h (AM33_2): Renamed from AM33.
88	2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
89	* mn10300.h (AM332, FMT_D3): Defined.
90	(MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
91	(MN10300_OPERAND_FPCR): Likewise.
92
93	2003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
94
95	* s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.
96
97	2003-06-25 Richard Sandiford <rsandifo@redhat.com>
98
99	* h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
100	(IMM8U, IMM8U_NS): Define.
101	(h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
102
103	2003-06-25 Richard Sandiford <rsandifo@redhat.com>
104
105	* h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
106	mov.l ERs,@(dd:32,ERd) entries.
107
108	2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
109
110	* i386.h (i386_optab): Support Intel Precott New Instructions.
111
112	2003-06-10 Gary Hade <garyhade@us.ibm.com>
113
114	* ppc.h (PPC_OPERAND_DQ): Define.
115
116	2003-06-10 Richard Sandiford <rsandifo@redhat.com>
117
118	* h8300.h (IMM4_NS, IMM8_NS): New.
119	(h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
120	Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
121
122	2003-06-03 Michael Snyder <msnyder@redhat.com>
123
124	* h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
125	(ldc): Split ccr ops from exr ops (which are only available
126	on H8S or H8SX).
127	(stc): Ditto.
128	(andc, orc, xorc): Ditto.
129	(ldmac, stmac, clrmac, mac): Change access to AV_H8S.
130
131	2003-06-03 Michael Snyder <msnyder@redhat.com>
132	and Bernd Schmidt <bernds@redhat.com>
133	and Alexandre Oliva <aoliva@redhat.com>
134	* h8300.h: Add support for h8300sx instruction set.
135
136	2003-05-23 Jason Eckhardt <jle@rice.edu>
137
138	* i860.h (expand_type): Add XP_ONLY.
139	(scyc.b): New XP instruction.
140	(ldio.l): Likewise.
141	(ldio.s): Likewise.
142	(ldio.b): Likewise.
143	(ldint.l): Likewise.
144	(ldint.s): Likewise.
145	(ldint.b): Likewise.
146	(stio.l): Likewise.
147	(stio.s): Likewise.
148	(stio.b): Likewise.
149	(pfld.q): Likewise.
150
151	2003-05-20 Jason Eckhardt <jle@rice.edu>
152
153	* i860.h (flush): Set lower 3 bits properly and use 'L'
154	for the immediate operand type instead of 'i'.
155
156	2003-05-20 Jason Eckhardt <jle@rice.edu>
157
158	* i860.h (fzchks): Both S and R bits must be set.
159	(pfzchks): Likewise.
160	(faddp): Likewise.
161	(pfaddp): Likewise.
162	(fix.ss): Remove (invalid instruction).
163	(pfix.ss): Likewise.
164	(ftrunc.ss): Likewise.
165	(pftrunc.ss): Likewise.
166
167	2003-05-18 Jason Eckhardt <jle@rice.edu>
168
169	* i860.h (form, pform): Add missing .dd suffix.
170
171	2003-05-13 Stephane Carrez <stcarrez@nerim.fr>
172
173	* m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
174
175	2003-04-07 Michael Snyder <msnyder@redhat.com>
176
177	* h8300.h (ldc/stc): Fix up src/dst swaps.
178
179	2003-04-09 J. Grant <jg-binutils@jguk.org>
180
181	* mips.h: Correct comment typo.
182
183	2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
184
185	* s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
186	(S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
187	(s390_opcode): Remove architecture. Add modes and min_cpu.
188
189	2003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
190
191	* h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
192	processing.
193
194	2003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
195
196	* h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
197
198	2003-01-23 Alan Modra <amodra@bigpond.net.au>
199
200	* m68hc11.h (cpu6812s): Define.
201
202	2003-01-07 Chris Demetriou <cgd@broadcom.com>
203
204	* mips.h: Fix missing space in comment.
205	(INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
206	(INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
207	by four bits.
208
209	2003-01-02 Chris Demetriou <cgd@broadcom.com>
210
211	* mips.h: Update copyright years to include 2002 (which had
212	been missed previously) and 2003. Make comments about "+A",
213	"+B", and "+C" operand types more descriptive.
214
215	2002-12-31 Chris Demetriou <cgd@broadcom.com>
216
217	* mips.h: Note that the "+D" operand type name is now used.
218
219	2002-12-30 Chris Demetriou <cgd@broadcom.com>
220
221	* mips.h: Document "+" as the start of two-character operand
222	type names, and add new "K", "+A", "+B", and "+C" operand types.
223	(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
224	(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
225	defines.
226
227	2002-12-24 Dmitry Diky <diwil@mail.ru>
228
229	* msp430.h: New file. Defines msp430 opcodes.
230
231	2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
232
233	* h8300.h: Added some more pseudo opcodes for system call
234	processing.
235
236	2002-12-19 Chris Demetriou <cgd@broadcom.com>
237
238	* mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
239	(OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
240	(OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
241	(OP_OP_SDC2, OP_OP_SDC3): Define.
242
243	2002-12-16 Alan Modra <amodra@bigpond.net.au>
244
245	* hppa.h (completer_chars): #if 0 out.
246
247	* ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
248	"default_args".
249	(struct not_wot): Constify "args".
250	(struct not): Constify "name".
251	(numopcodes): Delete.
252	(endop): Delete.
253
254	2002-12-13 Alan Modra <amodra@bigpond.net.au>
255
256	* pj.h (pj_opc_info_t): Add union.
257
258	2002-12-04 David Mosberger <davidm@hpl.hp.com>
259
260	* ia64.h: Fix copyright message.
261	(IA64_OPND_AR_CSD): New operand kind.
262
263	2002-12-03 Richard Henderson <rth@redhat.com>
264
265	* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
266
267	2002-12-03 Alan Modra <amodra@bigpond.net.au>
268
269	* cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
270	Constify "leaf" and "multi".
271
272	2002-11-19 Klee Dienes <kdienes@apple.com>
273
274	* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
275	fields.
276	(h8_opcodes). Modify initializer and initializer macros to no
277	longer initialize the removed fields.
278
279	2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
280
281	* tic4x.h (c4x_insts): Fixed LDHI constraint
282
283	2002-11-18 Klee Dienes <kdienes@apple.com>
284
285	* h8300.h (h8_opcode): Remove 'length' field.
286	(h8_opcodes): Mark as 'const' (both the declaration and
287	definition). Modify initializer and initializer macros to no
288	longer initialize the length field.
289
290	2002-11-18 Klee Dienes <kdienes@apple.com>
291
292	* arc.h (arc_ext_opcodes): Declare as extern.
293	(arc_ext_operands): Declare as extern.
294	* i860.h (i860_opcodes): Declare as const.
295
296	2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
297
298	* tic4x.h: File reordering. Added enhanced opcodes.
299
300	2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
301
302	* tic4x.h: Major rewrite of entire file. Define instruction
303	classes, and put each instruction into a class.
304
305	2002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
306
307	* tic4x.h: Added new opcodes and corrected some bugs. Add support
308	for new DSP types.
309
310	2002-10-14 Alan Modra <amodra@bigpond.net.au>
311
312	* cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
313
314	2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
315	Ken Raeburn <raeburn@cygnus.com>
316	Aldy Hernandez <aldyh@redhat.com>
317	Eric Christopher <echristo@redhat.com>
318	Richard Sandiford <rsandifo@redhat.com>
319
320	* mips.h: Update comment for new opcodes.
321	(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
322	(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
323	(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
324	(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
325	(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
326	Don't match CPU_R4111 with INSN_4100.
327
328	2002-08-19 Elena Zannoni <ezannoni@redhat.com>
329
330	From matthew green <mrg@redhat.com>
331
332	* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
333	instructions.
334	(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
335	PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
336	e500x2 Integer select, branch locking, performance monitor,
337	cache locking and machine check APUs, respectively.
338	(PPC_OPCODE_EFS): New opcode type for efs* instructions.
339	(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
340
341	2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
342
343	* m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
344	(M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
345	M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
346	memory banks.
347	(M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
348
349	2002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
350
351	* mips.h (INSN_MIPS16): New define.
352
353	2002-07-08 Alan Modra <amodra@bigpond.net.au>
354
355	* i386.h: Remove IgnoreSize from movsx and movzx.
356
357	2002-06-08 Alan Modra <amodra@bigpond.net.au>
358
359	* a29k.h: Replace CONST with const.
360	(CONST): Don't define.
361	* convex.h: Replace CONST with const.
362	(CONST): Don't define.
363	* dlx.h: Replace CONST with const.
364	* or32.h (CONST): Don't define.
365
366	2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
367
368	* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
369	(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
370	(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
371	(INSN_MDMX): New constants, for MDMX support.
372	(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
373
374	2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
375
376	* dlx.h: New file.
377
378	2002-05-25 Alan Modra <amodra@bigpond.net.au>
379
380	* ia64.h: Use #include "" instead of <> for local header files.
381	* sparc.h: Likewise.
382
383	2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
384
385	* mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
386
387	2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
388
389	* h8300.h: Corrected defs of all control regs
390	and eepmov instr.
391
392	2002-04-11 Alan Modra <amodra@bigpond.net.au>
393
394	* i386.h: Add intel mode cmpsd and movsd.
395	Put them before SSE2 insns, so that rep prefix works.
396
397	2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
398
399	* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
400	instructions.
401	(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
402	may be passed along with the ISA bitmask.
403
404	2002-03-05 Paul Koning <pkoning@equallogic.com>
405
406	* pdp11.h: Add format codes for float instruction formats.
407
408	2002-02-25 Alan Modra <amodra@bigpond.net.au>
409
410	* ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
411
412	Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
413
414	* i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
415
416	Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
417
418	* i386.h (push,pop): Allow 16bit operands in 64bit mode.
419	(xchg): Fix.
420	(in, out): Disable 64bit operands.
421	(call, jmp): Avoid REX prefixes.
422	(jcxz): Prohibit in 64bit mode
423	(jrcxz, loop): Add 64bit variants.
424	(movq): Fix patterns.
425	(movmskps, pextrw, pinstrw): Add 64bit variants.
426
427	2002-01-31 Ivan Guzvinec <ivang@opencores.org>
428
429	* or32.h: New file.
430
431	2002-01-22 Graydon Hoare <graydon@redhat.com>
432
433	* cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
434	(CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
435
436	2002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
437
438	* h8300.h: Comment typo fix.
439
440	2002-01-03 matthew green <mrg@redhat.com>
441
442	* ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
443	(PPC_OPCODE_BOOKE64): Likewise.
444
445	Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
446
447	* hppa.h (call, ret): Move to end of table.
448	(addb, addib): PA2.0 variants should have been PA2.0W.
449	(ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
450	happy.
451	(fldw, fldd, fstw, fstd, bb): Likewise.
452	(short loads/stores): Tweak format specifier slightly to keep
453	disassembler happy.
454	(indexed loads/stores): Likewise.
455	(absolute loads/stores): Likewise.
456
457	2001-12-04 Alexandre Oliva <aoliva@redhat.com>
458
459	* d10v.h (OPERAND_NOSP): New macro.
460
461	2001-11-29 Alexandre Oliva <aoliva@redhat.com>
462
463	* d10v.h (OPERAND_SP): New macro.
464
465	2001-11-15 Alan Modra <amodra@bigpond.net.au>
466
467	* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
468
469	2001-11-11 Timothy Wall <twall@alum.mit.edu>
470
471	* tic54x.h: Revise opcode layout; don't really need a separate
472	structure for parallel opcodes.
473
474	2001-11-13 Zack Weinberg <zack@codesourcery.com>
475	Alan Modra <amodra@bigpond.net.au>
476
477	* i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
478	accept WordReg.
479
480	2001-11-04 Chris Demetriou <cgd@broadcom.com>
481
482	* mips.h (OPCODE_IS_MEMBER): Remove extra space.
483
484	2001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
485
486	* mmix.h: New file.
487
488	2001-10-18 Chris Demetriou <cgd@broadcom.com>
489
490	* mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
491	of the expression, to make source code merging easier.
492
493	2001-10-17 Chris Demetriou <cgd@broadcom.com>
494
495	* mips.h: Sort coprocessor instruction argument characters
496	in comment, add a few more words of description for "H".
497
498	2001-10-17 Chris Demetriou <cgd@broadcom.com>
499
500	* mips.h (INSN_SB1): New cpu-specific instruction bit.
501	(OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
502	if cpu is CPU_SB1.
503
504	2001-10-17 matthew green <mrg@redhat.com>
505
506	* ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
507
508	2001-10-12 matthew green <mrg@redhat.com>
509
510	* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
511	opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
512	instructions, respectively.
513
514	2001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
515
516	* v850.h: Remove spurious comment.
517
518	2001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
519
520	* h8300.h: Fix compile time warning messages
521
522	2001-09-04 Richard Henderson <rth@redhat.com>
523
524	* alpha.h (struct alpha_operand): Pack elements into bitfields.
525
526	2001-08-31 Eric Christopher <echristo@redhat.com>
527
528	* mips.h: Remove CPU_MIPS32_4K.
529
530	2001-08-27 Torbjorn Granlund <tege@swox.com>
531
532	* ppc.h (PPC_OPERAND_DS): Define.
533
534	2001-08-25 Andreas Jaeger <aj@suse.de>
535
536	* d30v.h: Fix declaration of reg_name_cnt.
537
538	* d10v.h: Fix declaration of d10v_reg_name_cnt.
539
540	* arc.h: Add prototypes from opcodes/arc-opc.c.
541
542	2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
543
544	* mips.h (INSN_10000): Define.
545	(OPCODE_IS_MEMBER): Check for INSN_10000.
546
547	2001-08-10 Alan Modra <amodra@one.net.au>
548
549	* ppc.h: Revert 2001-08-08.
550
551	2001-08-10 Richard Sandiford <rsandifo@redhat.com>
552
553	* mips.h (INSN_GP32): Remove.
554	(OPCODE_IS_MEMBER): Remove gp32 parameter.
555	(M_MOVE): New macro identifier.
556
557	2001-08-08 Alan Modra <amodra@one.net.au>
558
559	1999-10-25 Torbjorn Granlund <tege@swox.com>
560	* ppc.h (struct powerpc_operand): New field `reloc'.
561
562	2001-08-01 Aldy Hernandez <aldyh@redhat.com>
563
564	* mips.h (INSN_ISA_MASK): Nuke bits 12-15.
565
566	2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
567
568	* cgen.h (CGEN_INSN): Add regex support.
569	(build_insn_regex): Declare.
570
571	2001-07-11 Frank Ch. Eigler <fche@redhat.com>
572
573	* cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
574	(cgen_cpu_desc): Ditto.
575
576	2001-07-07 Ben Elliston <bje@redhat.com>
577
578	* m88k.h: Clean up and reformat. Remove unused code.
579
580	2001-06-14 Geoffrey Keating <geoffk@redhat.com>
581
582	* cgen.h (cgen_keyword): Add nonalpha_chars field.
583
584	2001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
585
586	* mips.h (CPU_R12000): Define.
587
588	2001-05-23 John Healy <jhealy@redhat.com>
589
590	* cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
591
592	2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
593
594	* mips.h (INSN_ISA_MASK): Define.
595
596	2001-05-12 Alan Modra <amodra@one.net.au>
597
598	* i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
599	not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
600	and use InvMem as these insns must have register operands.
601
602	2001-05-04 Alan Modra <amodra@one.net.au>
603
604	* i386.h (i386_optab): Move InvMem to first operand of pmovmskb
605	and pextrw to swap reg/rm assignments.
606
607	2001-04-05 Hans-Peter Nilsson <hp@axis.com>
608
609	* cris.h (enum cris_insn_version_usage): Correct comment for
610	cris_ver_v3p.
611
612	2001-03-24 Alan Modra <alan@linuxcare.com.au>
613
614	* i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
615	Add InvMem to first operand of "maskmovdqu".
616
617	2001-03-22 Hans-Peter Nilsson <hp@axis.com>
618
619	* cris.h (ADD_PC_INCR_OPCODE): New macro.
620
621	2001-03-21 Kazu Hirata <kazu@hxi.com>
622
623	* h8300.h: Fix formatting.
624
625	2001-03-22 Alan Modra <alan@linuxcare.com.au>
626
627	* i386.h (i386_optab): Add paddq, psubq.
628
629	2001-03-19 Alan Modra <alan@linuxcare.com.au>
630
631	* i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
632
633	2001-02-28 Igor Shevlyakov <igor@windriver.com>
634
635	* m68k.h: new defines for Coldfire V4. Update mcf to know
636	about mcf5407.
637
638	2001-02-18 lars brinkhoff <lars@nocrew.org>
639
640	* pdp11.h: New file.
641
642	2001-02-12 Jan Hubicka <jh@suse.cz>
643
644	* i386.h (i386_optab): SSE integer converison instructions have
645	64bit versions on x86-64.
646
647	2001-02-10 Nick Clifton <nickc@redhat.com>
648
649	* mips.h: Remove extraneous whitespace. Formating change to allow
650	for future contribution.
651
652	2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
653
654	* s390.h: New file.
655
656	2001-02-02 Patrick Macdonald <patrickm@redhat.com>
657
658	* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
659	(CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
660	(CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
661
662	2001-01-24 Karsten Keil <kkeil@suse.de>
663
664	* i386.h (i386_optab): Fix swapgs
665
666	2001-01-14 Alan Modra <alan@linuxcare.com.au>
667
668	* hppa.h: Describe new '<' and '>' operand types, and tidy
669	existing comments.
670	(pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
671	Remove duplicate "ldw j(s,b),x". Sort some entries.
672
673	2001-01-13 Jan Hubicka <jh@suse.cz>
674
675	* i386.h (i386_optab): Fix pusha and ret templates.
676
677	2001-01-11 Peter Targett <peter.targett@arccores.com>
678
679	* arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
680	definitions for masking cpu type.
681	(arc_ext_operand_value) New structure for storing extended
682	operands.
683	(ARC_OPERAND_*) Flags for operand values.
684
685	2001-01-10 Jan Hubicka <jh@suse.cz>
686
687	* i386.h (pinsrw): Add.
688	(pshufw): Remove.
689	(cvttpd2dq): Fix operands.
690	(cvttps2dq): Likewise.
691	(movq2q): Rename to movdq2q.
692
693	2001-01-10 Richard Schaal <richard.schaal@intel.com>
694
695	* i386.h: Correct movnti instruction.
696
697	2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
698
699	* cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
700	of operands (unsigned char or unsigned short).
701	(CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
702	(CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
703
704	2001-01-05 Jan Hubicka <jh@suse.cz>
705
706	* i386.h (i386_optab): Make [sml]fence template to use immext field.
707
708	2001-01-03 Jan Hubicka <jh@suse.cz>
709
710	* i386.h (i386_optab): Fix 64bit pushf template; Add instructions
711	introduced by Pentium4
712
713	2000-12-30 Jan Hubicka <jh@suse.cz>
714
715	* i386.h (i386_optab): Add "rex*" instructions;
716	add swapgs; disable jmp/call far direct instructions for
717	64bit mode; add syscall and sysret; disable registers for 0xc6
718	template. Add 'q' suffixes to extendable instructions, disable
719	obsolete instructions, add new sign/zero extension ones.
720	(i386_regtab): Add extended registers.
721	(*Suf): Add No_qSuf.
722	(q_Suf, wlq_Suf, bwlq_Suf): New.
723
724	2000-12-20 Jan Hubicka <jh@suse.cz>
725
726	* i386.h (i386_optab): Replace "Imm" with "EncImm".
727	(i386_regtab): Add flags field.
728
729	2000-12-12 Nick Clifton <nickc@redhat.com>
730
731	* mips.h: Fix formatting.
732
733	2000-12-01 Chris Demetriou <cgd@sibyte.com>
734
735	mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
736	(OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
737	OP_*_SYSCALL definitions.
738	(OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
739	19 bit wait codes.
740	(MIPS operand specifier comments): Remove 'm', add 'U' and
741	'J', and update the meaning of 'B' so that it's more general.
742
743	* mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
744	INSN_ISA5): Renumber, redefine to mean the ISA at which the
745	instruction was added.
746	(INSN_ISA32): New constant.
747	(INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
748	Renumber to avoid new and/or renumbered INSN_* constants.
749	(INSN_MIPS32): Delete.
750	(ISA_UNKNOWN): New constant to indicate unknown ISA.
751	(ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
752	ISA_MIPS32): New constants, defined to be the mask of INSN_*
753	constants available at that ISA level.
754	(CPU_UNKNOWN): New constant to indicate unknown CPU.
755	(CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
756	define it with a unique value.
757	(OPCODE_IS_MEMBER): Update for new ISA membership-related
758	constant meanings.
759
760	* mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
761	definitions.
762
763	* mips.h (CPU_SB1): New constant.
764
765	2000-10-20 Jakub Jelinek <jakub@redhat.com>
766
767	* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
768	Note that '3' is used for siam operand.
769
770	2000-09-22 Jim Wilson <wilson@cygnus.com>
771
772	* ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
773
774	2000-09-13 Anders Norlander <anorland@acc.umu.se>
775
776	* mips.h: Use defines instead of hard-coded processor numbers.
777	(CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
778	CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
779	CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
780	CPU_4KC, CPU_4KM, CPU_4KP): Define..
781	(OPCODE_IS_MEMBER): Use new defines.
782	(OP_MASK_SEL, OP_SH_SEL): Define.
783	(OP_MASK_CODE20, OP_SH_CODE20): Define.
784	Add 'P' to used characters.
785	Use 'H' for coprocessor select field.
786	Use 'm' for 20 bit breakpoint code.
787	Document new arg characters and add to used characters.
788	(INSN_MIPS32): New define for MIPS32 extensions.
789	(OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
790
791	2000-09-05 Alan Modra <alan@linuxcare.com.au>
792
793	* hppa.h: Mention cz completer.
794
795	2000-08-16 Jim Wilson <wilson@cygnus.com>
796
797	* ia64.h (IA64_OPCODE_POSTINC): New.
798
799	2000-08-15 H.J. Lu <hjl@gnu.org>
800
801	* i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
802	IgnoreSize change.
803
804	2000-08-08 Jason Eckhardt <jle@cygnus.com>
805
806	* i860.h: Small formatting adjustments.
807
808	2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
809
810	* avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
811	Move related opcodes closer to each other.
812	Minor changes in comments, list undefined opcodes.
813
814	2000-07-26 Dave Brolley <brolley@redhat.com>
815
816	* cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
817
818	2000-07-22 Jason Eckhardt <jle@cygnus.com>
819
820	* i860.h (btne, bte, bla): Changed these opcodes
821	to use sbroff ('r') instead of split16 ('s').
822	(J, K, L, M): New operand types for 16-bit aligned fields.
823	(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
824	use I, J, K, L, M instead of just I.
825	(T, U): New operand types for split 16-bit aligned fields.
826	(st.x): Changed these opcodes to use S, T, U instead of just S.
827	(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
828	exist on the i860.
829	(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
830	(pfeq.ss, pfeq.dd): New opcodes.
831	(st.s): Fixed incorrect mask bits.
832	(fmlow): Fixed incorrect mask bits.
833	(fzchkl, pfzchkl): Fixed incorrect mask bits.
834	(faddz, pfaddz): Fixed incorrect mask bits.
835	(form, pform): Fixed incorrect mask bits.
836	(pfld.l): Fixed incorrect mask bits.
837	(fst.q): Fixed incorrect mask bits.
838	(all floating point opcodes): Fixed incorrect mask bits for
839	handling of dual bit.
840
841	2000-07-20 Hans-Peter Nilsson <hp@axis.com>
842
843	cris.h: New file.
844
845	2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
846
847	* avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
848	(AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
849	(AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
850	(AVR_ISA_M83): Define for ATmega83, ATmega85.
851	(espm): Remove, because ESPM removed in databook update.
852	(eicall, eijmp): Move to the end of opcode table.
853
854	2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
855
856	* m68hc11.h: New file for support of Motorola 68hc11.
857
858	Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
859
860	* avr.h: clr,lsl,rol, ... moved after add,adc, ...
861
862	Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
863
864	* avr.h: New file with AVR opcodes.
865
866	Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
867
868	* d10v.h: added ALONE attribute for d10v_opcode.exec_type.
869
870	2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
871
872	* i386.h: Allow d suffix on iret, and add DefaultSize modifier.
873
874	2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
875
876	* i386.h: Use sl_FP, not sl_Suf for fild.
877
878	2000-05-16 Frank Ch. Eigler <fche@redhat.com>
879
880	* cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
881	it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
882	(CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
883	CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
884
885	2000-05-13 Alan Modra <alan@linuxcare.com.au>,
886
887	* i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
888
889	2000-05-13 Alan Modra <alan@linuxcare.com.au>,
890	Alexander Sokolov <robocop@netlink.ru>
891
892	* i386.h (i386_optab): Add cpu_flags for all instructions.
893
894	2000-05-13 Alan Modra <alan@linuxcare.com.au>
895
896	From Gavin Romig-Koch <gavin@cygnus.com>
897	* i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
898
899	2000-05-04 Timothy Wall <twall@cygnus.com>
900
901	* tic54x.h: New.
902
903	2000-05-03 J.T. Conklin <jtc@redback.com>
904
905	* ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
906	(PPC_OPERAND_VR): New operand flag for vector registers.
907
908	2000-05-01 Kazu Hirata <kazu@hxi.com>
909
910	* h8300.h (EOP): Add missing initializer.
911
912	Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
913
914	* hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
915	forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
916	New operand types l,y,&,fe,fE,fx added to support above forms.
917	(pa_opcodes): Replaced usage of 'x' as source/target for
918	floating point double-word loads/stores with 'fx'.
919
920	Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
921	David Mosberger <davidm@hpl.hp.com>
922	Timothy Wall <twall@cygnus.com>
923	Jim Wilson <wilson@cygnus.com>
924
925	* ia64.h: New file.
926
927	2000-03-27 Nick Clifton <nickc@cygnus.com>
928
929	* d30v.h (SHORT_A1): Fix value.
930	(SHORT_AR): Renumber so that it is at the end of the list of short
931	instructions, not the end of the list of long instructions.
932
933	2000-03-26 Alan Modra <alan@linuxcare.com>
934
935	* i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
936	problem isn't really specific to Unixware.
937	(OLDGCC_COMPAT): Define.
938	(i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
939	destination %st(0).
940	Fix lots of comments.
941
942	2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
943
944	* d30v.h:
945	(SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
946	(SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
947	(SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
948	(SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
949	(SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
950	(LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
951	(LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
952
953	2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
954
955	* i386.h (fild, fistp): Change intel d_Suf form to fildd and
956	fistpd without suffix.
957
958	2000-02-24 Nick Clifton <nickc@cygnus.com>
959
960	* cgen.h (cgen_cpu_desc): Rename field 'flags' to
961	'signed_overflow_ok_p'.
962	Delete prototypes for cgen_set_flags() and cgen_get_flags().
963
964	2000-02-24 Andrew Haley <aph@cygnus.com>
965
966	* cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
967	(CGEN_CPU_TABLE): flags: new field.
968	Add prototypes for new functions.
969
970	2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
971
972	* i386.h: Add some more UNIXWARE_COMPAT comments.
973
974	2000-02-23 Linas Vepstas <linas@linas.org>
975
976	* i370.h: New file.
977
978	2000-02-22 Chandra Chavva <cchavva@cygnus.com>
979
980	* d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
981	cannot be combined in parallel with ADD/SUBppp.
982
983	2000-02-22 Andrew Haley <aph@cygnus.com>
984
985	* mips.h: (OPCODE_IS_MEMBER): Add comment.
986
987	1999-12-30 Andrew Haley <aph@cygnus.com>
988
989	* mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
990	whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
991	insns.
992
993	2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
994
995	* i386.h: Qualify intel mode far call and jmp with x_Suf.
996
997	1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
998
999	* i386.h: Add JumpAbsolute qualifier to all non-intel mode
1000	indirect jumps and calls. Add FF/3 call for intel mode.
1001
1002	Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
1003
1004	* mn10300.h: Add new operand types. Add new instruction formats.
1005
1006	Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
1007
1008	* hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
1009	instruction.
1010
1011	1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
1012
1013	* mips.h (INSN_ISA5): New.
1014
1015	1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
1016
1017	* mips.h (OPCODE_IS_MEMBER): New.
1018
1019	1999-10-29 Nick Clifton <nickc@cygnus.com>
1020
1021	* d30v.h (SHORT_AR): Define.
1022
1023	1999-10-18 Michael Meissner <meissner@cygnus.com>
1024
1025	* alpha.h (alpha_num_opcodes): Convert to unsigned.
1026	(alpha_num_operands): Ditto.
1027
1028	Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
1029
1030	* hppa.h (pa_opcodes): Add load and store cache control to
1031	instructions. Add ordered access load and store.
1032
1033	* hppa.h (pa_opcode): Add new entries for addb and addib.
1034
1035	* hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
1036
1037	* hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
1038
1039	Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
1040
1041	* d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
1042
1043	Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1044
1045	* hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
1046	and "be" using completer prefixes.
1047
1048	* hppa.h (pa_opcodes): Add initializers to silence compiler.
1049
1050	* hppa.h: Update comments about character usage.
1051
1052	Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
1053
1054	* hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
1055	up the new fstw & bve instructions.
1056
1057	Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
1058
1059	* hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
1060	instructions.
1061
1062	* hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
1063
1064	* hppa.h (pa_opcodes): Add long offset double word load/store
1065	instructions.
1066
1067	* hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
1068	stores.
1069
1070	* hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
1071
1072	* hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
1073
1074	* hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
1075
1076	* hppa.h (pa_opcodes): Add new syntax "be" instructions.
1077
1078	* hppa.h (pa_opcodes): Note use of 'M' and 'L'.
1079
1080	* hppa.h (pa_opcodes): Add support for "b,l".
1081
1082	* hppa.h (pa_opcodes): Add support for "b,gate".
1083
1084	Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
1085
1086	* hppa.h (pa_opcodes): Use 'fX' for first register operand
1087	in xmpyu.
1088
1089	* hppa.h (pa_opcodes): Fix mask for probe and probei.
1090
1091	* hppa.h (pa_opcodes): Fix mask for depwi.
1092
1093	Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
1094
1095	* hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
1096	an explicit output argument.
1097
1098	Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
1099
1100	* hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
1101	Add a few PA2.0 loads and store variants.
1102
1103	1999-09-04 Steve Chamberlain <sac@pobox.com>
1104
1105	* pj.h: New file.
1106
1107	1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
1108
1109	* i386.h (i386_regtab): Move %st to top of table, and split off
1110	other fp reg entries.
1111	(i386_float_regtab): To here.
1112
1113	Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1114
1115	* hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1116	by 'f'.
1117
1118	* hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1119	Add supporting args.
1120
1121	* hppa.h: Document new completers and args.
1122	* hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1123	uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1124	extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1125	pmenb and pmdis.
1126
1127	* hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
1128	hshr, hsub, mixh, mixw, permh.
1129
1130	* hppa.h (pa_opcodes): Change completers in instructions to
1131	use 'c' prefix.
1132
1133	* hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
1134	hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1135
1136	* hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1137	fnegabs to use 'I' instead of 'F'.
1138
1139	1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1140
1141	* i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1142	Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1143	Alphabetically sort PIII insns.
1144
1145	Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1146
1147	* cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1148
1149	Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1150
1151	* hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1152	and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1153
1154	* hppa.h: Document 64 bit condition completers.
1155
1156	Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1157
1158	* hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1159
1160	1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1161
1162	* i386.h (i386_optab): Add DefaultSize modifier to all insns
1163	that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1164	sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1165
1166	Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1167	Jeff Law <law@cygnus.com>
1168
1169	* hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1170
1171	* hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
1172
1173	* hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
1174	and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1175
1176	1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1177
1178	* i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1179
1180	Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1181
1182	* hppa.h (struct pa_opcode): Add new field "flags".
1183	(FLAGS_STRICT): Define.
1184
1185	Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1186	Jeff Law <law@cygnus.com>
1187
1188	* hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1189
1190	* hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
1191
1192	1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1193
1194	* i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1195	lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1196	flag to fcomi and friends.
1197
1198	Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1199
1200	* hppa.h (pa_opcodes): Move integer arithmetic instructions after
1201	integer logical instructions.
1202
1203	1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1204
1205	* m68k.h: Document new formats `E', `G', `H' and new places `N',
1206	`n', `o'.
1207
1208	* m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1209	and new places `m', `M', `h'.
1210
1211	Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1212
1213	* hppa.h (pa_opcodes): Add several processor specific system
1214	instructions.
1215
1216	Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1217
1218	* hppa.h (pa_opcodes): Add second entry for "comb", "comib",
1219	"addb", and "addib" to be used by the disassembler.
1220
1221	1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1222
1223	* i386.h (ReverseModrm): Remove all occurences.
1224	(InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1225	movmskps, pextrw, pmovmskb, maskmovq.
1226	Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1227	ignore the data size prefix.
1228
1229	* i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1230	Mostly stolen from Doug Ledford <dledford@redhat.com>
1231
1232	Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1233
1234	* ppc.h (PPC_OPCODE_64_BRIDGE): New.
1235
1236	1999-04-14 Doug Evans <devans@casey.cygnus.com>
1237
1238	* cgen.h (CGEN_ATTR): Delete member num_nonbools.
1239	(CGEN_ATTR_TYPE): Update.
1240	(CGEN_ATTR_MASK): Number booleans starting at 0.
1241	(CGEN_ATTR_VALUE): Update.
1242	(CGEN_INSN_ATTR): Update.
1243
1244	Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1245
1246	* hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1247	instructions.
1248
1249	Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1250
1251	* hppa.h (bb, bvb): Tweak opcode/mask.
1252
1253
1254	1999-03-22 Doug Evans <devans@casey.cygnus.com>
1255
1256	* cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1257	(struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1258	New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1259	min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1260	Delete member max_insn_size.
1261	(enum cgen_cpu_open_arg): New enum.
1262	(cpu_open): Update prototype.
1263	(cpu_open_1): Declare.
1264	(cgen_set_cpu): Delete.
1265
1266	1999-03-11 Doug Evans <devans@casey.cygnus.com>
1267
1268	* cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1269	(CGEN_OPERAND_NIL): New macro.
1270	(CGEN_OPERAND): New member `type'.
1271	(@arch@_cgen_operand_table): Delete decl.
1272	(CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1273	(CGEN_OPERAND_TABLE): New struct.
1274	(cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1275	(CGEN_OPINST): Pointer to operand table entry replaced with enum.
1276	(CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1277	now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1278	{get,set}_{int,vma}_operand.
1279	(@arch@_cgen_cpu_open): New arg `isa'.
1280	(cgen_set_cpu): Ditto.
1281
1282	Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1283
1284	* i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1285
1286	1999-02-25 Doug Evans <devans@casey.cygnus.com>
1287
1288	* cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1289	(CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1290	enum cgen_hw_type.
1291	(CGEN_HW_TABLE): New struct.
1292	(hw_table): Delete declaration.
1293	(CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1294	to table entry to enum.
1295	(CGEN_OPINST): Ditto.
1296	(CGEN_CPU_TABLE): Change member hw_list to hw_table.
1297
1298	Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1299
1300	* alpha.h (AXP_OPCODE_EV6): New.
1301	(AXP_OPCODE_NOPAL): Include it.
1302
1303	1999-02-09 Doug Evans <devans@casey.cygnus.com>
1304
1305	* cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1306	All uses updated. New members int_insn_p, max_insn_size,
1307	parse_operand,insert_operand,extract_operand,print_operand,
1308	sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1309	get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1310	extract_handlers,print_handlers.
1311	(CGEN_ATTR): Change type of num_nonbools to unsigned int.
1312	(CGEN_ATTR_BOOL_OFFSET): New macro.
1313	(CGEN_ATTR_MASK): Subtract it to compute bit number.
1314	(CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1315	(cgen_opcode_handler): Renamed from cgen_base.
1316	(CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1317	(CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1318	all uses updated.
1319	(CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1320	(enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1321	(CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1322	(CGEN_OPCODE,CGEN_IBASE): New types.
1323	(CGEN_INSN): Rewrite.
1324	(CGEN_{ASM,DIS}_HASH*): Delete.
1325	(init_opcode_table,init_ibld_table): Declare.
1326	(CGEN_INSN_ATTR): New type.
1327
1328	Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
1329
1330	* i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1331	(x_FP, d_FP, dls_FP, sldx_FP): Define.
1332	Change *Suf definitions to include x and d suffixes.
1333	(movsx): Use w_Suf and b_Suf.
1334	(movzx): Likewise.
1335	(movs): Use bwld_Suf.
1336	(fld): Change ordering. Use sld_FP.
1337	(fild): Add Intel Syntax equivalent of fildq.
1338	(fst): Use sld_FP.
1339	(fist): Use sld_FP.
1340	(fstp): Use sld_FP. Add x_FP version.
1341	(fistp): LLongMem version for Intel Syntax.
1342	(fcom, fcomp): Use sld_FP.
1343	(fadd, fiadd, fsub): Use sld_FP.
1344	(fsubr): Use sld_FP.
1345	(fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1346
1347	1999-01-27 Doug Evans <devans@casey.cygnus.com>
1348
1349	* cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1350	CGEN_MODE_UINT.
1351
1352	1999-01-16 Jeffrey A Law (law@cygnus.com)
1353
1354	* hppa.h (bv): Fix mask.
1355
1356	1999-01-05 Doug Evans <devans@casey.cygnus.com>
1357
1358	* cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1359	(CGEN_ATTR): Use it.
1360	(CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1361	(CGEN_ATTR_TABLE): New member dfault.
1362
1363	1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1364
1365	* mips.h (MIPS16_INSN_BRANCH): New.
1366
1367	Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1368
1369	The following is part of a change made by Edith Epstein
1370	<eepstein@sophia.cygnus.com> as part of a project to merge in
1371	changes by HP; HP did not create ChangeLog entries.
1372
1373	* hppa.h (completer_chars): list of chars to not put a space
1374	after.
1375
1376	Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1377
1378	* i386.h (i386_optab): Permit w suffix on processor control and
1379	status word instructions.
1380
1381	1998-11-30 Doug Evans <devans@casey.cygnus.com>
1382
1383	* cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1384	(struct cgen_keyword_entry): Ditto.
1385	(struct cgen_operand): Ditto.
1386	(CGEN_IFLD): New typedef, with associated access macros.
1387	(CGEN_IFMT): New typedef, with associated access macros.
1388	(CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1389	(CGEN_IVALUE): New typedef.
1390	(struct cgen_insn): Delete const on syntax,attrs members.
1391	`format' now points to format data. Type of `value' is now
1392	CGEN_IVALUE.
1393	(struct cgen_opcode_table): New member ifld_table.
1394
1395	1998-11-18 Doug Evans <devans@casey.cygnus.com>
1396
1397	* cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1398	(CGEN_OPERAND_INSTANCE): New member `attrs'.
1399	(CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1400	(cgen_dis_lookup_insn): Update type of `base_insn' arg.
1401	(cgen_opcode_table): Update type of dis_hash fn.
1402	(extract_operand): Update type of `insn_value' arg.
1403
1404	Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1405
1406	* cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1407
1408	Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1409
1410	* mips.h (INSN_MULT): Added.
1411
1412	Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1413
1414	* i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1415
1416	Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1417
1418	* cgen.h (CGEN_INSN_INT): New typedef.
1419	(CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1420	(CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1421	(CGEN_INSN_BYTES_PTR): New typedef.
1422	(CGEN_EXTRACT_INFO): New typedef.
1423	(cgen_insert_fn,cgen_extract_fn): Update.
1424	(cgen_opcode_table): New member `insn_endian'.
1425	(assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1426	(insert_operand,extract_operand): Update.
1427	(cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1428
1429	Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1430
1431	* cgen.h (CGEN_ATTR_BOOLS): New macro.
1432	(struct CGEN_HW_ENTRY): New member `attrs'.
1433	(CGEN_HW_ATTR): New macro.
1434	(struct CGEN_OPERAND_INSTANCE): New member `name'.
1435	(CGEN_INSN_INVALID_P): New macro.
1436
1437	Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1438
1439	* hppa.h: Add "fid".
1440
1441	Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1442
1443	From Robert Andrew Dale <rob@nb.net>
1444	* i386.h (i386_optab): Add AMD 3DNow! instructions.
1445	(AMD_3DNOW_OPCODE): Define.
1446
1447	Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1448
1449	* d30v.h (EITHER_BUT_PREFER_MU): Define.
1450
1451	Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1452
1453	* cgen.h (cgen_insn): #if 0 out element `cdx'.
1454
1455	Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1456
1457	Move all global state data into opcode table struct, and treat
1458	opcode table as something that is "opened/closed".
1459	* cgen.h (CGEN_OPCODE_DESC): New type.
1460	(all fns): New first arg of opcode table descriptor.
1461	(cgen_set_parse_operand_fn): Add prototype.
1462	(cgen_current_machine,cgen_current_endian): Delete.
1463	(CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1464	parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1465	dis_hash_table,dis_hash_table_entries.
1466	(opcode_open,opcode_close): Add prototypes.
1467
1468	* cgen.h (cgen_insn): New element `cdx'.
1469
1470	Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1471
1472	* d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1473
1474	Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1475
1476	* mn10300.h: Add "no_match_operands" field for instructions.
1477	(MN10300_MAX_OPERANDS): Define.
1478
1479	Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1480
1481	* cgen.h (cgen_macro_insn_count): Declare.
1482
1483	Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1484
1485	* cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1486	(cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1487	(get_operand,put_operand): Replaced with get_{int,vma}_operand,
1488	set_{int,vma}_operand.
1489
1490	Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1491
1492	* mn10300.h: Add "machine" field for instructions.
1493	(MN103, AM30): Define machine types.
1494
1495	Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1496
1497	* i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1498
1499	1998-06-18 Ulrich Drepper <drepper@cygnus.com>
1500
1501	* i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1502
1503	Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1504
1505	* i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1506	and ud2b.
1507	(i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1508	those that happen to be implemented on pentiums.
1509
1510	Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1511
1512	* i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1513	IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1514	with Size16\|IgnoreSize or Size32\|IgnoreSize.
1515
1516	Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1517
1518	* i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1519	(REPE): Rename to REPE_PREFIX_OPCODE.
1520	(i386_regtab_end): Remove.
1521	(i386_prefixtab, i386_prefixtab_end): Remove.
1522	(i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1523	of md_begin.
1524	(MAX_OPCODE_SIZE): Define.
1525	(i386_optab_end): Remove.
1526	(sl_Suf): Define.
1527	(sl_FP): Use sl_Suf.
1528
1529	* i386.h (i386_optab): Allow 16 bit displacement for `mov
1530	mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1531	bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1532	data32, dword, and adword prefixes.
1533	(i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1534	regs.
1535
1536	Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1537
1538	* i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1539
1540	* i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1541	register operands, because this is a common idiom. Flag them with
1542	a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1543	fdivrp because gcc erroneously generates them. Also flag with a
1544	warning.
1545
1546	* i386.h: Add suffix modifiers to most insns, and tighter operand
1547	checks in some cases. Fix a number of UnixWare compatibility
1548	issues with float insns. Merge some floating point opcodes, using
1549	new FloatMF modifier.
1550	(WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1551	consistency.
1552
1553	* i386.h: Change occurence of ShortformW to W\|ShortForm. Add
1554	IgnoreDataSize where appropriate.
1555
1556	Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1557
1558	* i386.h: (one_byte_segment_defaults): Remove.
1559	(two_byte_segment_defaults): Remove.
1560	(i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1561
1562	Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1563
1564	* cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1565	(cgen_hw_lookup_by_num): Declare.
1566
1567	Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1568
1569	* mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1570	ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1571
1572	Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1573
1574	* cgen.h (cgen_asm_init_parse): Delete.
1575	(cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1576	(cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1577
1578	Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1579
1580	* cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1581	(cgen_asm_finish_insn): Update prototype.
1582	(cgen_insn): New members num, data.
1583	(CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1584	dis_hash, dis_hash_table_size moved to ...
1585	(CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1586	All uses updated. New members asm_hash_p, dis_hash_p.
1587	(CGEN_MINSN_EXPANSION): New struct.
1588	(cgen_expand_macro_insn): Declare.
1589	(cgen_macro_insn_count): Declare.
1590	(get_insn_operands): Update prototype.
1591	(lookup_get_insn_operands): Declare.
1592
1593	Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1594
1595	* i386.h (i386_optab): Change iclrKludge and imulKludge to
1596	regKludge. Add operands types for string instructions.
1597
1598	Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1599
1600	* i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1601	table.
1602
1603	Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1604
1605	* i386.h (Z_): Renamed from `_' to avoid clash with common alias
1606	for `gettext'.
1607
1608	Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1609
1610	* i386.h: Remove NoModrm flag from all insns: it's never checked.
1611	Add IsString flag to string instructions.
1612	(IS_STRING): Don't define.
1613	(LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1614	(ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1615	(SS_PREFIX_OPCODE): Define.
1616
1617	Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1618
1619	* i386.h: Revert March 24 patch; no more LinearAddress.
1620
1621	Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1622
1623	* i386.h (i386_optab): Remove fwait (9b) from all floating point
1624	instructions, and instead add FWait opcode modifier. Add short
1625	form of fldenv and fstenv.
1626	(FWAIT_OPCODE): Define.
1627
1628	* i386.h (i386_optab): Change second operand constraint of `mov
1629	sreg,reg\|mem' instruction from Reg16\|Mem to WordReg\|WordMem to
1630	allow legal instructions such as `movl %gs,%esi'
1631
1632	Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1633
1634	* h8300.h: Various changes to fully bracket initializers.
1635
1636	Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1637
1638	* i386.h: Set LinearAddress for lidt and lgdt.
1639
1640	Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1641
1642	* cgen.h (CGEN_BOOL_ATTR): New macro.
1643
1644	Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1645
1646	* d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1647
1648	Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1649
1650	* cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1651	(cgen_insn): Record syntax and format entries here, rather than
1652	separately.
1653
1654	Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1655
1656	* cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1657
1658	Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1659
1660	* cgen.h (cgen_insert_fn): Change type of result to const char *.
1661	(cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1662	(CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1663
1664	Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1665
1666	* cgen.h (lookup_insn): New argument alias_p.
1667
1668	Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1669
1670	Fix rac to accept only a0:
1671	* d10v.h (OPERAND_ACC): Split into:
1672	(OPERAND_ACC0, OPERAND_ACC1) .
1673	(OPERAND_GPR): Define.
1674
1675	Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1676
1677	* cgen.h (CGEN_FIELDS): Define here.
1678	(CGEN_HW_ENTRY): New member `type'.
1679	(hw_list): Delete decl.
1680	(enum cgen_mode): Declare.
1681	(CGEN_OPERAND): New member `hw'.
1682	(enum cgen_operand_instance_type): Declare.
1683	(CGEN_OPERAND_INSTANCE): New type.
1684	(CGEN_INSN): New member `operands'.
1685	(CGEN_OPCODE_DATA): Make hw_list const.
1686	(get_insn_operands,lookup_insn): Add prototypes for.
1687
1688	Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1689
1690	* cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1691	(CGEN_HW_ENTRY): Move `next' entry to end of struct.
1692	(CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1693	(CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1694
1695	Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1696
1697	* cgen.h: Correct typo in comment end marker.
1698
1699	Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1700
1701	* tic30.h: New file.
1702
1703	Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1704
1705	* cgen.h: Add prototypes for cgen_save_fixups(),
1706	cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1707	of cgen_asm_finish_insn() to return a char *.
1708
1709	Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1710
1711	* cgen.h: Formatting changes to improve readability.
1712
1713	Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1714
1715	* cgen.h (*): Clean up pass over `struct foo' usage.
1716	(CGEN_ATTR): Make unsigned char.
1717	(CGEN_ATTR_TYPE): Update.
1718	(CGEN_ATTR_{ENTRY,TABLE}): New types.
1719	(cgen_base): Move member `attrs' to cgen_insn.
1720	(CGEN_KEYWORD): New member `null_entry'.
1721	(CGEN_{SYNTAX,FORMAT}): New types.
1722	(cgen_insn): Format and syntax separated from each other.
1723
1724	Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1725
1726	* d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1727	2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1728	flags_{used,set} long.
1729	(d30v_operand): Make flags field long.
1730
1731	Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1732
1733	* m68k.h: Fix comment describing operand types.
1734
1735	Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1736
1737	* d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1738	everything else after down.
1739
1740	Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1741
1742	* d10v.h (OPERAND_FLAG): Split into:
1743	(OPERAND_FFLAG, OPERAND_CFLAG) .
1744
1745	Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1746
1747	* mips.h (struct mips_opcode): Changed comments to reflect new
1748	field usage.
1749
1750	Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1751
1752	* mips.h: Added to comments a quick-ref list of all assigned
1753	operand type characters.
1754	(OP_{MASK,SH}_PERFREG): New macros.
1755
1756	Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1757
1758	* sparc.h: Add '_' and '/' for v9a asr's.
1759	Patch from David Miller <davem@vger.rutgers.edu>
1760
1761	Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1762
1763	* h8300.h: Bit ops with absolute addresses not in the 8 bit
1764	area are not available in the base model (H8/300).
1765
1766	Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1767
1768	* m68k.h: Remove documentation of ` operand specifier.
1769
1770	Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1771
1772	* m68k.h: Document q and v operand specifiers.
1773
1774	Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1775
1776	* v850.h (struct v850_opcode): Add processors field.
1777	(PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1778	(PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1779	(PROCESSOR_V850EA): New bit constants.
1780
1781	Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1782
1783	Merge changes from Martin Hunt:
1784
1785	* d30v.h: Allow up to 64 control registers. Add
1786	SHORT_A5S format.
1787
1788	* d30v.h (LONG_Db): New form for delayed branches.
1789
1790	* d30v.h: (LONG_Db): New form for repeati.
1791
1792	* d30v.h (SHORT_D2B): New form.
1793
1794	* d30v.h (SHORT_A2): New form.
1795
1796	* d30v.h (OPERAND_2REG): Add new operand to indicate 2
1797	registers are used. Needed for VLIW optimization.
1798
1799	Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1800
1801	* cgen.h: Move assembler interface section
1802	up so cgen_parse_operand_result is defined for cgen_parse_address.
1803	(cgen_parse_address): Update prototype.
1804
1805	Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1806
1807	* v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1808
1809	Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1810
1811	* i386.h (two_byte_segment_defaults): Correct base register 5 in
1812	modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1813	<paubert@iram.es>.
1814
1815	* i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1816	<paubert@iram.es>.
1817
1818	* i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1819	<paubert@iram.es>.
1820
1821	* i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1822	(JUMP_ON_ECX_ZERO): Remove commented out macro.
1823
1824	Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1825
1826	* v850.h (V850_NOT_R0): New flag.
1827
1828	Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1829
1830	* v850.h (struct v850_opcode): Remove flags field.
1831
1832	Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1833
1834	* v850.h (struct v850_opcode): Add flags field.
1835	(struct v850_operand): Extend meaning of 'bits' and 'shift'
1836	fields.
1837	(V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1838	(V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1839
1840	Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1841
1842	* arc.h: New file.
1843
1844	Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1845
1846	* sparc.h (sparc_opcodes): Declare as const.
1847
1848	Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1849
1850	* mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1851	uses single or double precision floating point resources.
1852	(INSN_NO_ISA, INSN_ISA1): Define.
1853	(cpu specific INSN macros): Tweak into bitmasks outside the range
1854	of INSN_ISA field.
1855
1856	Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1857
1858	* i386.h: Fix pand opcode.
1859
1860	Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1861
1862	* mips.h: Widen INSN_ISA and move it to a more convenient
1863	bit position. Add INSN_3900.
1864
1865	Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1866
1867	* mips.h (struct mips_opcode): added new field membership.
1868
1869	Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1870
1871	* i386.h (movd): only Reg32 is allowed.
1872
1873	* i386.h: add fcomp and ud2. From Wayne Scott
1874	<wscott@ichips.intel.com>.
1875
1876	Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1877
1878	* i386.h: Add MMX instructions.
1879
1880	Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1881
1882	* i386.h: Remove W modifier from conditional move instructions.
1883
1884	Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1885
1886	* i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1887	with no arguments to match that generated by the UnixWare
1888	assembler.
1889
1890	Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1891
1892	* cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1893	(cgen_parse_operand_fn): Declare.
1894	(cgen_init_parse_operand): Declare.
1895	(cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1896	new argument `want'.
1897	(enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1898	(enum cgen_parse_operand_type): New enum.
1899
1900	Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1901
1902	* i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1903
1904	Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1905
1906	* cgen.h: New file.
1907
1908	Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1909
1910	* i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1911	fdivrp.
1912
1913	Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1914
1915	* v850.h (extract): Make unsigned.
1916
1917	Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1918
1919	* i386.h: Add iclr.
1920
1921	Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1922
1923	* i386.h: Change DW to W for cmpxchg and xadd, since they don't
1924	take a direction bit.
1925
1926	Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1927
1928	* sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1929
1930	Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1931
1932	* sparc.h: Include <ansidecl.h>. Update function declarations to
1933	use prototypes, and to use const when appropriate.
1934
1935	Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1936
1937	* mn10300.h (MN10300_OPERAND_RELAX): Define.
1938
1939	Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1940
1941	* d10v.h: Change pre_defined_registers to
1942	d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1943
1944	Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1945
1946	* mips.h: Add macros for cop0, cop1 cop2 and cop3.
1947	Change mips_opcodes from const array to a pointer,
1948	and change bfd_mips_num_opcodes from const int to int,
1949	so that we can increase the size of the mips opcodes table
1950	dynamically.
1951
1952	Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1953
1954	* d30v.h (FLAG_X): Remove unused flag.
1955
1956	Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1957
1958	* d30v.h: New file.
1959
1960	Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1961
1962	* tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1963	(PDS_VALUE): Macro to access value field of predefined symbols.
1964	(tic80_next_predefined_symbol): Add prototype.
1965
1966	Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1967
1968	* tic80.h (tic80_symbol_to_value): Change prototype to match
1969	change in function, added class parameter.
1970
1971	Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1972
1973	* tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1974	endmask fields, which are somewhat weird in that 0 and 32 are
1975	treated exactly the same.
1976
1977	Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1978
1979	* tic80.h: Change all the OPERAND defines to use the form (1 << X)
1980	rather than a constant that is 2**X. Reorder them to put bits for
1981	operands that have symbolic names in the upper bits, so they can
1982	be packed into an int where the lower bits contain the value that
1983	corresponds to that symbolic name.
1984	(predefined_symbo): Add struct.
1985	(tic80_predefined_symbols): Declare array of translations.
1986	(tic80_num_predefined_symbols): Declare size of that array.
1987	(tic80_value_to_symbol): Declare function.
1988	(tic80_symbol_to_value): Declare function.
1989
1990	Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1991
1992	* mn10200.h (MN10200_OPERAND_RELAX): Define.
1993
1994	Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1995
1996	* tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1997	be the destination register.
1998
1999	Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
2000
2001	* tic80.h (struct tic80_opcode): Change "format" field to "flags".
2002	(FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
2003	(TIC80_VECTOR): Define a flag bit for the flags. This one means
2004	that the opcode can have two vector instructions in a single
2005	32 bit word and we have to encode/decode both.
2006
2007	Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
2008
2009	* tic80.h (TIC80_OPERAND_PCREL): Renamed from
2010	TIC80_OPERAND_RELATIVE for PC relative.
2011	(TIC80_OPERAND_BASEREL): New flag bit for register
2012	base relative.
2013
2014	Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
2015
2016	* tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
2017
2018	Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
2019
2020	* tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
2021	":s" modifier for scaling.
2022
2023	Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
2024
2025	* tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
2026	(TIC80_OPERAND_M_LI): Ditto
2027
2028	Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
2029
2030	* tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
2031	(TIC80_OPERAND_CC): New define for condition code operand.
2032	(TIC80_OPERAND_CR): New define for control register operand.
2033
2034	Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
2035
2036	* tic80.h (struct tic80_opcode): Name changed.
2037	(struct tic80_opcode): Remove format field.
2038	(struct tic80_operand): Add insertion and extraction functions.
2039	(TIC80_OPERAND_*): Remove old bogus values, start adding new
2040	correct ones.
2041	(FMT_*): Ditto.
2042
2043	Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
2044
2045	* v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
2046	type IV instruction offsets.
2047
2048	Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
2049
2050	* tic80.h: New file.
2051
2052	Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
2053
2054	* mn10200.h (MN10200_OPERAND_NOCHECK): Define.
2055
2056	Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
2057
2058	* mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
2059	* mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
2060	* v850.h: Fix comment, v850_operand not powerpc_operand.
2061
2062	Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
2063
2064	* mn10200.h: Flesh out structures and definitions needed by
2065	the mn10200 assembler & disassembler.
2066
2067	Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
2068
2069	* mips.h: Add mips16 definitions.
2070
2071	Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
2072
2073	* m68k.h: Document new <, >, m, n, o and p operand specifiers.
2074
2075	Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
2076
2077	* mn10300.h (MN10300_OPERAND_PCREL): Define.
2078	(MN10300_OPERAND_MEMADDR): Define.
2079
2080	Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
2081
2082	* mn10300.h (MN10300_OPERAND_REG_LIST): Define.
2083
2084	Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
2085
2086	* mn10300.h (MN10300_OPERAND_SPLIT): Define.
2087
2088	Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
2089
2090	* mn10300.h (MN10300_OPERAND_EXTENDED): Define.
2091
2092	Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
2093
2094	* mn10300.h (MN10300_OPERAND_REPEATED): Define.
2095
2096	Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
2097
2098	* alpha.h: Don't include "bfd.h"; private relocation types are now
2099	negative to minimize problems with shared libraries. Organize
2100	instruction subsets by AMASK extensions and PALcode
2101	implementation.
2102	(struct alpha_operand): Move flags slot for better packing.
2103
2104	Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
2105
2106	* v850.h (V850_OPERAND_RELAX): New operand flag.
2107
2108	Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
2109
2110	* mn10300.h (FMT_*): Move operand format definitions
2111	here.
2112
2113	Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
2114
2115	* mn10300.h (MN10300_OPERAND_PAREN): Define.
2116
2117	Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2118
2119	* mn10300.h (mn10300_opcode): Add "format" field.
2120	(MN10300_OPERAND_*): Define.
2121
2122	Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2123
2124	* mn10x00.h: Delete.
2125	* mn10200.h, mn10300.h: New files.
2126
2127	Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2128
2129	* mn10x00.h: New file.
2130
2131	Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2132
2133	* v850.h: Add new flag to indicate this instruction uses a PC
2134	displacement.
2135
2136	Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2137
2138	* h8300.h (stmac): Add missing instruction.
2139
2140	Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2141
2142	* v850.h (v850_opcode): Remove "size" field. Add "memop"
2143	field.
2144
2145	Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2146
2147	* v850.h (V850_OPERAND_EP): Define.
2148
2149	* v850.h (v850_opcode): Add size field.
2150
2151	Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2152
2153	* v850.h (v850_operands): Add insert and extract fields, pointers
2154	to functions used to handle unusual operand encoding.
2155	(V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
2156	V850_OPERAND_SIGNED): Defined.
2157
2158	Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2159
2160	* v850.h (v850_operands): Add flags field.
2161	(OPERAND_REG, OPERAND_NUM): Defined.
2162
2163	Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2164
2165	* v850.h: New file.
2166
2167	Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2168
2169	* mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
2170	OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2171	OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2172	OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2173	OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2174	Defined.
2175
2176	Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2177
2178	* hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2179	a 3 bit space id instead of a 2 bit space id.
2180
2181	Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2182
2183	* d10v.h: Add some additional defines to support the
2184	assembler in determining which operations can be done in parallel.
2185
2186	Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2187
2188	* h8300.h (SN): Define.
2189	(eepmov.b): Renamed from "eepmov"
2190	(nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2191	with them.
2192
2193	Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2194
2195	* d10v.h (OPERAND_SHIFT): New operand flag.
2196
2197	Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2198
2199	* d10v.h: Changes for divs, parallel-only instructions, and
2200	signed numbers.
2201
2202	Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2203
2204	* d10v.h (pd_reg): Define. Putting the definition here allows
2205	the assembler and disassembler to share the same struct.
2206
2207	Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2208
2209	* i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2210	Williams <steve@icarus.com>.
2211
2212	Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2213
2214	* d10v.h: New file.
2215
2216	Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2217
2218	* h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2219
2220	Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2221
2222	* m68k.h (mcf5200): New macro.
2223	Document names of coldfire control registers.
2224
2225	Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2226
2227	* h8300.h (SRC_IN_DST): Define.
2228
2229	* h8300.h (UNOP3): Mark the register operand in this insn
2230	as a source operand, not a destination operand.
2231	(SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2232	(UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2233	register operand with SRC_IN_DST.
2234
2235	Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2236
2237	* alpha.h: New file.
2238
2239	Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2240
2241	* rs6k.h: Remove obsolete file.
2242
2243	Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2244
2245	* i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2246	fdivp, and fdivrp. Add ffreep.
2247
2248	Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2249
2250	* h8300.h: Reorder various #defines for readability.
2251	(ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2252	(BITOP): Accept additional (unused) argument. All callers changed.
2253	(EBITOP): Likewise.
2254	(O_LAST): Bump.
2255	(ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2256
2257	* h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2258	(O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2259	(BITOP, EBITOP): Handle new H8/S addressing modes for
2260	bit insns.
2261	(UNOP3): Handle new shift/rotate insns on the H8/S.
2262	(insns using exr): New instructions.
2263	(tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2264
2265	Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2266
2267	* h8300.h (add.l): Undo Apr 5th change. The manual I had
2268	was incorrect.
2269
2270	Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2271
2272	* h8300.h (START): Remove.
2273	(MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2274	and mov.l insns that can be relaxed.
2275
2276	Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2277
2278	* i386.h: Remove Abs32 from lcall.
2279
2280	Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2281
2282	* sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2283	(SLCPOP): New macro.
2284	Mark X,Y opcode letters as in use.
2285
2286	Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2287
2288	* sparc.h (F_FLOAT, F_FBR): Define.
2289
2290	Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2291
2292	* h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2293	from all insns.
2294	(ABS8SRC,ABS8DST): Add ABS8MEM.
2295	(add.l): Fix reg+reg variant.
2296	(eepmov.w): Renamed from eepmovw.
2297	(ldc,stc): Fix many cases.
2298
2299	Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2300
2301	* sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2302
2303	Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2304
2305	* sparc.h (O): Mark operand letter as in use.
2306
2307	Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2308
2309	* sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2310	Mark operand letters uU as in use.
2311
2312	Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2313
2314	* sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2315	(sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2316	(SPARC_OPCODE_SUPPORTED): New macro.
2317	(SPARC_OPCODE_CONFLICT_P): Rewrite.
2318	(F_NOTV9): Delete.
2319
2320	Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2321
2322	* sparc.h (sparc_opcode_lookup_arch) Make return type in
2323	declaration consistent with return type in definition.
2324
2325	Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2326
2327	* i386.h (i386_optab): Remove Data32 from pushf and popf.
2328
2329	Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2330
2331	* i386.h (i386_regtab): Add 80486 test registers.
2332
2333	Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2334
2335	* i960.h (I_HX): Define.
2336	(i960_opcodes): Add HX instruction.
2337
2338	Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2339
2340	* i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2341	and fclex.
2342
2343	Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2344
2345	* sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2346	(SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2347	(bfd_* defines): Delete.
2348	(sparc_opcode_archs): Replaces architecture_pname.
2349	(sparc_opcode_lookup_arch): Declare.
2350	(NUMOPCODES): Delete.
2351
2352	Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2353
2354	* sparc.h (enum sparc_architecture): Add v9a.
2355	(ARCHITECTURES_CONFLICT_P): Update.
2356
2357	Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2358
2359	* i386.h: Added Pentium Pro instructions.
2360
2361	Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2362
2363	* m68k.h: Document new 'W' operand place.
2364
2365	Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2366
2367	* hppa.h: Add lci and syncdma instructions.
2368
2369	Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2370
2371	* mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
2372	instructions.
2373
2374	Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2375
2376	* ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2377	assembler's -mcom and -many switches.
2378
2379	Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2380
2381	* i386.h: Fix cmpxchg8b extension opcode description.
2382
2383	Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2384
2385	* i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2386	and register cr4.
2387
2388	Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2389
2390	* m68k.h: Change comment: split type P into types 0, 1 and 2.
2391
2392	Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2393
2394	* sparc.h (sparc_{encode,decode}_prefetch): Declare.
2395
2396	Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2397
2398	* sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2399
2400	Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2401
2402	* m68kmri.h: Remove.
2403
2404	* m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2405	declarations. Remove F_ALIAS and flag field of struct
2406	m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2407	int. Make name and args fields of struct m68k_opcode const.
2408
2409	Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2410
2411	* sparc.h (F_NOTV9): Define.
2412
2413	Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2414
2415	* mips.h (INSN_4010): Define.
2416
2417	Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2418
2419	* m68k.h (TBL1): Reverse sense of "round" argument in result.
2420
2421	Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2422	* m68k.h: Fix argument descriptions of coprocessor
2423	instructions to allow only alterable operands where appropriate.
2424	[!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2425	(m68k_opcode_aliases): Add more aliases.
2426
2427	Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2428
2429	* m68k.h: Added explcitly short-sized conditional branches, and a
2430	bunch of aliases (fmov, ftest, tdivul) to support gcc's
2431	svr4-based configurations.
2432
2433	Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2434
2435	Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2436	* i386.h: added missing Data16/Data32 flags to a few instructions.
2437
2438	Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2439
2440	* mips.h (OP_MASK_FR, OP_SH_FR): Define.
2441	(OP_MASK_BCC, OP_SH_BCC): Define.
2442	(OP_MASK_PREFX, OP_SH_PREFX): Define.
2443	(OP_MASK_CCC, OP_SH_CCC): Define.
2444	(INSN_READ_FPR_R): Define.
2445	(INSN_RFE): Delete.
2446
2447	Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2448
2449	* m68k.h (enum m68k_architecture): Deleted.
2450	(struct m68k_opcode_alias): New type.
2451	(m68k_opcodes): Now const. Deleted opcode aliases with exactly
2452	matching constraints, values and flags. As a side effect of this,
2453	the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2454	as I know were never used, now may need re-examining.
2455	(numopcodes): Now const.
2456	(m68k_opcode_aliases, numaliases): New variables.
2457	(endop): Deleted.
2458	[DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2459	m68k_opcode_aliases; update declaration of m68k_opcodes.
2460
2461	Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2462
2463	* hppa.h (delay_type): Delete unused enumeration.
2464	(pa_opcode): Replace unused delayed field with an architecture
2465	field.
2466	(pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2467
2468	Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2469
2470	* mips.h (INSN_ISA4): Define.
2471
2472	Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2473
2474	* mips.h (M_DLA_AB, M_DLI): Define.
2475
2476	Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2477
2478	* hppa.h (fstwx): Fix single-bit error.
2479
2480	Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2481
2482	* mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2483
2484	Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2485
2486	* i386.h: added cpuid instruction , and dr[0-7] aliases for the
2487	debug registers. From Charles Hannum (mycroft@netbsd.org).
2488
2489	Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2490
2491	Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2492	i386 support:
2493	* i386.h (MOV_AX_DISP32): New macro.
2494	(i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2495	of several call/return instructions.
2496	(ADDR_PREFIX_OPCODE): New macro.
2497
2498	Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2499
2500	Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2501
2502	* vax.h (struct vot_wot, field `args'): Make it pointer to const
2503	char.
2504	(struct vot, field `name'): ditto.
2505
2506	Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2507
2508	* vax.h: Supply and properly group all values in end sentinel.
2509
2510	Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2511
2512	* mips.h (INSN_ISA, INSN_4650): Define.
2513
2514	Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2515
2516	* a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2517	systems with a separate instruction and data cache, such as the
2518	29040, these instructions take an optional argument.
2519
2520	Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2521
2522	* mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2523	INSN_TRAP.
2524
2525	Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2526
2527	* mips.h (INSN_STORE_MEMORY): Define.
2528
2529	Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2530
2531	* sparc.h: Document new operand type 'x'.
2532
2533	Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2534
2535	* i960.h (I_CX2): New instruction category. It includes
2536	instructions available on Cx and Jx processors.
2537	(I_JX): New instruction category, for JX-only instructions.
2538	(i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2539	Jx-only instructions, in I_JX category.
2540
2541	Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2542
2543	* ns32k.h (endop): Made pointer const too.
2544
2545	Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2546
2547	* ns32k.h: Drop Q operand type as there is no correct use
2548	for it. Add I and Z operand types which allow better checking.
2549
2550	Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2551
2552	* h8300.h (xor.l) :fix bit pattern.
2553	(L_2): New size of operand.
2554	(trapa): Use it.
2555
2556	Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2557
2558	* m68k.h: Move "trap" before "tpcc" to change disassembly.
2559
2560	Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2561
2562	* sparc.h: Include v9 definitions.
2563
2564	Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2565
2566	* m68k.h (m68060): Defined.
2567	(m68040up, mfloat, mmmu): Include it.
2568	(struct m68k_opcode): Widen `arch' field.
2569	(m68k_opcodes): Updated for M68060. Removed comments that were
2570	instructions commented out by "JF" years ago.
2571
2572	Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2573
2574	* m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2575	add a one-bit `flags' field.
2576	(F_ALIAS): New macro.
2577
2578	Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2579
2580	* h8300.h (dec, inc): Get encoding right.
2581
2582	Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2583
2584	* ppc.h (struct powerpc_operand): Removed signedp field; just use
2585	a flag instead.
2586	(PPC_OPERAND_SIGNED): Define.
2587	(PPC_OPERAND_SIGNOPT): Define.
2588
2589	Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2590
2591	* i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2592	prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2593
2594	Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2595
2596	* i386.h: Reverse last change. It'll be handled in gas instead.
2597
2598	Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2599
2600	* i386.h (sar): Disabled the two-operand Imm1 form, since it was
2601	slower on the 486 and used the implicit shift count despite the
2602	explicit operand. The one-operand form is still available to get
2603	the shorter form with the implicit shift count.
2604
2605	Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2606
2607	* hppa.h: Fix typo in fstws arg string.
2608
2609	Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2610
2611	* ppc.h (struct powerpc_opcode): Make operands field unsigned.
2612
2613	Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2614
2615	* ppc.h (PPC_OPCODE_601): Define.
2616
2617	Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2618
2619	* hppa.h (addb): Use '@' for addb and addib pseudo ops.
2620	(so we can determine valid completers for both addb and addb[tf].)
2621
2622	* hppa.h (xmpyu): No floating point format specifier for the
2623	xmpyu instruction.
2624
2625	Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2626
2627	* ppc.h (PPC_OPERAND_NEXT): Define.
2628	(PPC_OPERAND_NEGATIVE): Change value to make room for above.
2629	(struct powerpc_macro): Define.
2630	(powerpc_macros, powerpc_num_macros): Declare.
2631
2632	Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2633
2634	* ppc.h: New file. Header file for PowerPC opcode table.
2635
2636	Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2637
2638	* hppa.h: More minor template fixes for sfu and copr (to allow
2639	for easier disassembly).
2640
2641	* hppa.h: Fix templates for all the sfu and copr instructions.
2642
2643	Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2644
2645	* i386.h (push): Permit Imm16 operand too.
2646
2647	Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2648
2649	* h8300.h (andc): Exists in base arch.
2650
2651	Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2652
2653	* From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2654	* hppa.h: #undef NONE to avoid conflict with hiux include files.
2655
2656	Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2657
2658	* hppa.h: Add FP quadword store instructions.
2659
2660	Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2661
2662	* mips.h: (M_J_A): Added.
2663	(M_LA): Removed.
2664
2665	Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2666
2667	* mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2668	<mellon@pepper.ncd.com>.
2669
2670	Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2671
2672	* hppa.h: Immediate field in probei instructions is unsigned,
2673	not low-sign extended.
2674
2675	Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2676
2677	* m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2678
2679	Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2680
2681	* i386.h: Add "fxch" without operand.
2682
2683	Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2684
2685	* mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2686
2687	Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2688
2689	* hppa.h: Add gfw and gfr to the opcode table.
2690
2691	Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2692
2693	* m88k.h: extended to handle m88110.
2694
2695	Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2696
2697	* hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2698	addresses.
2699
2700	Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2701
2702	* i960.h (i960_opcodes): Properly bracket initializers.
2703
2704	Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2705
2706	* m88k.h (BOFLAG): rewrite to avoid nested comment.
2707
2708	Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2709
2710	* m68k.h (two): Protect second argument with parentheses.
2711
2712	Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2713
2714	* i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2715	Deleted old in/out instructions in "#if 0" section.
2716
2717	Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2718
2719	* i386.h (i386_optab): Properly bracket initializers.
2720
2721	Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2722
2723	* hppa.h (pa_opcode): Use '\|' for movb and movib insns. (From
2724	Jeff Law, law@cs.utah.edu).
2725
2726	Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2727
2728	* i386.h (lcall): Accept Imm32 operand also.
2729
2730	Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2731
2732	* mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2733	(M_DABS): Added.
2734
2735	Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2736
2737	* mips.h (INSN_*): Changed values. Removed unused definitions.
2738	Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2739	INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2740	INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2741	INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2742	(M_*): Added new values for r6000 and r4000 macros.
2743	(ANY_DELAY): Removed.
2744
2745	Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2746
2747	* mips.h: Added M_LI_S and M_LI_SS.
2748
2749	Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2750
2751	* h8300.h: Get some rare mov.bs correct.
2752
2753	Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2754
2755	* sparc.h: Don't define const ourself; rely on ansidecl.h having
2756	been included.
2757
2758	Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2759
2760	* sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2761	jump instructions, for use in disassemblers.
2762
2763	Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2764
2765	* m88k.h: Make bitfields just unsigned, not unsigned long or
2766	unsigned short.
2767
2768	Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2769
2770	* hppa.h: New argument type 'y'. Use in various float instructions.
2771
2772	Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2773
2774	* hppa.h (break): First immediate field is unsigned.
2775
2776	* hppa.h: Add rfir instruction.
2777
2778	Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2779
2780	* mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2781
2782	Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2783
2784	* mips.h: Reworked the hazard information somewhat, and fixed some
2785	bugs in the instruction hazard descriptions.
2786
2787	Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2788
2789	* m88k.h: Corrected a couple of opcodes.
2790
2791	Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2792
2793	* mips.h: Replaced with version from Ralph Campbell and OSF. The
2794	new version includes instruction hazard information, but is
2795	otherwise reasonably similar.
2796
2797	Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2798
2799	* h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2800
2801	Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2802
2803	Patches from Jeff Law, law@cs.utah.edu:
2804	* hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2805	Make the tables be the same for the following instructions:
2806	"bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2807	"sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2808	"ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2809	"comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2810	"frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2811	"fcmp", and "ftest".
2812
2813	* hppa.h: Make new and old tables the same for "break", "mtctl",
2814	"mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2815	Fix typo in last patch. Collapse several #ifdefs into a
2816	single #ifdef.
2817
2818	* hppa.h: Delete remaining OLD_TABLE code. Bring some
2819	of the comments up-to-date.
2820
2821	* hppa.h: Update "free list" of letters and update
2822	comments describing each letter's function.
2823
2824	Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2825
2826	* h8300.h: Lots of little fixes for the h8/300h.
2827
2828	Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2829
2830	Support for H8/300-H
2831	* h8300.h: Lots of new opcodes.
2832
2833	Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2834
2835	* h8300.h: checkpoint, includes H8/300-H opcodes.
2836
2837	Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2838
2839	* Patches from Jeffrey Law <law@cs.utah.edu>.
2840	* hppa.h: Rework single precision FP
2841	instructions so that they correctly disassemble code
2842	PA1.1 code.
2843
2844	Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2845
2846	* i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2847	mov to allow instructions like mov ss,xyz(ecx) to assemble.
2848
2849	Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2850
2851	* hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2852	gdb will define it for now.
2853
2854	Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2855
2856	* sparc.h: Don't end enumerator list with comma.
2857
2858	Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2859
2860	* Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2861	* mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2862	("bc2t"): Correct typo.
2863	("[ls]wc[023]"): Use T rather than t.
2864	("c[0123]"): Define general coprocessor instructions.
2865
2866	Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2867
2868	* m68k.h: Move split point for gcc compilation more towards
2869	middle.
2870
2871	Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2872
2873	* rs6k.h: Clean up instructions for primary opcode 19 (many were
2874	simply wrong, ics, rfi, & rfsvc were missing).
2875	Add "a" to opr_ext for "bb". Doc fix.
2876
2877	Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2878
2879	* i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2880	* mips.h: Add casts, to suppress warnings about shifting too much.
2881	* m68k.h: Document the placement code '9'.
2882
2883	Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2884
2885	* m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2886	allows callers to break up the large initialized struct full of
2887	opcodes into two half-sized ones. This permits GCC to compile
2888	this module, since it takes exponential space for initializers.
2889	(numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2890
2891	Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2892
2893	* a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2894	* convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2895	initialized structs in it.
2896
2897	Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2898
2899	Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2900	* m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2901	(AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2902
2903	Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2904
2905	* mips.h: document "i" and "j" operands correctly.
2906
2907	Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2908
2909	* mips.h: Removed endianness dependency.
2910
2911	Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2912
2913	* h8300.h: include info on number of cycles per instruction.
2914
2915	Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2916
2917	* hppa.h: Move handy aliases to the front. Fix masks for extract
2918	and deposit instructions.
2919
2920	Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2921
2922	* i386.h: accept shld and shrd both with and without the shift
2923	count argument, which is always %cl.
2924
2925	Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2926
2927	* i386.h (i386_optab_end, i386_regtab_end): Now const.
2928	(one_byte_segment_defaults, two_byte_segment_defaults,
2929	i386_prefixtab_end): Ditto.
2930
2931	Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2932
2933	* vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2934	for operand 2; from John Carr, jfc@dsg.dec.com.
2935
2936	Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2937
2938	* m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2939	always use 16-bit offsets. Makes calculated-size jump tables
2940	feasible.
2941
2942	Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2943
2944	* i386.h: Fix one-operand forms of in* and out* patterns.
2945
2946	Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2947
2948	* m68k.h: Added CPU32 support.
2949
2950	Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2951
2952	* mips.h (break): Disassemble the argument. Patch from
2953	jonathan@cs.stanford.edu (Jonathan Stone).
2954
2955	Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2956
2957	* m68k.h: merged Motorola and MIT syntax.
2958
2959	Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2960
2961	* m68k.h (pmove): make the tests less strict, the 68k book is
2962	wrong.
2963
2964	Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2965
2966	* m68k.h (m68ec030): Defined as alias for 68030.
2967	(m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2968	for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2969	them. Tightened description of "fmovex" to distinguish it from
2970	some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2971	up descriptions that claimed versions were available for chips not
2972	supporting them. Added "pmovefd".
2973
2974	Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2975
2976	* m68k.h: fix where the . goes in divull
2977
2978	Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2979
2980	* m68k.h: the cas2 instruction is supposed to be written with
2981	indirection on the last two operands, which can be either data or
2982	address registers. Added a new operand type 'r' which accepts
2983	either register type. Added new cases for cas2l and cas2w which
2984	use them. Corrected masks for cas2 which failed to recognize use
2985	of address register.
2986
2987	Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2988
2989	* m68k.h: Merged in patches (mostly m68040-specific) from
2990	Colin Smith <colin@wrs.com>.
2991
2992	* m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2993	base). Also cleaned up duplicates, re-ordered instructions for
2994	the sake of dis-assembling (so aliases come after standard names).
2995	* m68kmri.h: Now just defines some macros, and #includes m68k.h.
2996
2997	Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2998
2999	* m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
3000	all missing .s
3001
3002	Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
3003
3004	* sparc.h: Moved tables to BFD library.
3005
3006	* i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
3007
3008	Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
3009
3010	* h8300.h: Finish filling in all the holes in the opcode table,
3011	so that the Lucid C compiler can digest this as well...
3012
3013	Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
3014
3015	* i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
3016	Fix opcodes on various sizes of fild/fist instructions
3017	(16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
3018	Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
3019
3020	Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
3021
3022	* h8300.h: Fill in all the holes in the opcode table so that the
3023	losing HPUX C compiler can digest this...
3024
3025	Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
3026
3027	* mips.h: Fix decoding of coprocessor instructions, somewhat.
3028	(Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
3029
3030	Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
3031
3032	* sparc.h: Add new architecture variant sparclite; add its scan
3033	and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
3034
3035	Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
3036
3037	* mips.h: Add some more opcode synonyms (from Frank Yellin,
3038	fy@lucid.com).
3039
3040	Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
3041
3042	* rs6k.h: New version from IBM (Metin).
3043
3044	Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
3045
3046	* rs6k.h: Fix incorrect extended opcode for instructions `fm'
3047	and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
3048
3049	Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
3050
3051	* rs6k.h: Move from ../../gdb/rs6k-opcode.h.
3052
3053	Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
3054
3055	* m68k.h (one, two): Cast macro args to unsigned to suppress
3056	complaints from compiler and lint about integer overflow during
3057	shift.
3058
3059	Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
3060
3061	* sparc.h (OP): Avoid signed overflow when shifting to high order bit.
3062
3063	Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
3064
3065	* mips.h: Make bitfield layout depend on the HOST compiler,
3066	not on the TARGET system.
3067
3068	Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
3069
3070	* i386.h: added inb, inw, outb, outw opcodes, added att syntax for
3071	scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
3072	<TRANLE@INTELLICORP.COM>.
3073
3074	Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
3075
3076	* h8300.h: turned op_type enum into #define list
3077
3078	Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
3079
3080	* sparc.h: Remove "cypress" architecture. Remove "fitox" and
3081	similar instructions -- they've been renamed to "fitoq", etc.
3082	REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
3083	number of arguments.
3084	* h8300.h: Remove extra ; which produces compiler warning.
3085
3086	Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
3087
3088	* sparc.h: fix opcode for tsubcctv.
3089
3090	Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
3091
3092	* sparc.h: fba and cba are now aliases for fb and cb respectively.
3093
3094	Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
3095
3096	* sparc.h (nop): Made the 'lose' field be even tighter,
3097	so only a standard 'nop' is disassembled as a nop.
3098
3099	Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
3100
3101	* sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
3102	disassembled as a nop.
3103
3104	Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
3105
3106	* m68k.h, sparc.h: ANSIfy enums.
3107
3108	Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
3109
3110	* sparc.h: fix a typo.
3111
3112	Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
3113
3114	* a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3115	m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
3116	vax.h: Renamed from ../<foo>-opcode.h.
3117
3118
3119	Copyright (C) 1991-2003 Free Software Foundation, Inc.
3120
3121	Copying and distribution of this file, with or without modification,
3122	are permitted in any medium without royalty provided the copyright
3123	notice and this notice are preserved.
3124
3125	Local Variables:
3126	mode: change-log
3127	left-margin: 8
3128	fill-column: 74
3129	version-control: never
3130	End:
3131

Note: See TracBrowser for help on using the repository browser.

Download in other formats:

Original Format