Context Navigation

← Previous Revision
Latest Revision
Next Revision →
Blame
Revision Log

bfin.h @ 684

Last change on this file since 684 was 444, checked in by satin@…, 7 years ago
add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc
File size: 43.0 KB

Line
1	/* bfin.h -- Header file for ADI Blackfin opcode table
2	Copyright 2005, 2010, 2011 Free Software Foundation, Inc.
3
4	This file is part of GDB, GAS, and the GNU binutils.
5
6	GDB, GAS, and the GNU binutils are free software; you can redistribute
7	them and/or modify them under the terms of the GNU General Public
8	License as published by the Free Software Foundation; either version 3,
9	or (at your option) any later version.
10
11	GDB, GAS, and the GNU binutils are distributed in the hope that they
12	will be useful, but WITHOUT ANY WARRANTY; without even the implied
13	warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
14	the GNU General Public License for more details.
15
16	You should have received a copy of the GNU General Public License
17	along with this file; see the file COPYING3. If not, write to the Free
18	Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19	MA 02110-1301, USA. */
20
21	#ifndef OPCODE_BFIN_H
22	#define OPCODE_BFIN_H
23
24	/* Common to all DSP32 instructions. */
25	#define BIT_MULTI_INS 0x0800
26
27	/* This just sets the multi instruction bit of a DSP32 instruction. */
28	#define SET_MULTI_INSTRUCTION_BIT(x) x->value \|= BIT_MULTI_INS;
29
30
31	/* DSP instructions (32 bit) */
32
33	/* mmod field. */
34	#define M_S2RND 1
35	#define M_T 2
36	#define M_W32 3
37	#define M_FU 4
38	#define M_TFU 6
39	#define M_IS 8
40	#define M_ISS2 9
41	#define M_IH 11
42	#define M_IU 12
43
44	static inline int is_macmod_pmove (int x)
45	{
46	return (x == 0) \|\| (x == M_IS) \|\| (x == M_FU) \|\| (x == M_S2RND)
47	\|\| (x == M_ISS2) \|\| (x == M_IU);
48	}
49
50	static inline int is_macmod_hmove (int x)
51	{
52	return (x == 0) \|\| (x == M_IS) \|\| (x == M_FU) \|\| (x == M_IU) \|\| (x == M_T)
53	\|\| (x == M_TFU) \|\| (x == M_S2RND) \|\| (x == M_ISS2) \|\| (x == M_IH);
54	}
55
56	static inline int is_macmod_signed (int x)
57	{
58	return (x == 0) \|\| (x == M_IS) \|\| (x == M_T) \|\| (x == M_S2RND)
59	\|\| (x == M_ISS2) \|\| (x == M_IH) \|\| (x == M_W32);
60	}
61
62	/* dsp32mac
63	+----+----+---+---\|---+----+----+---\|---+---+---+---\|---+---+---+---+
64	\| 1 \| 1 \| 0 \| 0 \|.M.\| 0 \| 0 \|.mmod..........\|.MM\|.P.\|.w1\|.op1...\|
65	\|.h01\|.h11\|.w0\|.op0...\|.h00\|.h10\|.dst.......\|.src0......\|.src1......\|
66	+----+----+---+---\|---+----+----+---\|---+---+---+---\|---+---+---+---+
67	*/
68
69	typedef struct
70	{
71	unsigned long opcode;
72	int bits_src1;
73	int mask_src1;
74	int bits_src0;
75	int mask_src0;
76	int bits_dst;
77	int mask_dst;
78	int bits_h10;
79	int mask_h10;
80	int bits_h00;
81	int mask_h00;
82	int bits_op0;
83	int mask_op0;
84	int bits_w0;
85	int mask_w0;
86	int bits_h11;
87	int mask_h11;
88	int bits_h01;
89	int mask_h01;
90	int bits_op1;
91	int mask_op1;
92	int bits_w1;
93	int mask_w1;
94	int bits_P;
95	int mask_P;
96	int bits_MM;
97	int mask_MM;
98	int bits_mmod;
99	int mask_mmod;
100	int bits_code2;
101	int mask_code2;
102	int bits_M;
103	int mask_M;
104	int bits_code;
105	int mask_code;
106	} DSP32Mac;
107
108	#define DSP32Mac_opcode 0xc0000000
109	#define DSP32Mac_src1_bits 0
110	#define DSP32Mac_src1_mask 0x7
111	#define DSP32Mac_src0_bits 3
112	#define DSP32Mac_src0_mask 0x7
113	#define DSP32Mac_dst_bits 6
114	#define DSP32Mac_dst_mask 0x7
115	#define DSP32Mac_h10_bits 9
116	#define DSP32Mac_h10_mask 0x1
117	#define DSP32Mac_h00_bits 10
118	#define DSP32Mac_h00_mask 0x1
119	#define DSP32Mac_op0_bits 11
120	#define DSP32Mac_op0_mask 0x3
121	#define DSP32Mac_w0_bits 13
122	#define DSP32Mac_w0_mask 0x1
123	#define DSP32Mac_h11_bits 14
124	#define DSP32Mac_h11_mask 0x1
125	#define DSP32Mac_h01_bits 15
126	#define DSP32Mac_h01_mask 0x1
127	#define DSP32Mac_op1_bits 16
128	#define DSP32Mac_op1_mask 0x3
129	#define DSP32Mac_w1_bits 18
130	#define DSP32Mac_w1_mask 0x1
131	#define DSP32Mac_p_bits 19
132	#define DSP32Mac_p_mask 0x1
133	#define DSP32Mac_MM_bits 20
134	#define DSP32Mac_MM_mask 0x1
135	#define DSP32Mac_mmod_bits 21
136	#define DSP32Mac_mmod_mask 0xf
137	#define DSP32Mac_code2_bits 25
138	#define DSP32Mac_code2_mask 0x3
139	#define DSP32Mac_M_bits 27
140	#define DSP32Mac_M_mask 0x1
141	#define DSP32Mac_code_bits 28
142	#define DSP32Mac_code_mask 0xf
143
144	#define init_DSP32Mac \
145	{ \
146	DSP32Mac_opcode, \
147	DSP32Mac_src1_bits, DSP32Mac_src1_mask, \
148	DSP32Mac_src0_bits, DSP32Mac_src0_mask, \
149	DSP32Mac_dst_bits, DSP32Mac_dst_mask, \
150	DSP32Mac_h10_bits, DSP32Mac_h10_mask, \
151	DSP32Mac_h00_bits, DSP32Mac_h00_mask, \
152	DSP32Mac_op0_bits, DSP32Mac_op0_mask, \
153	DSP32Mac_w0_bits, DSP32Mac_w0_mask, \
154	DSP32Mac_h11_bits, DSP32Mac_h11_mask, \
155	DSP32Mac_h01_bits, DSP32Mac_h01_mask, \
156	DSP32Mac_op1_bits, DSP32Mac_op1_mask, \
157	DSP32Mac_w1_bits, DSP32Mac_w1_mask, \
158	DSP32Mac_p_bits, DSP32Mac_p_mask, \
159	DSP32Mac_MM_bits, DSP32Mac_MM_mask, \
160	DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \
161	DSP32Mac_code2_bits, DSP32Mac_code2_mask, \
162	DSP32Mac_M_bits, DSP32Mac_M_mask, \
163	DSP32Mac_code_bits, DSP32Mac_code_mask \
164	};
165
166	/* dsp32mult
167	+----+----+---+---\|---+----+----+---\|---+---+---+---\|---+---+---+---+
168	\| 1 \| 1 \| 0 \| 0 \|.M.\| 0 \| 1 \|.mmod..........\|.MM\|.P.\|.w1\|.op1...\|
169	\|.h01\|.h11\|.w0\|.op0...\|.h00\|.h10\|.dst.......\|.src0......\|.src1......\|
170	+----+----+---+---\|---+----+----+---\|---+---+---+---\|---+---+---+---+
171	*/
172
173	typedef DSP32Mac DSP32Mult;
174	#define DSP32Mult_opcode 0xc2000000
175
176	#define init_DSP32Mult \
177	{ \
178	DSP32Mult_opcode, \
179	DSP32Mac_src1_bits, DSP32Mac_src1_mask, \
180	DSP32Mac_src0_bits, DSP32Mac_src0_mask, \
181	DSP32Mac_dst_bits, DSP32Mac_dst_mask, \
182	DSP32Mac_h10_bits, DSP32Mac_h10_mask, \
183	DSP32Mac_h00_bits, DSP32Mac_h00_mask, \
184	DSP32Mac_op0_bits, DSP32Mac_op0_mask, \
185	DSP32Mac_w0_bits, DSP32Mac_w0_mask, \
186	DSP32Mac_h11_bits, DSP32Mac_h11_mask, \
187	DSP32Mac_h01_bits, DSP32Mac_h01_mask, \
188	DSP32Mac_op1_bits, DSP32Mac_op1_mask, \
189	DSP32Mac_w1_bits, DSP32Mac_w1_mask, \
190	DSP32Mac_p_bits, DSP32Mac_p_mask, \
191	DSP32Mac_MM_bits, DSP32Mac_MM_mask, \
192	DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \
193	DSP32Mac_code2_bits, DSP32Mac_code2_mask, \
194	DSP32Mac_M_bits, DSP32Mac_M_mask, \
195	DSP32Mac_code_bits, DSP32Mac_code_mask \
196	};
197
198	/* dsp32alu
199	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
200	\| 1 \| 1 \| 0 \| 0 \|.M.\| 1 \| 0 \| - \| - \| - \|.HL\|.aopcde............\|
201	\|.aop...\|.s.\|.x.\|.dst0......\|.dst1......\|.src0......\|.src1......\|
202	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
203	*/
204
205	typedef struct
206	{
207	unsigned long opcode;
208	int bits_src1;
209	int mask_src1;
210	int bits_src0;
211	int mask_src0;
212	int bits_dst1;
213	int mask_dst1;
214	int bits_dst0;
215	int mask_dst0;
216	int bits_x;
217	int mask_x;
218	int bits_s;
219	int mask_s;
220	int bits_aop;
221	int mask_aop;
222	int bits_aopcde;
223	int mask_aopcde;
224	int bits_HL;
225	int mask_HL;
226	int bits_dontcare;
227	int mask_dontcare;
228	int bits_code2;
229	int mask_code2;
230	int bits_M;
231	int mask_M;
232	int bits_code;
233	int mask_code;
234	} DSP32Alu;
235
236	#define DSP32Alu_opcode 0xc4000000
237	#define DSP32Alu_src1_bits 0
238	#define DSP32Alu_src1_mask 0x7
239	#define DSP32Alu_src0_bits 3
240	#define DSP32Alu_src0_mask 0x7
241	#define DSP32Alu_dst1_bits 6
242	#define DSP32Alu_dst1_mask 0x7
243	#define DSP32Alu_dst0_bits 9
244	#define DSP32Alu_dst0_mask 0x7
245	#define DSP32Alu_x_bits 12
246	#define DSP32Alu_x_mask 0x1
247	#define DSP32Alu_s_bits 13
248	#define DSP32Alu_s_mask 0x1
249	#define DSP32Alu_aop_bits 14
250	#define DSP32Alu_aop_mask 0x3
251	#define DSP32Alu_aopcde_bits 16
252	#define DSP32Alu_aopcde_mask 0x1f
253	#define DSP32Alu_HL_bits 21
254	#define DSP32Alu_HL_mask 0x1
255	#define DSP32Alu_dontcare_bits 22
256	#define DSP32Alu_dontcare_mask 0x7
257	#define DSP32Alu_code2_bits 25
258	#define DSP32Alu_code2_mask 0x3
259	#define DSP32Alu_M_bits 27
260	#define DSP32Alu_M_mask 0x1
261	#define DSP32Alu_code_bits 28
262	#define DSP32Alu_code_mask 0xf
263
264	#define init_DSP32Alu \
265	{ \
266	DSP32Alu_opcode, \
267	DSP32Alu_src1_bits, DSP32Alu_src1_mask, \
268	DSP32Alu_src0_bits, DSP32Alu_src0_mask, \
269	DSP32Alu_dst1_bits, DSP32Alu_dst1_mask, \
270	DSP32Alu_dst0_bits, DSP32Alu_dst0_mask, \
271	DSP32Alu_x_bits, DSP32Alu_x_mask, \
272	DSP32Alu_s_bits, DSP32Alu_s_mask, \
273	DSP32Alu_aop_bits, DSP32Alu_aop_mask, \
274	DSP32Alu_aopcde_bits, DSP32Alu_aopcde_mask, \
275	DSP32Alu_HL_bits, DSP32Alu_HL_mask, \
276	DSP32Alu_dontcare_bits, DSP32Alu_dontcare_mask, \
277	DSP32Alu_code2_bits, DSP32Alu_code2_mask, \
278	DSP32Alu_M_bits, DSP32Alu_M_mask, \
279	DSP32Alu_code_bits, DSP32Alu_code_mask \
280	};
281
282	/* dsp32shift
283	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
284	\| 1 \| 1 \| 0 \| 0 \|.M.\| 1 \| 1 \| 0 \| 0 \| - \| - \|.sopcde............\|
285	\|.sop...\|.HLs...\|.dst0......\| - \| - \| - \|.src0......\|.src1......\|
286	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
287	*/
288
289	typedef struct
290	{
291	unsigned long opcode;
292	int bits_src1;
293	int mask_src1;
294	int bits_src0;
295	int mask_src0;
296	int bits_dst1;
297	int mask_dst1;
298	int bits_dst0;
299	int mask_dst0;
300	int bits_HLs;
301	int mask_HLs;
302	int bits_sop;
303	int mask_sop;
304	int bits_sopcde;
305	int mask_sopcde;
306	int bits_dontcare;
307	int mask_dontcare;
308	int bits_code2;
309	int mask_code2;
310	int bits_M;
311	int mask_M;
312	int bits_code;
313	int mask_code;
314	} DSP32Shift;
315
316	#define DSP32Shift_opcode 0xc6000000
317	#define DSP32Shift_src1_bits 0
318	#define DSP32Shift_src1_mask 0x7
319	#define DSP32Shift_src0_bits 3
320	#define DSP32Shift_src0_mask 0x7
321	#define DSP32Shift_dst1_bits 6
322	#define DSP32Shift_dst1_mask 0x7
323	#define DSP32Shift_dst0_bits 9
324	#define DSP32Shift_dst0_mask 0x7
325	#define DSP32Shift_HLs_bits 12
326	#define DSP32Shift_HLs_mask 0x3
327	#define DSP32Shift_sop_bits 14
328	#define DSP32Shift_sop_mask 0x3
329	#define DSP32Shift_sopcde_bits 16
330	#define DSP32Shift_sopcde_mask 0x1f
331	#define DSP32Shift_dontcare_bits 21
332	#define DSP32Shift_dontcare_mask 0x3
333	#define DSP32Shift_code2_bits 23
334	#define DSP32Shift_code2_mask 0xf
335	#define DSP32Shift_M_bits 27
336	#define DSP32Shift_M_mask 0x1
337	#define DSP32Shift_code_bits 28
338	#define DSP32Shift_code_mask 0xf
339
340	#define init_DSP32Shift \
341	{ \
342	DSP32Shift_opcode, \
343	DSP32Shift_src1_bits, DSP32Shift_src1_mask, \
344	DSP32Shift_src0_bits, DSP32Shift_src0_mask, \
345	DSP32Shift_dst1_bits, DSP32Shift_dst1_mask, \
346	DSP32Shift_dst0_bits, DSP32Shift_dst0_mask, \
347	DSP32Shift_HLs_bits, DSP32Shift_HLs_mask, \
348	DSP32Shift_sop_bits, DSP32Shift_sop_mask, \
349	DSP32Shift_sopcde_bits, DSP32Shift_sopcde_mask, \
350	DSP32Shift_dontcare_bits, DSP32Shift_dontcare_mask, \
351	DSP32Shift_code2_bits, DSP32Shift_code2_mask, \
352	DSP32Shift_M_bits, DSP32Shift_M_mask, \
353	DSP32Shift_code_bits, DSP32Shift_code_mask \
354	};
355
356	/* dsp32shiftimm
357	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
358	\| 1 \| 1 \| 0 \| 0 \|.M.\| 1 \| 1 \| 0 \| 1 \| - \| - \|.sopcde............\|
359	\|.sop...\|.HLs...\|.dst0......\|.immag.................\|.src1......\|
360	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
361	*/
362
363	typedef struct
364	{
365	unsigned long opcode;
366	int bits_src1;
367	int mask_src1;
368	int bits_immag;
369	int mask_immag;
370	int bits_dst0;
371	int mask_dst0;
372	int bits_HLs;
373	int mask_HLs;
374	int bits_sop;
375	int mask_sop;
376	int bits_sopcde;
377	int mask_sopcde;
378	int bits_dontcare;
379	int mask_dontcare;
380	int bits_code2;
381	int mask_code2;
382	int bits_M;
383	int mask_M;
384	int bits_code;
385	int mask_code;
386	} DSP32ShiftImm;
387
388	#define DSP32ShiftImm_opcode 0xc6800000
389	#define DSP32ShiftImm_src1_bits 0
390	#define DSP32ShiftImm_src1_mask 0x7
391	#define DSP32ShiftImm_immag_bits 3
392	#define DSP32ShiftImm_immag_mask 0x3f
393	#define DSP32ShiftImm_dst0_bits 9
394	#define DSP32ShiftImm_dst0_mask 0x7
395	#define DSP32ShiftImm_HLs_bits 12
396	#define DSP32ShiftImm_HLs_mask 0x3
397	#define DSP32ShiftImm_sop_bits 14
398	#define DSP32ShiftImm_sop_mask 0x3
399	#define DSP32ShiftImm_sopcde_bits 16
400	#define DSP32ShiftImm_sopcde_mask 0x1f
401	#define DSP32ShiftImm_dontcare_bits 21
402	#define DSP32ShiftImm_dontcare_mask 0x3
403	#define DSP32ShiftImm_code2_bits 23
404	#define DSP32ShiftImm_code2_mask 0xf
405	#define DSP32ShiftImm_M_bits 27
406	#define DSP32ShiftImm_M_mask 0x1
407	#define DSP32ShiftImm_code_bits 28
408	#define DSP32ShiftImm_code_mask 0xf
409
410	#define init_DSP32ShiftImm \
411	{ \
412	DSP32ShiftImm_opcode, \
413	DSP32ShiftImm_src1_bits, DSP32ShiftImm_src1_mask, \
414	DSP32ShiftImm_immag_bits, DSP32ShiftImm_immag_mask, \
415	DSP32ShiftImm_dst0_bits, DSP32ShiftImm_dst0_mask, \
416	DSP32ShiftImm_HLs_bits, DSP32ShiftImm_HLs_mask, \
417	DSP32ShiftImm_sop_bits, DSP32ShiftImm_sop_mask, \
418	DSP32ShiftImm_sopcde_bits, DSP32ShiftImm_sopcde_mask, \
419	DSP32ShiftImm_dontcare_bits, DSP32ShiftImm_dontcare_mask, \
420	DSP32ShiftImm_code2_bits, DSP32ShiftImm_code2_mask, \
421	DSP32ShiftImm_M_bits, DSP32ShiftImm_M_mask, \
422	DSP32ShiftImm_code_bits, DSP32ShiftImm_code_mask \
423	};
424
425	/* LOAD / STORE */
426
427	/* LDSTidxI
428	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
429	\| 1 \| 1 \| 1 \| 0 \| 0 \| 1 \|.W.\|.Z.\|.sz....\|.ptr.......\|.reg.......\|
430	\|.offset........................................................\|
431	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
432	*/
433
434	typedef struct
435	{
436	unsigned long opcode;
437	int bits_offset;
438	int mask_offset;
439	int bits_reg;
440	int mask_reg;
441	int bits_ptr;
442	int mask_ptr;
443	int bits_sz;
444	int mask_sz;
445	int bits_Z;
446	int mask_Z;
447	int bits_W;
448	int mask_W;
449	int bits_code;
450	int mask_code;
451	} LDSTidxI;
452
453	#define LDSTidxI_opcode 0xe4000000
454	#define LDSTidxI_offset_bits 0
455	#define LDSTidxI_offset_mask 0xffff
456	#define LDSTidxI_reg_bits 16
457	#define LDSTidxI_reg_mask 0x7
458	#define LDSTidxI_ptr_bits 19
459	#define LDSTidxI_ptr_mask 0x7
460	#define LDSTidxI_sz_bits 22
461	#define LDSTidxI_sz_mask 0x3
462	#define LDSTidxI_Z_bits 24
463	#define LDSTidxI_Z_mask 0x1
464	#define LDSTidxI_W_bits 25
465	#define LDSTidxI_W_mask 0x1
466	#define LDSTidxI_code_bits 26
467	#define LDSTidxI_code_mask 0x3f
468
469	#define init_LDSTidxI \
470	{ \
471	LDSTidxI_opcode, \
472	LDSTidxI_offset_bits, LDSTidxI_offset_mask, \
473	LDSTidxI_reg_bits, LDSTidxI_reg_mask, \
474	LDSTidxI_ptr_bits, LDSTidxI_ptr_mask, \
475	LDSTidxI_sz_bits, LDSTidxI_sz_mask, \
476	LDSTidxI_Z_bits, LDSTidxI_Z_mask, \
477	LDSTidxI_W_bits, LDSTidxI_W_mask, \
478	LDSTidxI_code_bits, LDSTidxI_code_mask \
479	};
480
481
482	/* LDST
483	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
484	\| 1 \| 0 \| 0 \| 1 \|.sz....\|.W.\|.aop...\|.Z.\|.ptr.......\|.reg.......\|
485	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
486	*/
487
488	typedef struct
489	{
490	unsigned short opcode;
491	int bits_reg;
492	int mask_reg;
493	int bits_ptr;
494	int mask_ptr;
495	int bits_Z;
496	int mask_Z;
497	int bits_aop;
498	int mask_aop;
499	int bits_W;
500	int mask_W;
501	int bits_sz;
502	int mask_sz;
503	int bits_code;
504	int mask_code;
505	} LDST;
506
507	#define LDST_opcode 0x9000
508	#define LDST_reg_bits 0
509	#define LDST_reg_mask 0x7
510	#define LDST_ptr_bits 3
511	#define LDST_ptr_mask 0x7
512	#define LDST_Z_bits 6
513	#define LDST_Z_mask 0x1
514	#define LDST_aop_bits 7
515	#define LDST_aop_mask 0x3
516	#define LDST_W_bits 9
517	#define LDST_W_mask 0x1
518	#define LDST_sz_bits 10
519	#define LDST_sz_mask 0x3
520	#define LDST_code_bits 12
521	#define LDST_code_mask 0xf
522
523	#define init_LDST \
524	{ \
525	LDST_opcode, \
526	LDST_reg_bits, LDST_reg_mask, \
527	LDST_ptr_bits, LDST_ptr_mask, \
528	LDST_Z_bits, LDST_Z_mask, \
529	LDST_aop_bits, LDST_aop_mask, \
530	LDST_W_bits, LDST_W_mask, \
531	LDST_sz_bits, LDST_sz_mask, \
532	LDST_code_bits, LDST_code_mask \
533	};
534
535	/* LDSTii
536	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
537	\| 1 \| 0 \| 1 \|.W.\|.op....\|.offset........\|.ptr.......\|.reg.......\|
538	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
539	*/
540
541	typedef struct
542	{
543	unsigned short opcode;
544	int bits_reg;
545	int mask_reg;
546	int bits_ptr;
547	int mask_ptr;
548	int bits_offset;
549	int mask_offset;
550	int bits_op;
551	int mask_op;
552	int bits_W;
553	int mask_W;
554	int bits_code;
555	int mask_code;
556	} LDSTii;
557
558	#define LDSTii_opcode 0xa000
559	#define LDSTii_reg_bit 0
560	#define LDSTii_reg_mask 0x7
561	#define LDSTii_ptr_bit 3
562	#define LDSTii_ptr_mask 0x7
563	#define LDSTii_offset_bit 6
564	#define LDSTii_offset_mask 0xf
565	#define LDSTii_op_bit 10
566	#define LDSTii_op_mask 0x3
567	#define LDSTii_W_bit 12
568	#define LDSTii_W_mask 0x1
569	#define LDSTii_code_bit 13
570	#define LDSTii_code_mask 0x7
571
572	#define init_LDSTii \
573	{ \
574	LDSTii_opcode, \
575	LDSTii_reg_bit, LDSTii_reg_mask, \
576	LDSTii_ptr_bit, LDSTii_ptr_mask, \
577	LDSTii_offset_bit, LDSTii_offset_mask, \
578	LDSTii_op_bit, LDSTii_op_mask, \
579	LDSTii_W_bit, LDSTii_W_mask, \
580	LDSTii_code_bit, LDSTii_code_mask \
581	};
582
583
584	/* LDSTiiFP
585	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
586	\| 1 \| 0 \| 1 \| 1 \| 1 \| 0 \|.W.\|.offset............\|.reg...........\|
587	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
588	*/
589
590	typedef struct
591	{
592	unsigned short opcode;
593	int bits_reg;
594	int mask_reg;
595	int bits_offset;
596	int mask_offset;
597	int bits_W;
598	int mask_W;
599	int bits_code;
600	int mask_code;
601	} LDSTiiFP;
602
603	#define LDSTiiFP_opcode 0xb800
604	#define LDSTiiFP_reg_bits 0
605	#define LDSTiiFP_reg_mask 0xf
606	#define LDSTiiFP_offset_bits 4
607	#define LDSTiiFP_offset_mask 0x1f
608	#define LDSTiiFP_W_bits 9
609	#define LDSTiiFP_W_mask 0x1
610	#define LDSTiiFP_code_bits 10
611	#define LDSTiiFP_code_mask 0x3f
612
613	#define init_LDSTiiFP \
614	{ \
615	LDSTiiFP_opcode, \
616	LDSTiiFP_reg_bits, LDSTiiFP_reg_mask, \
617	LDSTiiFP_offset_bits, LDSTiiFP_offset_mask, \
618	LDSTiiFP_W_bits, LDSTiiFP_W_mask, \
619	LDSTiiFP_code_bits, LDSTiiFP_code_mask \
620	};
621
622	/* dspLDST
623	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
624	\| 1 \| 0 \| 0 \| 1 \| 1 \| 1 \|.W.\|.aop...\|.m.....\|.i.....\|.reg.......\|
625	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
626	*/
627
628	typedef struct
629	{
630	unsigned short opcode;
631	int bits_reg;
632	int mask_reg;
633	int bits_i;
634	int mask_i;
635	int bits_m;
636	int mask_m;
637	int bits_aop;
638	int mask_aop;
639	int bits_W;
640	int mask_W;
641	int bits_code;
642	int mask_code;
643	} DspLDST;
644
645	#define DspLDST_opcode 0x9c00
646	#define DspLDST_reg_bits 0
647	#define DspLDST_reg_mask 0x7
648	#define DspLDST_i_bits 3
649	#define DspLDST_i_mask 0x3
650	#define DspLDST_m_bits 5
651	#define DspLDST_m_mask 0x3
652	#define DspLDST_aop_bits 7
653	#define DspLDST_aop_mask 0x3
654	#define DspLDST_W_bits 9
655	#define DspLDST_W_mask 0x1
656	#define DspLDST_code_bits 10
657	#define DspLDST_code_mask 0x3f
658
659	#define init_DspLDST \
660	{ \
661	DspLDST_opcode, \
662	DspLDST_reg_bits, DspLDST_reg_mask, \
663	DspLDST_i_bits, DspLDST_i_mask, \
664	DspLDST_m_bits, DspLDST_m_mask, \
665	DspLDST_aop_bits, DspLDST_aop_mask, \
666	DspLDST_W_bits, DspLDST_W_mask, \
667	DspLDST_code_bits, DspLDST_code_mask \
668	};
669
670
671	/* LDSTpmod
672	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
673	\| 1 \| 0 \| 0 \| 0 \|.W.\|.aop...\|.reg.......\|.idx.......\|.ptr.......\|
674	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
675	*/
676
677	typedef struct
678	{
679	unsigned short opcode;
680	int bits_ptr;
681	int mask_ptr;
682	int bits_idx;
683	int mask_idx;
684	int bits_reg;
685	int mask_reg;
686	int bits_aop;
687	int mask_aop;
688	int bits_W;
689	int mask_W;
690	int bits_code;
691	int mask_code;
692	} LDSTpmod;
693
694	#define LDSTpmod_opcode 0x8000
695	#define LDSTpmod_ptr_bits 0
696	#define LDSTpmod_ptr_mask 0x7
697	#define LDSTpmod_idx_bits 3
698	#define LDSTpmod_idx_mask 0x7
699	#define LDSTpmod_reg_bits 6
700	#define LDSTpmod_reg_mask 0x7
701	#define LDSTpmod_aop_bits 9
702	#define LDSTpmod_aop_mask 0x3
703	#define LDSTpmod_W_bits 11
704	#define LDSTpmod_W_mask 0x1
705	#define LDSTpmod_code_bits 12
706	#define LDSTpmod_code_mask 0xf
707
708	#define init_LDSTpmod \
709	{ \
710	LDSTpmod_opcode, \
711	LDSTpmod_ptr_bits, LDSTpmod_ptr_mask, \
712	LDSTpmod_idx_bits, LDSTpmod_idx_mask, \
713	LDSTpmod_reg_bits, LDSTpmod_reg_mask, \
714	LDSTpmod_aop_bits, LDSTpmod_aop_mask, \
715	LDSTpmod_W_bits, LDSTpmod_W_mask, \
716	LDSTpmod_code_bits, LDSTpmod_code_mask \
717	};
718
719
720	/* LOGI2op
721	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
722	\| 0 \| 1 \| 0 \| 0 \| 1 \|.opc.......\|.src...............\|.dst.......\|
723	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
724	*/
725
726	typedef struct
727	{
728	unsigned short opcode;
729	int bits_dst;
730	int mask_dst;
731	int bits_src;
732	int mask_src;
733	int bits_opc;
734	int mask_opc;
735	int bits_code;
736	int mask_code;
737	} LOGI2op;
738
739	#define LOGI2op_opcode 0x4800
740	#define LOGI2op_dst_bits 0
741	#define LOGI2op_dst_mask 0x7
742	#define LOGI2op_src_bits 3
743	#define LOGI2op_src_mask 0x1f
744	#define LOGI2op_opc_bits 8
745	#define LOGI2op_opc_mask 0x7
746	#define LOGI2op_code_bits 11
747	#define LOGI2op_code_mask 0x1f
748
749	#define init_LOGI2op \
750	{ \
751	LOGI2op_opcode, \
752	LOGI2op_dst_bits, LOGI2op_dst_mask, \
753	LOGI2op_src_bits, LOGI2op_src_mask, \
754	LOGI2op_opc_bits, LOGI2op_opc_mask, \
755	LOGI2op_code_bits, LOGI2op_code_mask \
756	};
757
758
759	/* ALU2op
760	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
761	\| 0 \| 1 \| 0 \| 0 \| 0 \| 0 \|.opc...........\|.src.......\|.dst.......\|
762	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
763	*/
764
765	typedef struct
766	{
767	unsigned short opcode;
768	int bits_dst;
769	int mask_dst;
770	int bits_src;
771	int mask_src;
772	int bits_opc;
773	int mask_opc;
774	int bits_code;
775	int mask_code;
776	} ALU2op;
777
778	#define ALU2op_opcode 0x4000
779	#define ALU2op_dst_bits 0
780	#define ALU2op_dst_mask 0x7
781	#define ALU2op_src_bits 3
782	#define ALU2op_src_mask 0x7
783	#define ALU2op_opc_bits 6
784	#define ALU2op_opc_mask 0xf
785	#define ALU2op_code_bits 10
786	#define ALU2op_code_mask 0x3f
787
788	#define init_ALU2op \
789	{ \
790	ALU2op_opcode, \
791	ALU2op_dst_bits, ALU2op_dst_mask, \
792	ALU2op_src_bits, ALU2op_src_mask, \
793	ALU2op_opc_bits, ALU2op_opc_mask, \
794	ALU2op_code_bits, ALU2op_code_mask \
795	};
796
797
798	/* BRCC
799	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
800	\| 0 \| 0 \| 0 \| 1 \|.T.\|.B.\|.offset................................\|
801	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
802	*/
803
804	typedef struct
805	{
806	unsigned short opcode;
807	int bits_offset;
808	int mask_offset;
809	int bits_B;
810	int mask_B;
811	int bits_T;
812	int mask_T;
813	int bits_code;
814	int mask_code;
815	} BRCC;
816
817	#define BRCC_opcode 0x1000
818	#define BRCC_offset_bits 0
819	#define BRCC_offset_mask 0x3ff
820	#define BRCC_B_bits 10
821	#define BRCC_B_mask 0x1
822	#define BRCC_T_bits 11
823	#define BRCC_T_mask 0x1
824	#define BRCC_code_bits 12
825	#define BRCC_code_mask 0xf
826
827	#define init_BRCC \
828	{ \
829	BRCC_opcode, \
830	BRCC_offset_bits, BRCC_offset_mask, \
831	BRCC_B_bits, BRCC_B_mask, \
832	BRCC_T_bits, BRCC_T_mask, \
833	BRCC_code_bits, BRCC_code_mask \
834	};
835
836
837	/* UJUMP
838	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
839	\| 0 \| 0 \| 1 \| 0 \|.offset........................................\|
840	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
841	*/
842
843	typedef struct
844	{
845	unsigned short opcode;
846	int bits_offset;
847	int mask_offset;
848	int bits_code;
849	int mask_code;
850	} UJump;
851
852	#define UJump_opcode 0x2000
853	#define UJump_offset_bits 0
854	#define UJump_offset_mask 0xfff
855	#define UJump_code_bits 12
856	#define UJump_code_mask 0xf
857
858	#define init_UJump \
859	{ \
860	UJump_opcode, \
861	UJump_offset_bits, UJump_offset_mask, \
862	UJump_code_bits, UJump_code_mask \
863	};
864
865
866	/* ProgCtrl
867	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
868	\| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \|.prgfunc.......\|.poprnd........\|
869	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
870	*/
871
872	typedef struct
873	{
874	unsigned short opcode;
875	int bits_poprnd;
876	int mask_poprnd;
877	int bits_prgfunc;
878	int mask_prgfunc;
879	int bits_code;
880	int mask_code;
881	} ProgCtrl;
882
883	#define ProgCtrl_opcode 0x0000
884	#define ProgCtrl_poprnd_bits 0
885	#define ProgCtrl_poprnd_mask 0xf
886	#define ProgCtrl_prgfunc_bits 4
887	#define ProgCtrl_prgfunc_mask 0xf
888	#define ProgCtrl_code_bits 8
889	#define ProgCtrl_code_mask 0xff
890
891	#define init_ProgCtrl \
892	{ \
893	ProgCtrl_opcode, \
894	ProgCtrl_poprnd_bits, ProgCtrl_poprnd_mask, \
895	ProgCtrl_prgfunc_bits, ProgCtrl_prgfunc_mask, \
896	ProgCtrl_code_bits, ProgCtrl_code_mask \
897	};
898
899	/* CALLa
900	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
901	\| 1 \| 1 \| 1 \| 0 \| 0 \| 0 \| 1 \|.S.\|.msw...........................\|
902	\|.lsw...........................................................\|
903	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
904	*/
905
906
907	typedef struct
908	{
909	unsigned long opcode;
910	int bits_addr;
911	int mask_addr;
912	int bits_S;
913	int mask_S;
914	int bits_code;
915	int mask_code;
916	} CALLa;
917
918	#define CALLa_opcode 0xe2000000
919	#define CALLa_addr_bits 0
920	#define CALLa_addr_mask 0xffffff
921	#define CALLa_S_bits 24
922	#define CALLa_S_mask 0x1
923	#define CALLa_code_bits 25
924	#define CALLa_code_mask 0x7f
925
926	#define init_CALLa \
927	{ \
928	CALLa_opcode, \
929	CALLa_addr_bits, CALLa_addr_mask, \
930	CALLa_S_bits, CALLa_S_mask, \
931	CALLa_code_bits, CALLa_code_mask \
932	};
933
934
935	/* pseudoDEBUG
936	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
937	\| 1 \| 1 \| 1 \| 1 \| 1 \| 0 \| 0 \| 0 \|.fn....\|.grp.......\|.reg.......\|
938	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
939	*/
940
941	typedef struct
942	{
943	unsigned short opcode;
944	int bits_reg;
945	int mask_reg;
946	int bits_grp;
947	int mask_grp;
948	int bits_fn;
949	int mask_fn;
950	int bits_code;
951	int mask_code;
952	} PseudoDbg;
953
954	#define PseudoDbg_opcode 0xf800
955	#define PseudoDbg_reg_bits 0
956	#define PseudoDbg_reg_mask 0x7
957	#define PseudoDbg_grp_bits 3
958	#define PseudoDbg_grp_mask 0x7
959	#define PseudoDbg_fn_bits 6
960	#define PseudoDbg_fn_mask 0x3
961	#define PseudoDbg_code_bits 8
962	#define PseudoDbg_code_mask 0xff
963
964	#define init_PseudoDbg \
965	{ \
966	PseudoDbg_opcode, \
967	PseudoDbg_reg_bits, PseudoDbg_reg_mask, \
968	PseudoDbg_grp_bits, PseudoDbg_grp_mask, \
969	PseudoDbg_fn_bits, PseudoDbg_fn_mask, \
970	PseudoDbg_code_bits, PseudoDbg_code_mask \
971	};
972
973	/* PseudoDbg_assert
974	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
975	\| 1 \| 1 \| 1 \| 1 \| 0 \| - \| - \| - \| dbgop \|.grp.......\|.regtest...\|
976	\|.expected......................................................\|
977	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
978	*/
979
980	typedef struct
981	{
982	unsigned long opcode;
983	int bits_expected;
984	int mask_expected;
985	int bits_regtest;
986	int mask_regtest;
987	int bits_grp;
988	int mask_grp;
989	int bits_dbgop;
990	int mask_dbgop;
991	int bits_dontcare;
992	int mask_dontcare;
993	int bits_code;
994	int mask_code;
995	} PseudoDbg_Assert;
996
997	#define PseudoDbg_Assert_opcode 0xf0000000
998	#define PseudoDbg_Assert_expected_bits 0
999	#define PseudoDbg_Assert_expected_mask 0xffff
1000	#define PseudoDbg_Assert_regtest_bits 16
1001	#define PseudoDbg_Assert_regtest_mask 0x7
1002	#define PseudoDbg_Assert_grp_bits 19
1003	#define PseudoDbg_Assert_grp_mask 0x7
1004	#define PseudoDbg_Assert_dbgop_bits 22
1005	#define PseudoDbg_Assert_dbgop_mask 0x3
1006	#define PseudoDbg_Assert_dontcare_bits 24
1007	#define PseudoDbg_Assert_dontcare_mask 0x7
1008	#define PseudoDbg_Assert_code_bits 27
1009	#define PseudoDbg_Assert_code_mask 0x1f
1010
1011	#define init_PseudoDbg_Assert \
1012	{ \
1013	PseudoDbg_Assert_opcode, \
1014	PseudoDbg_Assert_expected_bits, PseudoDbg_Assert_expected_mask, \
1015	PseudoDbg_Assert_regtest_bits, PseudoDbg_Assert_regtest_mask, \
1016	PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask, \
1017	PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, \
1018	PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask, \
1019	PseudoDbg_Assert_code_bits, PseudoDbg_Assert_code_mask \
1020	};
1021
1022	/* pseudoChr
1023	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1024	\| 1 \| 1 \| 1 \| 1 \| 1 \| 0 \| 0 \| 1 \|.ch............................\|
1025	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1026	*/
1027
1028	typedef struct
1029	{
1030	unsigned short opcode;
1031	int bits_ch;
1032	int mask_ch;
1033	int bits_code;
1034	int mask_code;
1035	} PseudoChr;
1036
1037	#define PseudoChr_opcode 0xf900
1038	#define PseudoChr_ch_bits 0
1039	#define PseudoChr_ch_mask 0xff
1040	#define PseudoChr_code_bits 8
1041	#define PseudoChr_code_mask 0xff
1042
1043	#define init_PseudoChr \
1044	{ \
1045	PseudoChr_opcode, \
1046	PseudoChr_ch_bits, PseudoChr_ch_mask, \
1047	PseudoChr_code_bits, PseudoChr_code_mask \
1048	};
1049
1050	/* CaCTRL
1051	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1052	\| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 1 \| 0 \| 0 \| 1 \|.a.\|.op....\|.reg.......\|
1053	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1054	*/
1055
1056	typedef struct
1057	{
1058	unsigned short opcode;
1059	int bits_reg;
1060	int mask_reg;
1061	int bits_op;
1062	int mask_op;
1063	int bits_a;
1064	int mask_a;
1065	int bits_code;
1066	int mask_code;
1067	} CaCTRL;
1068
1069	#define CaCTRL_opcode 0x0240
1070	#define CaCTRL_reg_bits 0
1071	#define CaCTRL_reg_mask 0x7
1072	#define CaCTRL_op_bits 3
1073	#define CaCTRL_op_mask 0x3
1074	#define CaCTRL_a_bits 5
1075	#define CaCTRL_a_mask 0x1
1076	#define CaCTRL_code_bits 6
1077	#define CaCTRL_code_mask 0x3fff
1078
1079	#define init_CaCTRL \
1080	{ \
1081	CaCTRL_opcode, \
1082	CaCTRL_reg_bits, CaCTRL_reg_mask, \
1083	CaCTRL_op_bits, CaCTRL_op_mask, \
1084	CaCTRL_a_bits, CaCTRL_a_mask, \
1085	CaCTRL_code_bits, CaCTRL_code_mask \
1086	};
1087
1088	/* PushPopMultiple
1089	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1090	\| 0 \| 0 \| 0 \| 0 \| 0 \| 1 \| 0 \|.d.\|.p.\|.W.\|.dr........\|.pr........\|
1091	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1092	*/
1093
1094	typedef struct
1095	{
1096	unsigned short opcode;
1097	int bits_pr;
1098	int mask_pr;
1099	int bits_dr;
1100	int mask_dr;
1101	int bits_W;
1102	int mask_W;
1103	int bits_p;
1104	int mask_p;
1105	int bits_d;
1106	int mask_d;
1107	int bits_code;
1108	int mask_code;
1109	} PushPopMultiple;
1110
1111	#define PushPopMultiple_opcode 0x0400
1112	#define PushPopMultiple_pr_bits 0
1113	#define PushPopMultiple_pr_mask 0x7
1114	#define PushPopMultiple_dr_bits 3
1115	#define PushPopMultiple_dr_mask 0x7
1116	#define PushPopMultiple_W_bits 6
1117	#define PushPopMultiple_W_mask 0x1
1118	#define PushPopMultiple_p_bits 7
1119	#define PushPopMultiple_p_mask 0x1
1120	#define PushPopMultiple_d_bits 8
1121	#define PushPopMultiple_d_mask 0x1
1122	#define PushPopMultiple_code_bits 8
1123	#define PushPopMultiple_code_mask 0x1
1124
1125	#define init_PushPopMultiple \
1126	{ \
1127	PushPopMultiple_opcode, \
1128	PushPopMultiple_pr_bits, PushPopMultiple_pr_mask, \
1129	PushPopMultiple_dr_bits, PushPopMultiple_dr_mask, \
1130	PushPopMultiple_W_bits, PushPopMultiple_W_mask, \
1131	PushPopMultiple_p_bits, PushPopMultiple_p_mask, \
1132	PushPopMultiple_d_bits, PushPopMultiple_d_mask, \
1133	PushPopMultiple_code_bits, PushPopMultiple_code_mask \
1134	};
1135
1136	/* PushPopReg
1137	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1138	\| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 1 \| 0 \|.W.\|.grp.......\|.reg.......\|
1139	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1140	*/
1141
1142	typedef struct
1143	{
1144	unsigned short opcode;
1145	int bits_reg;
1146	int mask_reg;
1147	int bits_grp;
1148	int mask_grp;
1149	int bits_W;
1150	int mask_W;
1151	int bits_code;
1152	int mask_code;
1153	} PushPopReg;
1154
1155	#define PushPopReg_opcode 0x0100
1156	#define PushPopReg_reg_bits 0
1157	#define PushPopReg_reg_mask 0x7
1158	#define PushPopReg_grp_bits 3
1159	#define PushPopReg_grp_mask 0x7
1160	#define PushPopReg_W_bits 6
1161	#define PushPopReg_W_mask 0x1
1162	#define PushPopReg_code_bits 7
1163	#define PushPopReg_code_mask 0x1ff
1164
1165	#define init_PushPopReg \
1166	{ \
1167	PushPopReg_opcode, \
1168	PushPopReg_reg_bits, PushPopReg_reg_mask, \
1169	PushPopReg_grp_bits, PushPopReg_grp_mask, \
1170	PushPopReg_W_bits, PushPopReg_W_mask, \
1171	PushPopReg_code_bits, PushPopReg_code_mask, \
1172	};
1173
1174	/* linkage
1175	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1176	\| 1 \| 1 \| 1 \| 0 \| 1 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \|.R.\|
1177	\|.framesize.....................................................\|
1178	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1179	*/
1180
1181	typedef struct
1182	{
1183	unsigned long opcode;
1184	int bits_framesize;
1185	int mask_framesize;
1186	int bits_R;
1187	int mask_R;
1188	int bits_code;
1189	int mask_code;
1190	} Linkage;
1191
1192	#define Linkage_opcode 0xe8000000
1193	#define Linkage_framesize_bits 0
1194	#define Linkage_framesize_mask 0xffff
1195	#define Linkage_R_bits 16
1196	#define Linkage_R_mask 0x1
1197	#define Linkage_code_bits 17
1198	#define Linkage_code_mask 0x7fff
1199
1200	#define init_Linkage \
1201	{ \
1202	Linkage_opcode, \
1203	Linkage_framesize_bits, Linkage_framesize_mask, \
1204	Linkage_R_bits, Linkage_R_mask, \
1205	Linkage_code_bits, Linkage_code_mask \
1206	};
1207
1208	/* LoopSetup
1209	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1210	\| 1 \| 1 \| 1 \| 0 \| 0 \| 0 \| 0 \| 0 \| 1 \|.rop...\|.c.\|.soffset.......\|
1211	\|.reg...........\| - \| - \|.eoffset...............................\|
1212	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1213	*/
1214
1215	typedef struct
1216	{
1217	unsigned long opcode;
1218	int bits_eoffset;
1219	int mask_eoffset;
1220	int bits_dontcare;
1221	int mask_dontcare;
1222	int bits_reg;
1223	int mask_reg;
1224	int bits_soffset;
1225	int mask_soffset;
1226	int bits_c;
1227	int mask_c;
1228	int bits_rop;
1229	int mask_rop;
1230	int bits_code;
1231	int mask_code;
1232	} LoopSetup;
1233
1234	#define LoopSetup_opcode 0xe0800000
1235	#define LoopSetup_eoffset_bits 0
1236	#define LoopSetup_eoffset_mask 0x3ff
1237	#define LoopSetup_dontcare_bits 10
1238	#define LoopSetup_dontcare_mask 0x3
1239	#define LoopSetup_reg_bits 12
1240	#define LoopSetup_reg_mask 0xf
1241	#define LoopSetup_soffset_bits 16
1242	#define LoopSetup_soffset_mask 0xf
1243	#define LoopSetup_c_bits 20
1244	#define LoopSetup_c_mask 0x1
1245	#define LoopSetup_rop_bits 21
1246	#define LoopSetup_rop_mask 0x3
1247	#define LoopSetup_code_bits 23
1248	#define LoopSetup_code_mask 0x1ff
1249
1250	#define init_LoopSetup \
1251	{ \
1252	LoopSetup_opcode, \
1253	LoopSetup_eoffset_bits, LoopSetup_eoffset_mask, \
1254	LoopSetup_dontcare_bits, LoopSetup_dontcare_mask, \
1255	LoopSetup_reg_bits, LoopSetup_reg_mask, \
1256	LoopSetup_soffset_bits, LoopSetup_soffset_mask, \
1257	LoopSetup_c_bits, LoopSetup_c_mask, \
1258	LoopSetup_rop_bits, LoopSetup_rop_mask, \
1259	LoopSetup_code_bits, LoopSetup_code_mask \
1260	};
1261
1262	/* LDIMMhalf
1263	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1264	\| 1 \| 1 \| 1 \| 0 \| 0 \| 0 \| 0 \| 1 \|.Z.\|.H.\|.S.\|.grp...\|.reg.......\|
1265	\|.hword.........................................................\|
1266	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1267	*/
1268
1269	typedef struct
1270	{
1271	unsigned long opcode;
1272	int bits_hword;
1273	int mask_hword;
1274	int bits_reg;
1275	int mask_reg;
1276	int bits_grp;
1277	int mask_grp;
1278	int bits_S;
1279	int mask_S;
1280	int bits_H;
1281	int mask_H;
1282	int bits_Z;
1283	int mask_Z;
1284	int bits_code;
1285	int mask_code;
1286	} LDIMMhalf;
1287
1288	#define LDIMMhalf_opcode 0xe1000000
1289	#define LDIMMhalf_hword_bits 0
1290	#define LDIMMhalf_hword_mask 0xffff
1291	#define LDIMMhalf_reg_bits 16
1292	#define LDIMMhalf_reg_mask 0x7
1293	#define LDIMMhalf_grp_bits 19
1294	#define LDIMMhalf_grp_mask 0x3
1295	#define LDIMMhalf_S_bits 21
1296	#define LDIMMhalf_S_mask 0x1
1297	#define LDIMMhalf_H_bits 22
1298	#define LDIMMhalf_H_mask 0x1
1299	#define LDIMMhalf_Z_bits 23
1300	#define LDIMMhalf_Z_mask 0x1
1301	#define LDIMMhalf_code_bits 24
1302	#define LDIMMhalf_code_mask 0xff
1303
1304	#define init_LDIMMhalf \
1305	{ \
1306	LDIMMhalf_opcode, \
1307	LDIMMhalf_hword_bits, LDIMMhalf_hword_mask, \
1308	LDIMMhalf_reg_bits, LDIMMhalf_reg_mask, \
1309	LDIMMhalf_grp_bits, LDIMMhalf_grp_mask, \
1310	LDIMMhalf_S_bits, LDIMMhalf_S_mask, \
1311	LDIMMhalf_H_bits, LDIMMhalf_H_mask, \
1312	LDIMMhalf_Z_bits, LDIMMhalf_Z_mask, \
1313	LDIMMhalf_code_bits, LDIMMhalf_code_mask \
1314	};
1315
1316
1317	/* CC2dreg
1318	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1319	\| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 1 \| 0 \| 0 \| 0 \| 0 \|.op....\|.reg.......\|
1320	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1321	*/
1322
1323	typedef struct
1324	{
1325	unsigned short opcode;
1326	int bits_reg;
1327	int mask_reg;
1328	int bits_op;
1329	int mask_op;
1330	int bits_code;
1331	int mask_code;
1332	} CC2dreg;
1333
1334	#define CC2dreg_opcode 0x0200
1335	#define CC2dreg_reg_bits 0
1336	#define CC2dreg_reg_mask 0x7
1337	#define CC2dreg_op_bits 3
1338	#define CC2dreg_op_mask 0x3
1339	#define CC2dreg_code_bits 5
1340	#define CC2dreg_code_mask 0x7fff
1341
1342	#define init_CC2dreg \
1343	{ \
1344	CC2dreg_opcode, \
1345	CC2dreg_reg_bits, CC2dreg_reg_mask, \
1346	CC2dreg_op_bits, CC2dreg_op_mask, \
1347	CC2dreg_code_bits, CC2dreg_code_mask \
1348	};
1349
1350
1351	/* PTR2op
1352	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1353	\| 0 \| 1 \| 0 \| 0 \| 0 \| 1 \| 0 \|.opc.......\|.src.......\|.dst.......\|
1354	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1355	*/
1356
1357	typedef struct
1358	{
1359	unsigned short opcode;
1360	int bits_dst;
1361	int mask_dst;
1362	int bits_src;
1363	int mask_src;
1364	int bits_opc;
1365	int mask_opc;
1366	int bits_code;
1367	int mask_code;
1368	} PTR2op;
1369
1370	#define PTR2op_opcode 0x4400
1371	#define PTR2op_dst_bits 0
1372	#define PTR2op_dst_mask 0x7
1373	#define PTR2op_src_bits 3
1374	#define PTR2op_src_mask 0x7
1375	#define PTR2op_opc_bits 6
1376	#define PTR2op_opc_mask 0x7
1377	#define PTR2op_code_bits 9
1378	#define PTR2op_code_mask 0x7f
1379
1380	#define init_PTR2op \
1381	{ \
1382	PTR2op_opcode, \
1383	PTR2op_dst_bits, PTR2op_dst_mask, \
1384	PTR2op_src_bits, PTR2op_src_mask, \
1385	PTR2op_opc_bits, PTR2op_opc_mask, \
1386	PTR2op_code_bits, PTR2op_code_mask \
1387	};
1388
1389
1390	/* COMP3op
1391	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1392	\| 0 \| 1 \| 0 \| 1 \|.opc.......\|.dst.......\|.src1......\|.src0......\|
1393	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1394	*/
1395
1396	typedef struct
1397	{
1398	unsigned short opcode;
1399	int bits_src0;
1400	int mask_src0;
1401	int bits_src1;
1402	int mask_src1;
1403	int bits_dst;
1404	int mask_dst;
1405	int bits_opc;
1406	int mask_opc;
1407	int bits_code;
1408	int mask_code;
1409	} COMP3op;
1410
1411	#define COMP3op_opcode 0x5000
1412	#define COMP3op_src0_bits 0
1413	#define COMP3op_src0_mask 0x7
1414	#define COMP3op_src1_bits 3
1415	#define COMP3op_src1_mask 0x7
1416	#define COMP3op_dst_bits 6
1417	#define COMP3op_dst_mask 0x7
1418	#define COMP3op_opc_bits 9
1419	#define COMP3op_opc_mask 0x7
1420	#define COMP3op_code_bits 12
1421	#define COMP3op_code_mask 0xf
1422
1423	#define init_COMP3op \
1424	{ \
1425	COMP3op_opcode, \
1426	COMP3op_src0_bits, COMP3op_src0_mask, \
1427	COMP3op_src1_bits, COMP3op_src1_mask, \
1428	COMP3op_dst_bits, COMP3op_dst_mask, \
1429	COMP3op_opc_bits, COMP3op_opc_mask, \
1430	COMP3op_code_bits, COMP3op_code_mask \
1431	};
1432
1433	/* ccMV
1434	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1435	\| 0 \| 0 \| 0 \| 0 \| 0 \| 1 \| 1 \|.T.\|.d.\|.s.\|.dst.......\|.src.......\|
1436	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1437	*/
1438
1439	typedef struct
1440	{
1441	unsigned short opcode;
1442	int bits_src;
1443	int mask_src;
1444	int bits_dst;
1445	int mask_dst;
1446	int bits_s;
1447	int mask_s;
1448	int bits_d;
1449	int mask_d;
1450	int bits_T;
1451	int mask_T;
1452	int bits_code;
1453	int mask_code;
1454	} CCmv;
1455
1456	#define CCmv_opcode 0x0600
1457	#define CCmv_src_bits 0
1458	#define CCmv_src_mask 0x7
1459	#define CCmv_dst_bits 3
1460	#define CCmv_dst_mask 0x7
1461	#define CCmv_s_bits 6
1462	#define CCmv_s_mask 0x1
1463	#define CCmv_d_bits 7
1464	#define CCmv_d_mask 0x1
1465	#define CCmv_T_bits 8
1466	#define CCmv_T_mask 0x1
1467	#define CCmv_code_bits 9
1468	#define CCmv_code_mask 0x7f
1469
1470	#define init_CCmv \
1471	{ \
1472	CCmv_opcode, \
1473	CCmv_src_bits, CCmv_src_mask, \
1474	CCmv_dst_bits, CCmv_dst_mask, \
1475	CCmv_s_bits, CCmv_s_mask, \
1476	CCmv_d_bits, CCmv_d_mask, \
1477	CCmv_T_bits, CCmv_T_mask, \
1478	CCmv_code_bits, CCmv_code_mask \
1479	};
1480
1481
1482	/* CCflag
1483	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1484	\| 0 \| 0 \| 0 \| 0 \| 1 \|.I.\|.opc.......\|.G.\|.y.........\|.x.........\|
1485	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1486	*/
1487
1488	typedef struct
1489	{
1490	unsigned short opcode;
1491	int bits_x;
1492	int mask_x;
1493	int bits_y;
1494	int mask_y;
1495	int bits_G;
1496	int mask_G;
1497	int bits_opc;
1498	int mask_opc;
1499	int bits_I;
1500	int mask_I;
1501	int bits_code;
1502	int mask_code;
1503	} CCflag;
1504
1505	#define CCflag_opcode 0x0800
1506	#define CCflag_x_bits 0
1507	#define CCflag_x_mask 0x7
1508	#define CCflag_y_bits 3
1509	#define CCflag_y_mask 0x7
1510	#define CCflag_G_bits 6
1511	#define CCflag_G_mask 0x1
1512	#define CCflag_opc_bits 7
1513	#define CCflag_opc_mask 0x7
1514	#define CCflag_I_bits 10
1515	#define CCflag_I_mask 0x1
1516	#define CCflag_code_bits 11
1517	#define CCflag_code_mask 0x1f
1518
1519	#define init_CCflag \
1520	{ \
1521	CCflag_opcode, \
1522	CCflag_x_bits, CCflag_x_mask, \
1523	CCflag_y_bits, CCflag_y_mask, \
1524	CCflag_G_bits, CCflag_G_mask, \
1525	CCflag_opc_bits, CCflag_opc_mask, \
1526	CCflag_I_bits, CCflag_I_mask, \
1527	CCflag_code_bits, CCflag_code_mask, \
1528	};
1529
1530
1531	/* CC2stat
1532	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1533	\| 0 \| 0 \| 0 \| 0 \| 0 \| 0 \| 1 \| 1 \|.D.\|.op....\|.cbit..............\|
1534	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1535	*/
1536
1537	typedef struct
1538	{
1539	unsigned short opcode;
1540	int bits_cbit;
1541	int mask_cbit;
1542	int bits_op;
1543	int mask_op;
1544	int bits_D;
1545	int mask_D;
1546	int bits_code;
1547	int mask_code;
1548	} CC2stat;
1549
1550	#define CC2stat_opcode 0x0300
1551	#define CC2stat_cbit_bits 0
1552	#define CC2stat_cbit_mask 0x1f
1553	#define CC2stat_op_bits 5
1554	#define CC2stat_op_mask 0x3
1555	#define CC2stat_D_bits 7
1556	#define CC2stat_D_mask 0x1
1557	#define CC2stat_code_bits 8
1558	#define CC2stat_code_mask 0xff
1559
1560	#define init_CC2stat \
1561	{ \
1562	CC2stat_opcode, \
1563	CC2stat_cbit_bits, CC2stat_cbit_mask, \
1564	CC2stat_op_bits, CC2stat_op_mask, \
1565	CC2stat_D_bits, CC2stat_D_mask, \
1566	CC2stat_code_bits, CC2stat_code_mask \
1567	};
1568
1569
1570	/* REGMV
1571	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1572	\| 0 \| 0 \| 1 \| 1 \|.gd........\|.gs........\|.dst.......\|.src.......\|
1573	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1574	*/
1575
1576	typedef struct
1577	{
1578	unsigned short opcode;
1579	int bits_src;
1580	int mask_src;
1581	int bits_dst;
1582	int mask_dst;
1583	int bits_gs;
1584	int mask_gs;
1585	int bits_gd;
1586	int mask_gd;
1587	int bits_code;
1588	int mask_code;
1589	} RegMv;
1590
1591	#define RegMv_opcode 0x3000
1592	#define RegMv_src_bits 0
1593	#define RegMv_src_mask 0x7
1594	#define RegMv_dst_bits 3
1595	#define RegMv_dst_mask 0x7
1596	#define RegMv_gs_bits 6
1597	#define RegMv_gs_mask 0x7
1598	#define RegMv_gd_bits 9
1599	#define RegMv_gd_mask 0x7
1600	#define RegMv_code_bits 12
1601	#define RegMv_code_mask 0xf
1602
1603	#define init_RegMv \
1604	{ \
1605	RegMv_opcode, \
1606	RegMv_src_bits, RegMv_src_mask, \
1607	RegMv_dst_bits, RegMv_dst_mask, \
1608	RegMv_gs_bits, RegMv_gs_mask, \
1609	RegMv_gd_bits, RegMv_gd_mask, \
1610	RegMv_code_bits, RegMv_code_mask \
1611	};
1612
1613
1614	/* COMPI2opD
1615	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1616	\| 0 \| 1 \| 1 \| 0 \| 0 \|.op\|.isrc......................\|.dst.......\|
1617	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1618	*/
1619
1620	typedef struct
1621	{
1622	unsigned short opcode;
1623	int bits_dst;
1624	int mask_dst;
1625	int bits_src;
1626	int mask_src;
1627	int bits_op;
1628	int mask_op;
1629	int bits_code;
1630	int mask_code;
1631	} COMPI2opD;
1632
1633	#define COMPI2opD_opcode 0x6000
1634	#define COMPI2opD_dst_bits 0
1635	#define COMPI2opD_dst_mask 0x7
1636	#define COMPI2opD_src_bits 3
1637	#define COMPI2opD_src_mask 0x7f
1638	#define COMPI2opD_op_bits 10
1639	#define COMPI2opD_op_mask 0x1
1640	#define COMPI2opD_code_bits 11
1641	#define COMPI2opD_code_mask 0x1f
1642
1643	#define init_COMPI2opD \
1644	{ \
1645	COMPI2opD_opcode, \
1646	COMPI2opD_dst_bits, COMPI2opD_dst_mask, \
1647	COMPI2opD_src_bits, COMPI2opD_src_mask, \
1648	COMPI2opD_op_bits, COMPI2opD_op_mask, \
1649	COMPI2opD_code_bits, COMPI2opD_code_mask \
1650	};
1651
1652	/* COMPI2opP
1653	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1654	\| 0 \| 1 \| 1 \| 0 \| 1 \|.op\|.src.......................\|.dst.......\|
1655	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1656	*/
1657
1658	typedef COMPI2opD COMPI2opP;
1659
1660	#define COMPI2opP_opcode 0x6800
1661	#define COMPI2opP_dst_bits 0
1662	#define COMPI2opP_dst_mask 0x7
1663	#define COMPI2opP_src_bits 3
1664	#define COMPI2opP_src_mask 0x7f
1665	#define COMPI2opP_op_bits 10
1666	#define COMPI2opP_op_mask 0x1
1667	#define COMPI2opP_code_bits 11
1668	#define COMPI2opP_code_mask 0x1f
1669
1670	#define init_COMPI2opP \
1671	{ \
1672	COMPI2opP_opcode, \
1673	COMPI2opP_dst_bits, COMPI2opP_dst_mask, \
1674	COMPI2opP_src_bits, COMPI2opP_src_mask, \
1675	COMPI2opP_op_bits, COMPI2opP_op_mask, \
1676	COMPI2opP_code_bits, COMPI2opP_code_mask \
1677	};
1678
1679
1680	/* dagMODim
1681	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1682	\| 1 \| 0 \| 0 \| 1 \| 1 \| 1 \| 1 \| 0 \|.br\| 1 \| 1 \|.op\|.m.....\|.i.....\|
1683	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1684	*/
1685
1686	typedef struct
1687	{
1688	unsigned short opcode;
1689	int bits_i;
1690	int mask_i;
1691	int bits_m;
1692	int mask_m;
1693	int bits_op;
1694	int mask_op;
1695	int bits_code2;
1696	int mask_code2;
1697	int bits_br;
1698	int mask_br;
1699	int bits_code;
1700	int mask_code;
1701	} DagMODim;
1702
1703	#define DagMODim_opcode 0x9e60
1704	#define DagMODim_i_bits 0
1705	#define DagMODim_i_mask 0x3
1706	#define DagMODim_m_bits 2
1707	#define DagMODim_m_mask 0x3
1708	#define DagMODim_op_bits 4
1709	#define DagMODim_op_mask 0x1
1710	#define DagMODim_code2_bits 5
1711	#define DagMODim_code2_mask 0x3
1712	#define DagMODim_br_bits 7
1713	#define DagMODim_br_mask 0x1
1714	#define DagMODim_code_bits 8
1715	#define DagMODim_code_mask 0xff
1716
1717	#define init_DagMODim \
1718	{ \
1719	DagMODim_opcode, \
1720	DagMODim_i_bits, DagMODim_i_mask, \
1721	DagMODim_m_bits, DagMODim_m_mask, \
1722	DagMODim_op_bits, DagMODim_op_mask, \
1723	DagMODim_code2_bits, DagMODim_code2_mask, \
1724	DagMODim_br_bits, DagMODim_br_mask, \
1725	DagMODim_code_bits, DagMODim_code_mask \
1726	};
1727
1728	/* dagMODik
1729	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1730	\| 1 \| 0 \| 0 \| 1 \| 1 \| 1 \| 1 \| 1 \| 0 \| 1 \| 1 \| 0 \|.op....\|.i.....\|
1731	+---+---+---+---\|---+---+---+---\|---+---+---+---\|---+---+---+---+
1732	*/
1733
1734	typedef struct
1735	{
1736	unsigned short opcode;
1737	int bits_i;
1738	int mask_i;
1739	int bits_op;
1740	int mask_op;
1741	int bits_code;
1742	int mask_code;
1743	} DagMODik;
1744
1745	#define DagMODik_opcode 0x9f60
1746	#define DagMODik_i_bits 0
1747	#define DagMODik_i_mask 0x3
1748	#define DagMODik_op_bits 2
1749	#define DagMODik_op_mask 0x3
1750	#define DagMODik_code_bits 3
1751	#define DagMODik_code_mask 0xfff
1752
1753	#define init_DagMODik \
1754	{ \
1755	DagMODik_opcode, \
1756	DagMODik_i_bits, DagMODik_i_mask, \
1757	DagMODik_op_bits, DagMODik_op_mask, \
1758	DagMODik_code_bits, DagMODik_code_mask \
1759	};
1760
1761	#endif

Note: See TracBrowser for help on using the repository browser.

Context Navigation

source: trunk/libs/newlib/src/include/opcode/bfin.h @ 684

Download in other formats: