| [444] | 1 | /* TI C6X control register information. |
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| 2 | Copyright 2010 |
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| 3 | Free Software Foundation, Inc. |
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| 4 | |
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| 5 | This program is free software; you can redistribute it and/or modify |
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| 6 | it under the terms of the GNU General Public License as published by |
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| 7 | the Free Software Foundation; either version 3 of the License, or |
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| 8 | (at your option) any later version. |
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| 9 | |
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| 10 | This program is distributed in the hope that it will be useful, |
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| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 13 | GNU General Public License for more details. |
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| 14 | |
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| 15 | You should have received a copy of the GNU General Public License |
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| 16 | along with this program; if not, write to the Free Software |
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| 17 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
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| 18 | MA 02110-1301, USA. */ |
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| 19 | |
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| 20 | /* Define the CTRL macro before including this file; it takes as |
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| 21 | arguments the fields from tic6x_ctrl (defined in tic6x.h). The |
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| 22 | control register name is given as an identifier; the isa_variants |
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| 23 | field without the leading TIC6X_INSN_; the rw field without the |
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| 24 | leading tic6x_rw_. */ |
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| 25 | |
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| 26 | CTRL(amr, C62X, read_write, 0x0, 0x10) |
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| 27 | CTRL(csr, C62X, read_write, 0x1, 0x10) |
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| 28 | CTRL(dnum, C64XP, read, 0x11, 0x1f) |
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| 29 | CTRL(ecr, C64XP, write, 0x1d, 0x1f) |
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| 30 | CTRL(efr, C64XP, read, 0x1d, 0x1f) |
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| 31 | CTRL(fadcr, C67X, read_write, 0x12, 0x1f) |
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| 32 | CTRL(faucr, C67X, read_write, 0x13, 0x1f) |
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| 33 | CTRL(fmcr, C67X, read_write, 0x14, 0x1f) |
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| 34 | CTRL(gfpgfr, C64X, read_write, 0x18, 0x1f) |
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| 35 | CTRL(gplya, C64XP, read_write, 0x16, 0x1f) |
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| 36 | CTRL(gplyb, C64XP, read_write, 0x17, 0x1f) |
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| 37 | CTRL(icr, C62X, write, 0x3, 0x10) |
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| 38 | CTRL(ier, C62X, read_write, 0x4, 0x10) |
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| 39 | CTRL(ierr, C64XP, read_write, 0x1f, 0x1f) |
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| 40 | CTRL(ifr, C62X, read, 0x2, 0x1d) |
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| 41 | CTRL(ilc, C64XP, read_write, 0xd, 0x1f) |
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| 42 | CTRL(irp, C62X, read_write, 0x6, 0x10) |
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| 43 | CTRL(isr, C62X, write, 0x2, 0x10) |
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| 44 | CTRL(istp, C62X, read_write, 0x5, 0x10) |
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| 45 | CTRL(itsr, C64XP, read_write, 0x1b, 0x1f) |
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| 46 | CTRL(nrp, C62X, read_write, 0x7, 0x10) |
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| 47 | CTRL(ntsr, C64XP, read_write, 0x1c, 0x1f) |
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| 48 | CTRL(pce1, C62X, read, 0x10, 0xf) |
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| 49 | CTRL(rep, C64XP, read_write, 0xf, 0x1f) |
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| 50 | CTRL(rilc, C64XP, read_write, 0xe, 0x1f) |
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| 51 | CTRL(ssr, C64XP, read_write, 0x15, 0x1f) |
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| 52 | CTRL(tsch, C64XP, read, 0xb, 0x1f) |
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| 53 | /* Contrary to Table 3-26 in SPRUFE8, this register is read-write, as |
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| 54 | documented in section 2.9.13. */ |
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| 55 | CTRL(tscl, C64XP, read_write, 0xa, 0x1f) |
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| 56 | CTRL(tsr, C64XP, read_write, 0x1a, 0x1f) |
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