| 1 | /* xgate.h -- Freescale XGATE opcode list |
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| 2 | Copyright 2010, 2011, 2012 Free Software Foundation, Inc. |
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| 3 | Written by Sean Keys (skeys@ipdatasys.com) |
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| 4 | |
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| 5 | This file is part of the GNU opcodes library. |
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| 6 | |
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| 7 | This library is free software; you can redistribute it and/or modify |
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| 8 | it under the terms of the GNU General Public License as published by |
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| 9 | the Free Software Foundation; either version 3, or (at your option) |
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| 10 | any later version. |
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| 11 | |
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| 12 | It is distributed in the hope that it will be useful, but WITHOUT |
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| 13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
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| 14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
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| 15 | License for more details. |
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| 16 | |
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| 17 | You should have received a copy of the GNU General Public License |
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| 18 | along with this file; see the file COPYING. If not, write to the |
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| 19 | Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
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| 20 | MA 02110-1301, USA. */ |
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| 21 | |
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| 22 | #ifndef _OPCODE_XGATE_H |
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| 23 | #define _OPCODE_XGATE_H |
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| 24 | |
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| 25 | /* XGATE CCR flag definitions. */ |
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| 26 | #define XGATE_N_BIT 0x08 /* XGN - Sign Flag */ |
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| 27 | #define XGATE_Z_BIT 0x04 /* XGZ - Zero Flag */ |
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| 28 | #define XGATE_V_BIT 0x02 /* XGV - Overflow Flag */ |
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| 29 | #define XGATE_C_BIT 0x01 /* XGC - Carry Flag */ |
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| 30 | |
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| 31 | /* Access Detail Notation |
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| 32 | V — Vector fetch: always an aligned word read, lasts for at least one RISC core cycle |
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| 33 | P — Program word fetch: always an aligned word read, lasts for at least one RISC core cycle |
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| 34 | r — 8-bit data read: lasts for at least one RISC core cycle |
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| 35 | R — 16-bit data read: lasts for at least one RISC core cycle |
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| 36 | w — 8-bit data write: lasts for at least one RISC core cycle |
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| 37 | W — 16-bit data write: lasts for at least one RISC core cycle |
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| 38 | A — Alignment cycle: no read or write, lasts for zero or one RISC core cycles |
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| 39 | f — Free cycle: no read or write, lasts for one RISC core cycles. */ |
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| 40 | #define XGATE_CYCLE_V 0x01 |
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| 41 | #define XGATE_CYCLE_P 0x02 |
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| 42 | #define XGATE_CYCLE_r 0x04 |
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| 43 | #define XGATE_CYCLE_R 0x08 |
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| 44 | #define XGATE_CYCLE_w 0x10 |
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| 45 | #define XGATE_CYCLE_W 0x20 |
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| 46 | #define XGATE_CYCLE_A 0x40 |
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| 47 | #define XGATE_CYCLE_f 0x80 |
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| 48 | |
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| 49 | /* XGATE operand formats as stored in the XGATE_opcode table. |
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| 50 | They are only used by GAS to recognize operands. */ |
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| 51 | #define XGATE_OP_INH "" /* Inherent. */ |
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| 52 | #define XGATE_OP_TRI "r,r,r" /* Register followed by two registers. */ |
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| 53 | #define XGATE_OP_DYA "r,r" /* Register followed by a register. */ |
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| 54 | #define XGATE_OP_IMM16 "r,if" /* Register followed by 16-bit value. */ |
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| 55 | #define XGATE_OP_IMM8 "r,i8" /* Register followed by 8-bit value. */ |
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| 56 | #define XGATE_OP_IMM4 "r,i4" /* Register followed by 4-bit value. */ |
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| 57 | #define XGATE_OP_IMM3 "i3" /* Register followed by 3-bit value. */ |
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| 58 | #define XGATE_OP_MON "r" /* Single register. */ |
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| 59 | #define XGATE_OP_MON_R_C "r,c" /* General register followed by ccr register. */ |
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| 60 | #define XGATE_OP_MON_C_R "c,r" /* CCR register followed by a general register. */ |
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| 61 | #define XGATE_OP_MON_R_P "r,p" /* General register followed by pc register. */ |
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| 62 | #define XGATE_OP_IDR "r,r,+" /* Three registers with the third having a -/+ directive. */ |
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| 63 | #define XGATE_OP_IDO5 "r,r,i5" /* Two general registers followed by an immediate value. */ |
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| 64 | #define XGATE_OP_REL9 "b9" /* 9-bit value that is relative to the current pc. */ |
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| 65 | #define XGATE_OP_REL10 "ba" /* 10-bit value that is relative to the current pc. */ |
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| 66 | #define XGATE_OP_DYA_MON "=r" |
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| 67 | /* Macro definitions. */ |
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| 68 | #define XGATE_OP_IMM16mADD "r,if; addl addh" |
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| 69 | #define XGATE_OP_IMM16mAND "r,if; andl andh" |
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| 70 | #define XGATE_OP_IMM16mCPC "r,if; cmpl cpch" |
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| 71 | #define XGATE_OP_IMM16mSUB "r,if; subl subh" |
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| 72 | #define XGATE_OP_IMM16mLDW "r,if; ldl ldh" |
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| 73 | |
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| 74 | /* CPU variant identification. */ |
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| 75 | #define XGATE_V1 0x1 |
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| 76 | #define XGATE_V2 0x2 |
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| 77 | #define XGATE_V3 0x4 |
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| 78 | |
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| 79 | /* The opcode table definitions. */ |
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| 80 | struct xgate_opcode |
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| 81 | { |
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| 82 | char * name; /* Op-code name. */ |
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| 83 | char * constraints; /* Constraint chars. */ |
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| 84 | char * format; /* Bit definitions. */ |
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| 85 | unsigned int size; /* Opcode size in bytes. */ |
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| 86 | unsigned int bin_opcode; /* Binary opcode with operands masked off. */ |
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| 87 | unsigned char cycles_min; /* Minimum cpu cycles needed. */ |
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| 88 | unsigned char cycles_max; /* Maximum cpu cycles needed. */ |
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| 89 | unsigned char set_flags_mask; /* CCR flags set. */ |
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| 90 | unsigned char clr_flags_mask; /* CCR flags cleared. */ |
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| 91 | unsigned char chg_flags_mask; /* CCR flags changed. */ |
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| 92 | unsigned char arch; /* CPU variant. */ |
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| 93 | }; |
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| 94 | |
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| 95 | /* The opcode table. The table contains all the opcodes (all pages). |
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| 96 | You can't rely on the order. */ |
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| 97 | extern const struct xgate_opcode xgate_opcodes[]; |
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| 98 | extern const int xgate_num_opcodes; |
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| 99 | |
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| 100 | #endif /* _OPCODE_XGATE_H */ |
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