| 1 | /* |
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| 2 | * The authors hereby grant permission to use, copy, modify, distribute, |
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| 3 | * and license this software and its documentation for any purpose, provided |
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| 4 | * that existing copyright notices are retained in all copies and that this |
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| 5 | * notice is included verbatim in any distributions. No written agreement, |
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| 6 | * license, or royalty fee is required for any of the authorized uses. |
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| 7 | * Modifications to this software may be copyrighted by their authors |
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| 8 | * and need not follow the licensing terms described here, provided that |
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| 9 | * the new terms are clearly indicated on the first page of each file where |
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| 10 | * they apply. |
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| 11 | */ |
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| 12 | |
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| 13 | /* |
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| 14 | ** cdefBF51x_base.h |
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| 15 | ** |
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| 16 | ** Copyright (C) 2007-2009 Analog Devices Inc., All Rights Reserved. |
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| 17 | ** |
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| 18 | ************************************************************************************ |
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| 19 | ** |
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| 20 | ** This include file contains a list of macro "defines" to enable the programmer |
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| 21 | ** to use symbolic names for the registers common to the ADSP-BF51x peripherals. |
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| 22 | ** |
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| 23 | ***************************************************************/ |
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| 24 | |
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| 25 | #ifndef _CDEF_BF51X_H |
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| 26 | #define _CDEF_BF51X_H |
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| 27 | |
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| 28 | #include <defBF51x_base.h> |
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| 29 | |
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| 30 | #ifdef _MISRA_RULES |
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| 31 | #pragma diag(push) |
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| 32 | #pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant") |
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| 33 | #endif /* _MISRA_RULES */ |
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| 34 | |
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| 35 | #ifndef _PTR_TO_VOL_VOID_PTR |
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| 36 | #ifndef _USE_LEGACY_CDEF_BEHAVIOUR |
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| 37 | #define _PTR_TO_VOL_VOID_PTR (void * volatile *) |
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| 38 | #else |
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| 39 | #define _PTR_TO_VOL_VOID_PTR (volatile void **) |
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| 40 | #endif |
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| 41 | #endif |
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| 42 | |
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| 43 | |
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| 44 | /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */ |
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| 45 | #define pPLL_CTL ((volatile unsigned short *)PLL_CTL) |
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| 46 | #define pPLL_DIV ((volatile unsigned short *)PLL_DIV) |
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| 47 | #define pVR_CTL ((volatile unsigned short *)VR_CTL) |
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| 48 | #define pPLL_STAT ((volatile unsigned short *)PLL_STAT) |
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| 49 | #define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT) |
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| 50 | #define pCHIPID ((volatile unsigned long *)CHIPID) |
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| 51 | |
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| 52 | |
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| 53 | /* System Interrupt Controller(0xFFC00100 - 0xFFC001FF) */ |
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| 54 | #define pSWRST ((volatile unsigned short *)SWRST) |
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| 55 | #define pSYSCR ((volatile unsigned short *)SYSCR) |
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| 56 | |
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| 57 | #define pSIC_IMASK0 ((volatile unsigned long *)SIC_IMASK0) /* legacy register name (below) provided for backwards code compatibility */ |
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| 58 | #define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK0) |
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| 59 | #define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0) |
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| 60 | #define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1) |
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| 61 | #define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2) |
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| 62 | #define pSIC_IAR3 ((volatile unsigned long *)SIC_IAR3) |
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| 63 | #define pSIC_ISR0 ((volatile unsigned long *)SIC_ISR0) /* legacy register name (below) provided for backwards code compatibility */ |
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| 64 | #define pSIC_ISR ((volatile unsigned long *)SIC_ISR0) |
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| 65 | #define pSIC_IWR0 ((volatile unsigned long *)SIC_IWR0) /* legacy register name (below) provided for backwards code compatibility */ |
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| 66 | #define pSIC_IWR ((volatile unsigned long *)SIC_IWR0) |
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| 67 | |
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| 68 | /* SIC Additions to ADSP-BF51x(0xFFC0014C - 0xFFC00162) */ |
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| 69 | #define pSIC_IMASK1 ((volatile unsigned long *)SIC_IMASK1) |
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| 70 | #define pSIC_IAR4 ((volatile unsigned long *)SIC_IAR4) |
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| 71 | #define pSIC_IAR5 ((volatile unsigned long *)SIC_IAR5) |
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| 72 | #define pSIC_IAR6 ((volatile unsigned long *)SIC_IAR6) |
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| 73 | #define pSIC_IAR7 ((volatile unsigned long *)SIC_IAR7) |
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| 74 | #define pSIC_ISR1 ((volatile unsigned long *)SIC_ISR1) |
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| 75 | #define pSIC_IWR1 ((volatile unsigned long *)SIC_IWR1) |
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| 76 | |
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| 77 | /* Watchdog Timer (0xFFC00200 - 0xFFC002FF) */ |
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| 78 | #define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL) |
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| 79 | #define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT) |
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| 80 | #define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT) |
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| 81 | |
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| 82 | |
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| 83 | /* Real Time Clock (0xFFC00300 - 0xFFC003FF) */ |
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| 84 | #define pRTC_STAT ((volatile unsigned long *)RTC_STAT) |
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| 85 | #define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL) |
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| 86 | #define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT) |
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| 87 | #define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT) |
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| 88 | #define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM) |
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| 89 | #define pRTC_FAST ((volatile unsigned short *)RTC_FAST) |
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| 90 | #define pRTC_PREN ((volatile unsigned short *)RTC_PREN) |
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| 91 | |
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| 92 | |
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| 93 | /* UART0 Controller (0xFFC00400 - 0xFFC004FF) */ |
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| 94 | #define pUART0_THR ((volatile unsigned short *)UART0_THR) |
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| 95 | #define pUART0_RBR ((volatile unsigned short *)UART0_RBR) |
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| 96 | #define pUART0_DLL ((volatile unsigned short *)UART0_DLL) |
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| 97 | #define pUART0_IER ((volatile unsigned short *)UART0_IER) |
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| 98 | #define pUART0_DLH ((volatile unsigned short *)UART0_DLH) |
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| 99 | #define pUART0_IIR ((volatile unsigned short *)UART0_IIR) |
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| 100 | #define pUART0_LCR ((volatile unsigned short *)UART0_LCR) |
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| 101 | #define pUART0_MCR ((volatile unsigned short *)UART0_MCR) |
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| 102 | #define pUART0_LSR ((volatile unsigned short *)UART0_LSR) |
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| 103 | #define pUART0_SCR ((volatile unsigned short *)UART0_SCR) |
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| 104 | #define pUART0_GCTL ((volatile unsigned short *)UART0_GCTL) |
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| 105 | |
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| 106 | |
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| 107 | /* SPI0 Controller (0xFFC00500 - 0xFFC005FF)*/ |
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| 108 | #define pSPI0_CTL ((volatile unsigned short *)SPI0_CTL) |
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| 109 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 110 | #define pSPI_CTL pSPI0_CTL |
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| 111 | #define pSPI0_FLG ((volatile unsigned short *)SPI0_FLG) |
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| 112 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 113 | #define pSPI_FLG pSPI0_FLG |
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| 114 | #define pSPI0_STAT ((volatile unsigned short *)SPI0_STAT) |
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| 115 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 116 | #define pSPI_STAT pSPI0_STAT |
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| 117 | #define pSPI0_TDBR ((volatile unsigned short *)SPI0_TDBR) |
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| 118 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 119 | #define pSPI_TDBR pSPI0_TDBR |
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| 120 | #define pSPI0_RDBR ((volatile unsigned short *)SPI0_RDBR) |
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| 121 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 122 | #define pSPI_RDBR pSPI0_RDBR |
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| 123 | #define pSPI0_BAUD ((volatile unsigned short *)SPI0_BAUD) |
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| 124 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 125 | #define pSPI_BAUD pSPI0_BAUD |
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| 126 | #define pSPI0_SHADOW ((volatile unsigned short *)SPI0_SHADOW) |
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| 127 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 128 | #define pSPI_SHADOW pSPI0_SHADOW |
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| 129 | |
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| 130 | |
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| 131 | /* TIMER0-7 Registers (0xFFC00600 - 0xFFC006FF) */ |
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| 132 | #define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG) |
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| 133 | #define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER) |
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| 134 | #define pTIMER0_PERIOD ((volatile unsigned long *)TIMER0_PERIOD) |
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| 135 | #define pTIMER0_WIDTH ((volatile unsigned long *)TIMER0_WIDTH) |
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| 136 | |
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| 137 | #define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG) |
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| 138 | #define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER) |
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| 139 | #define pTIMER1_PERIOD ((volatile unsigned long *)TIMER1_PERIOD) |
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| 140 | #define pTIMER1_WIDTH ((volatile unsigned long *)TIMER1_WIDTH) |
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| 141 | |
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| 142 | #define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG) |
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| 143 | #define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER) |
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| 144 | #define pTIMER2_PERIOD ((volatile unsigned long *)TIMER2_PERIOD) |
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| 145 | #define pTIMER2_WIDTH ((volatile unsigned long *)TIMER2_WIDTH) |
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| 146 | |
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| 147 | #define pTIMER3_CONFIG ((volatile unsigned short *)TIMER3_CONFIG) |
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| 148 | #define pTIMER3_COUNTER ((volatile unsigned long *)TIMER3_COUNTER) |
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| 149 | #define pTIMER3_PERIOD ((volatile unsigned long *)TIMER3_PERIOD) |
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| 150 | #define pTIMER3_WIDTH ((volatile unsigned long *)TIMER3_WIDTH) |
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| 151 | |
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| 152 | #define pTIMER4_CONFIG ((volatile unsigned short *)TIMER4_CONFIG) |
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| 153 | #define pTIMER4_COUNTER ((volatile unsigned long *)TIMER4_COUNTER) |
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| 154 | #define pTIMER4_PERIOD ((volatile unsigned long *)TIMER4_PERIOD) |
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| 155 | #define pTIMER4_WIDTH ((volatile unsigned long *)TIMER4_WIDTH) |
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| 156 | |
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| 157 | #define pTIMER5_CONFIG ((volatile unsigned short *)TIMER5_CONFIG) |
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| 158 | #define pTIMER5_COUNTER ((volatile unsigned long *)TIMER5_COUNTER) |
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| 159 | #define pTIMER5_PERIOD ((volatile unsigned long *)TIMER5_PERIOD) |
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| 160 | #define pTIMER5_WIDTH ((volatile unsigned long *)TIMER5_WIDTH) |
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| 161 | |
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| 162 | #define pTIMER6_CONFIG ((volatile unsigned short *)TIMER6_CONFIG) |
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| 163 | #define pTIMER6_COUNTER ((volatile unsigned long *)TIMER6_COUNTER) |
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| 164 | #define pTIMER6_PERIOD ((volatile unsigned long *)TIMER6_PERIOD) |
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| 165 | #define pTIMER6_WIDTH ((volatile unsigned long *)TIMER6_WIDTH) |
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| 166 | |
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| 167 | #define pTIMER7_CONFIG ((volatile unsigned short *)TIMER7_CONFIG) |
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| 168 | #define pTIMER7_COUNTER ((volatile unsigned long *)TIMER7_COUNTER) |
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| 169 | #define pTIMER7_PERIOD ((volatile unsigned long *)TIMER7_PERIOD) |
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| 170 | #define pTIMER7_WIDTH ((volatile unsigned long *)TIMER7_WIDTH) |
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| 171 | |
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| 172 | #define pTIMER_ENABLE ((volatile unsigned short *)TIMER_ENABLE) |
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| 173 | #define pTIMER_DISABLE ((volatile unsigned short *)TIMER_DISABLE) |
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| 174 | #define pTIMER_STATUS ((volatile unsigned long *)TIMER_STATUS) |
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| 175 | |
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| 176 | |
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| 177 | /* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF) */ |
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| 178 | #define pPORTFIO ((volatile unsigned short *)PORTFIO) |
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| 179 | #define pPORTFIO_CLEAR ((volatile unsigned short *)PORTFIO_CLEAR) |
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| 180 | #define pPORTFIO_SET ((volatile unsigned short *)PORTFIO_SET) |
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| 181 | #define pPORTFIO_TOGGLE ((volatile unsigned short *)PORTFIO_TOGGLE) |
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| 182 | #define pPORTFIO_MASKA ((volatile unsigned short *)PORTFIO_MASKA) |
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| 183 | #define pPORTFIO_MASKA_CLEAR ((volatile unsigned short *)PORTFIO_MASKA_CLEAR) |
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| 184 | #define pPORTFIO_MASKA_SET ((volatile unsigned short *)PORTFIO_MASKA_SET) |
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| 185 | #define pPORTFIO_MASKA_TOGGLE ((volatile unsigned short *)PORTFIO_MASKA_TOGGLE) |
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| 186 | #define pPORTFIO_MASKB ((volatile unsigned short *)PORTFIO_MASKB) |
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| 187 | #define pPORTFIO_MASKB_CLEAR ((volatile unsigned short *)PORTFIO_MASKB_CLEAR) |
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| 188 | #define pPORTFIO_MASKB_SET ((volatile unsigned short *)PORTFIO_MASKB_SET) |
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| 189 | #define pPORTFIO_MASKB_TOGGLE ((volatile unsigned short *)PORTFIO_MASKB_TOGGLE) |
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| 190 | #define pPORTFIO_DIR ((volatile unsigned short *)PORTFIO_DIR) |
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| 191 | #define pPORTFIO_POLAR ((volatile unsigned short *)PORTFIO_POLAR) |
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| 192 | #define pPORTFIO_EDGE ((volatile unsigned short *)PORTFIO_EDGE) |
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| 193 | #define pPORTFIO_BOTH ((volatile unsigned short *)PORTFIO_BOTH) |
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| 194 | #define pPORTFIO_INEN ((volatile unsigned short *)PORTFIO_INEN) |
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| 195 | |
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| 196 | |
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| 197 | /* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */ |
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| 198 | #define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1) |
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| 199 | #define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2) |
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| 200 | #define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV) |
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| 201 | #define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV) |
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| 202 | #define pSPORT0_TX ((volatile unsigned long *)SPORT0_TX) |
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| 203 | #define pSPORT0_RX ((volatile unsigned long *)SPORT0_RX) |
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| 204 | #define pSPORT0_TX32 ((volatile unsigned long *)SPORT0_TX) |
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| 205 | #define pSPORT0_RX32 ((volatile unsigned long *)SPORT0_RX) |
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| 206 | #define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX) |
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| 207 | #define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX) |
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| 208 | #define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1) |
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| 209 | #define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2) |
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| 210 | #define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV) |
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| 211 | #define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV) |
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| 212 | #define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT) |
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| 213 | #define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL) |
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| 214 | #define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1) |
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| 215 | #define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2) |
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| 216 | #define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0) |
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| 217 | #define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1) |
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| 218 | #define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2) |
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| 219 | #define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3) |
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| 220 | #define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0) |
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| 221 | #define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1) |
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| 222 | #define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2) |
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| 223 | #define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3) |
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| 224 | |
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| 225 | |
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| 226 | /* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */ |
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| 227 | #define pSPORT1_TCR1 ((volatile unsigned short *)SPORT1_TCR1) |
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| 228 | #define pSPORT1_TCR2 ((volatile unsigned short *)SPORT1_TCR2) |
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| 229 | #define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV) |
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| 230 | #define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV) |
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| 231 | #define pSPORT1_TX ((volatile unsigned long *)SPORT1_TX) |
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| 232 | #define pSPORT1_RX ((volatile unsigned long *)SPORT1_RX) |
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| 233 | #define pSPORT1_TX32 ((volatile unsigned long *)SPORT1_TX) |
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| 234 | #define pSPORT1_RX32 ((volatile unsigned long *)SPORT1_RX) |
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| 235 | #define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX) |
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| 236 | #define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX) |
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| 237 | #define pSPORT1_RCR1 ((volatile unsigned short *)SPORT1_RCR1) |
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| 238 | #define pSPORT1_RCR2 ((volatile unsigned short *)SPORT1_RCR2) |
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| 239 | #define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV) |
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| 240 | #define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV) |
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| 241 | #define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT) |
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| 242 | #define pSPORT1_CHNL ((volatile unsigned short *)SPORT1_CHNL) |
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| 243 | #define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1) |
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| 244 | #define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2) |
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| 245 | #define pSPORT1_MTCS0 ((volatile unsigned long *)SPORT1_MTCS0) |
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| 246 | #define pSPORT1_MTCS1 ((volatile unsigned long *)SPORT1_MTCS1) |
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| 247 | #define pSPORT1_MTCS2 ((volatile unsigned long *)SPORT1_MTCS2) |
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| 248 | #define pSPORT1_MTCS3 ((volatile unsigned long *)SPORT1_MTCS3) |
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| 249 | #define pSPORT1_MRCS0 ((volatile unsigned long *)SPORT1_MRCS0) |
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| 250 | #define pSPORT1_MRCS1 ((volatile unsigned long *)SPORT1_MRCS1) |
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| 251 | #define pSPORT1_MRCS2 ((volatile unsigned long *)SPORT1_MRCS2) |
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| 252 | #define pSPORT1_MRCS3 ((volatile unsigned long *)SPORT1_MRCS3) |
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| 253 | |
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| 254 | |
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| 255 | /* External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */ |
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| 256 | #define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL) |
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| 257 | #define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0) |
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| 258 | #define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1) |
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| 259 | #define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL) |
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| 260 | #define pEBIU_SDBCTL ((volatile unsigned short *)EBIU_SDBCTL) |
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| 261 | #define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC) |
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| 262 | #define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT) |
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| 263 | |
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| 264 | |
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| 265 | /* DMA Traffic Control Registers (0xFFC00B00 - 0xFFC00BFF) */ |
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| 266 | #define pDMA_TC_PER ((volatile unsigned short *)DMA_TC_PER) |
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| 267 | #define pDMA_TC_CNT ((volatile unsigned short *)DMA_TC_CNT) |
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| 268 | |
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| 269 | /* Alternate deprecated register names (below) provided for backwards code compatibility */ |
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| 270 | #define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER) |
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| 271 | #define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT) |
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| 272 | |
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| 273 | /* DMA Controller (0xFFC00C00 - FFC00FFF)*/ |
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| 274 | #define pDMA0_CONFIG ((volatile unsigned short *)DMA0_CONFIG) |
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| 275 | #define pDMA0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR) |
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| 276 | #define pDMA0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_START_ADDR) |
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| 277 | #define pDMA0_X_COUNT ((volatile unsigned short *)DMA0_X_COUNT) |
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| 278 | #define pDMA0_Y_COUNT ((volatile unsigned short *)DMA0_Y_COUNT) |
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| 279 | #define pDMA0_X_MODIFY ((volatile signed short *)DMA0_X_MODIFY) |
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| 280 | #define pDMA0_Y_MODIFY ((volatile signed short *)DMA0_Y_MODIFY) |
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| 281 | #define pDMA0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_DESC_PTR) |
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| 282 | #define pDMA0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_ADDR) |
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| 283 | #define pDMA0_CURR_X_COUNT ((volatile unsigned short *)DMA0_CURR_X_COUNT) |
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| 284 | #define pDMA0_CURR_Y_COUNT ((volatile unsigned short *)DMA0_CURR_Y_COUNT) |
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| 285 | #define pDMA0_IRQ_STATUS ((volatile unsigned short *)DMA0_IRQ_STATUS) |
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| 286 | #define pDMA0_PERIPHERAL_MAP ((volatile unsigned short *)DMA0_PERIPHERAL_MAP) |
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| 287 | |
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| 288 | #define pDMA1_CONFIG ((volatile unsigned short *)DMA1_CONFIG) |
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| 289 | #define pDMA1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_NEXT_DESC_PTR) |
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| 290 | #define pDMA1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_START_ADDR) |
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| 291 | #define pDMA1_X_COUNT ((volatile unsigned short *)DMA1_X_COUNT) |
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| 292 | #define pDMA1_Y_COUNT ((volatile unsigned short *)DMA1_Y_COUNT) |
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| 293 | #define pDMA1_X_MODIFY ((volatile signed short *)DMA1_X_MODIFY) |
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| 294 | #define pDMA1_Y_MODIFY ((volatile signed short *)DMA1_Y_MODIFY) |
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| 295 | #define pDMA1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_DESC_PTR) |
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| 296 | #define pDMA1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_ADDR) |
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| 297 | #define pDMA1_CURR_X_COUNT ((volatile unsigned short *)DMA1_CURR_X_COUNT) |
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| 298 | #define pDMA1_CURR_Y_COUNT ((volatile unsigned short *)DMA1_CURR_Y_COUNT) |
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| 299 | #define pDMA1_IRQ_STATUS ((volatile unsigned short *)DMA1_IRQ_STATUS) |
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| 300 | #define pDMA1_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_PERIPHERAL_MAP) |
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| 301 | |
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| 302 | #define pDMA2_CONFIG ((volatile unsigned short *)DMA2_CONFIG) |
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| 303 | #define pDMA2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_NEXT_DESC_PTR) |
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| 304 | #define pDMA2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_START_ADDR) |
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| 305 | #define pDMA2_X_COUNT ((volatile unsigned short *)DMA2_X_COUNT) |
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| 306 | #define pDMA2_Y_COUNT ((volatile unsigned short *)DMA2_Y_COUNT) |
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| 307 | #define pDMA2_X_MODIFY ((volatile signed short *)DMA2_X_MODIFY) |
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| 308 | #define pDMA2_Y_MODIFY ((volatile signed short *)DMA2_Y_MODIFY) |
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| 309 | #define pDMA2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_DESC_PTR) |
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| 310 | #define pDMA2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_ADDR) |
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| 311 | #define pDMA2_CURR_X_COUNT ((volatile unsigned short *)DMA2_CURR_X_COUNT) |
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| 312 | #define pDMA2_CURR_Y_COUNT ((volatile unsigned short *)DMA2_CURR_Y_COUNT) |
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| 313 | #define pDMA2_IRQ_STATUS ((volatile unsigned short *)DMA2_IRQ_STATUS) |
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| 314 | #define pDMA2_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_PERIPHERAL_MAP) |
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| 315 | |
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| 316 | #define pDMA3_CONFIG ((volatile unsigned short *)DMA3_CONFIG) |
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| 317 | #define pDMA3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_NEXT_DESC_PTR) |
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| 318 | #define pDMA3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_START_ADDR) |
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| 319 | #define pDMA3_X_COUNT ((volatile unsigned short *)DMA3_X_COUNT) |
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| 320 | #define pDMA3_Y_COUNT ((volatile unsigned short *)DMA3_Y_COUNT) |
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| 321 | #define pDMA3_X_MODIFY ((volatile signed short *)DMA3_X_MODIFY) |
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| 322 | #define pDMA3_Y_MODIFY ((volatile signed short *)DMA3_Y_MODIFY) |
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| 323 | #define pDMA3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_DESC_PTR) |
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| 324 | #define pDMA3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_ADDR) |
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| 325 | #define pDMA3_CURR_X_COUNT ((volatile unsigned short *)DMA3_CURR_X_COUNT) |
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| 326 | #define pDMA3_CURR_Y_COUNT ((volatile unsigned short *)DMA3_CURR_Y_COUNT) |
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| 327 | #define pDMA3_IRQ_STATUS ((volatile unsigned short *)DMA3_IRQ_STATUS) |
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| 328 | #define pDMA3_PERIPHERAL_MAP ((volatile unsigned short *)DMA3_PERIPHERAL_MAP) |
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| 329 | |
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| 330 | #define pDMA4_CONFIG ((volatile unsigned short *)DMA4_CONFIG) |
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| 331 | #define pDMA4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_NEXT_DESC_PTR) |
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| 332 | #define pDMA4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_START_ADDR) |
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| 333 | #define pDMA4_X_COUNT ((volatile unsigned short *)DMA4_X_COUNT) |
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| 334 | #define pDMA4_Y_COUNT ((volatile unsigned short *)DMA4_Y_COUNT) |
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| 335 | #define pDMA4_X_MODIFY ((volatile signed short *)DMA4_X_MODIFY) |
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| 336 | #define pDMA4_Y_MODIFY ((volatile signed short *)DMA4_Y_MODIFY) |
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| 337 | #define pDMA4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_DESC_PTR) |
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| 338 | #define pDMA4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_ADDR) |
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| 339 | #define pDMA4_CURR_X_COUNT ((volatile unsigned short *)DMA4_CURR_X_COUNT) |
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| 340 | #define pDMA4_CURR_Y_COUNT ((volatile unsigned short *)DMA4_CURR_Y_COUNT) |
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| 341 | #define pDMA4_IRQ_STATUS ((volatile unsigned short *)DMA4_IRQ_STATUS) |
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| 342 | #define pDMA4_PERIPHERAL_MAP ((volatile unsigned short *)DMA4_PERIPHERAL_MAP) |
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| 343 | |
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| 344 | #define pDMA5_CONFIG ((volatile unsigned short *)DMA5_CONFIG) |
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| 345 | #define pDMA5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_NEXT_DESC_PTR) |
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| 346 | #define pDMA5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_START_ADDR) |
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| 347 | #define pDMA5_X_COUNT ((volatile unsigned short *)DMA5_X_COUNT) |
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| 348 | #define pDMA5_Y_COUNT ((volatile unsigned short *)DMA5_Y_COUNT) |
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| 349 | #define pDMA5_X_MODIFY ((volatile signed short *)DMA5_X_MODIFY) |
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| 350 | #define pDMA5_Y_MODIFY ((volatile signed short *)DMA5_Y_MODIFY) |
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| 351 | #define pDMA5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_DESC_PTR) |
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| 352 | #define pDMA5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_ADDR) |
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| 353 | #define pDMA5_CURR_X_COUNT ((volatile unsigned short *)DMA5_CURR_X_COUNT) |
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| 354 | #define pDMA5_CURR_Y_COUNT ((volatile unsigned short *)DMA5_CURR_Y_COUNT) |
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| 355 | #define pDMA5_IRQ_STATUS ((volatile unsigned short *)DMA5_IRQ_STATUS) |
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| 356 | #define pDMA5_PERIPHERAL_MAP ((volatile unsigned short *)DMA5_PERIPHERAL_MAP) |
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| 357 | |
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| 358 | #define pDMA6_CONFIG ((volatile unsigned short *)DMA6_CONFIG) |
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| 359 | #define pDMA6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_NEXT_DESC_PTR) |
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| 360 | #define pDMA6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_START_ADDR) |
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| 361 | #define pDMA6_X_COUNT ((volatile unsigned short *)DMA6_X_COUNT) |
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| 362 | #define pDMA6_Y_COUNT ((volatile unsigned short *)DMA6_Y_COUNT) |
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| 363 | #define pDMA6_X_MODIFY ((volatile signed short *)DMA6_X_MODIFY) |
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| 364 | #define pDMA6_Y_MODIFY ((volatile signed short *)DMA6_Y_MODIFY) |
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| 365 | #define pDMA6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_DESC_PTR) |
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| 366 | #define pDMA6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_ADDR) |
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| 367 | #define pDMA6_CURR_X_COUNT ((volatile unsigned short *)DMA6_CURR_X_COUNT) |
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| 368 | #define pDMA6_CURR_Y_COUNT ((volatile unsigned short *)DMA6_CURR_Y_COUNT) |
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| 369 | #define pDMA6_IRQ_STATUS ((volatile unsigned short *)DMA6_IRQ_STATUS) |
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| 370 | #define pDMA6_PERIPHERAL_MAP ((volatile unsigned short *)DMA6_PERIPHERAL_MAP) |
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| 371 | |
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| 372 | #define pDMA7_CONFIG ((volatile unsigned short *)DMA7_CONFIG) |
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| 373 | #define pDMA7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_NEXT_DESC_PTR) |
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| 374 | #define pDMA7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_START_ADDR) |
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| 375 | #define pDMA7_X_COUNT ((volatile unsigned short *)DMA7_X_COUNT) |
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| 376 | #define pDMA7_Y_COUNT ((volatile unsigned short *)DMA7_Y_COUNT) |
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| 377 | #define pDMA7_X_MODIFY ((volatile signed short *)DMA7_X_MODIFY) |
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| 378 | #define pDMA7_Y_MODIFY ((volatile signed short *)DMA7_Y_MODIFY) |
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| 379 | #define pDMA7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_DESC_PTR) |
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| 380 | #define pDMA7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_ADDR) |
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| 381 | #define pDMA7_CURR_X_COUNT ((volatile unsigned short *)DMA7_CURR_X_COUNT) |
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| 382 | #define pDMA7_CURR_Y_COUNT ((volatile unsigned short *)DMA7_CURR_Y_COUNT) |
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| 383 | #define pDMA7_IRQ_STATUS ((volatile unsigned short *)DMA7_IRQ_STATUS) |
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| 384 | #define pDMA7_PERIPHERAL_MAP ((volatile unsigned short *)DMA7_PERIPHERAL_MAP) |
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| 385 | |
|---|
| 386 | #define pDMA8_CONFIG ((volatile unsigned short *)DMA8_CONFIG) |
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| 387 | #define pDMA8_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA8_NEXT_DESC_PTR) |
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| 388 | #define pDMA8_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA8_START_ADDR) |
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| 389 | #define pDMA8_X_COUNT ((volatile unsigned short *)DMA8_X_COUNT) |
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| 390 | #define pDMA8_Y_COUNT ((volatile unsigned short *)DMA8_Y_COUNT) |
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| 391 | #define pDMA8_X_MODIFY ((volatile signed short *)DMA8_X_MODIFY) |
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| 392 | #define pDMA8_Y_MODIFY ((volatile signed short *)DMA8_Y_MODIFY) |
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| 393 | #define pDMA8_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA8_CURR_DESC_PTR) |
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| 394 | #define pDMA8_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA8_CURR_ADDR) |
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| 395 | #define pDMA8_CURR_X_COUNT ((volatile unsigned short *)DMA8_CURR_X_COUNT) |
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| 396 | #define pDMA8_CURR_Y_COUNT ((volatile unsigned short *)DMA8_CURR_Y_COUNT) |
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| 397 | #define pDMA8_IRQ_STATUS ((volatile unsigned short *)DMA8_IRQ_STATUS) |
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| 398 | #define pDMA8_PERIPHERAL_MAP ((volatile unsigned short *)DMA8_PERIPHERAL_MAP) |
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| 399 | |
|---|
| 400 | #define pDMA9_CONFIG ((volatile unsigned short *)DMA9_CONFIG) |
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| 401 | #define pDMA9_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA9_NEXT_DESC_PTR) |
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| 402 | #define pDMA9_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA9_START_ADDR) |
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| 403 | #define pDMA9_X_COUNT ((volatile unsigned short *)DMA9_X_COUNT) |
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| 404 | #define pDMA9_Y_COUNT ((volatile unsigned short *)DMA9_Y_COUNT) |
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| 405 | #define pDMA9_X_MODIFY ((volatile signed short *)DMA9_X_MODIFY) |
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| 406 | #define pDMA9_Y_MODIFY ((volatile signed short *)DMA9_Y_MODIFY) |
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| 407 | #define pDMA9_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA9_CURR_DESC_PTR) |
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| 408 | #define pDMA9_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA9_CURR_ADDR) |
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| 409 | #define pDMA9_CURR_X_COUNT ((volatile unsigned short *)DMA9_CURR_X_COUNT) |
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| 410 | #define pDMA9_CURR_Y_COUNT ((volatile unsigned short *)DMA9_CURR_Y_COUNT) |
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| 411 | #define pDMA9_IRQ_STATUS ((volatile unsigned short *)DMA9_IRQ_STATUS) |
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| 412 | #define pDMA9_PERIPHERAL_MAP ((volatile unsigned short *)DMA9_PERIPHERAL_MAP) |
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| 413 | |
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| 414 | #define pDMA10_CONFIG ((volatile unsigned short *)DMA10_CONFIG) |
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| 415 | #define pDMA10_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA10_NEXT_DESC_PTR) |
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| 416 | #define pDMA10_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA10_START_ADDR) |
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| 417 | #define pDMA10_X_COUNT ((volatile unsigned short *)DMA10_X_COUNT) |
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| 418 | #define pDMA10_Y_COUNT ((volatile unsigned short *)DMA10_Y_COUNT) |
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| 419 | #define pDMA10_X_MODIFY ((volatile signed short *)DMA10_X_MODIFY) |
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| 420 | #define pDMA10_Y_MODIFY ((volatile signed short *)DMA10_Y_MODIFY) |
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| 421 | #define pDMA10_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA10_CURR_DESC_PTR) |
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| 422 | #define pDMA10_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA10_CURR_ADDR) |
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| 423 | #define pDMA10_CURR_X_COUNT ((volatile unsigned short *)DMA10_CURR_X_COUNT) |
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| 424 | #define pDMA10_CURR_Y_COUNT ((volatile unsigned short *)DMA10_CURR_Y_COUNT) |
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| 425 | #define pDMA10_IRQ_STATUS ((volatile unsigned short *)DMA10_IRQ_STATUS) |
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| 426 | #define pDMA10_PERIPHERAL_MAP ((volatile unsigned short *)DMA10_PERIPHERAL_MAP) |
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| 427 | |
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| 428 | #define pDMA11_CONFIG ((volatile unsigned short *)DMA11_CONFIG) |
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| 429 | #define pDMA11_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA11_NEXT_DESC_PTR) |
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| 430 | #define pDMA11_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA11_START_ADDR) |
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| 431 | #define pDMA11_X_COUNT ((volatile unsigned short *)DMA11_X_COUNT) |
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| 432 | #define pDMA11_Y_COUNT ((volatile unsigned short *)DMA11_Y_COUNT) |
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| 433 | #define pDMA11_X_MODIFY ((volatile signed short *)DMA11_X_MODIFY) |
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| 434 | #define pDMA11_Y_MODIFY ((volatile signed short *)DMA11_Y_MODIFY) |
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| 435 | #define pDMA11_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA11_CURR_DESC_PTR) |
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| 436 | #define pDMA11_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA11_CURR_ADDR) |
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| 437 | #define pDMA11_CURR_X_COUNT ((volatile unsigned short *)DMA11_CURR_X_COUNT) |
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| 438 | #define pDMA11_CURR_Y_COUNT ((volatile unsigned short *)DMA11_CURR_Y_COUNT) |
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| 439 | #define pDMA11_IRQ_STATUS ((volatile unsigned short *)DMA11_IRQ_STATUS) |
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| 440 | #define pDMA11_PERIPHERAL_MAP ((volatile unsigned short *)DMA11_PERIPHERAL_MAP) |
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| 441 | |
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| 442 | #define pMDMA_D0_CONFIG ((volatile unsigned short *)MDMA_D0_CONFIG) |
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| 443 | #define pMDMA_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_NEXT_DESC_PTR) |
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| 444 | #define pMDMA_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_START_ADDR) |
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| 445 | #define pMDMA_D0_X_COUNT ((volatile unsigned short *)MDMA_D0_X_COUNT) |
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| 446 | #define pMDMA_D0_Y_COUNT ((volatile unsigned short *)MDMA_D0_Y_COUNT) |
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| 447 | #define pMDMA_D0_X_MODIFY ((volatile signed short *)MDMA_D0_X_MODIFY) |
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| 448 | #define pMDMA_D0_Y_MODIFY ((volatile signed short *)MDMA_D0_Y_MODIFY) |
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| 449 | #define pMDMA_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_DESC_PTR) |
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| 450 | #define pMDMA_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_ADDR) |
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| 451 | #define pMDMA_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA_D0_CURR_X_COUNT) |
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| 452 | #define pMDMA_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D0_CURR_Y_COUNT) |
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| 453 | #define pMDMA_D0_IRQ_STATUS ((volatile unsigned short *)MDMA_D0_IRQ_STATUS) |
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| 454 | #define pMDMA_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D0_PERIPHERAL_MAP) |
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| 455 | |
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| 456 | #define pMDMA_S0_CONFIG ((volatile unsigned short *)MDMA_S0_CONFIG) |
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| 457 | #define pMDMA_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_NEXT_DESC_PTR) |
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| 458 | #define pMDMA_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_START_ADDR) |
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| 459 | #define pMDMA_S0_X_COUNT ((volatile unsigned short *)MDMA_S0_X_COUNT) |
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| 460 | #define pMDMA_S0_Y_COUNT ((volatile unsigned short *)MDMA_S0_Y_COUNT) |
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| 461 | #define pMDMA_S0_X_MODIFY ((volatile signed short *)MDMA_S0_X_MODIFY) |
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| 462 | #define pMDMA_S0_Y_MODIFY ((volatile signed short *)MDMA_S0_Y_MODIFY) |
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| 463 | #define pMDMA_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_DESC_PTR) |
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| 464 | #define pMDMA_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_ADDR) |
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| 465 | #define pMDMA_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA_S0_CURR_X_COUNT) |
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| 466 | #define pMDMA_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S0_CURR_Y_COUNT) |
|---|
| 467 | #define pMDMA_S0_IRQ_STATUS ((volatile unsigned short *)MDMA_S0_IRQ_STATUS) |
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| 468 | #define pMDMA_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S0_PERIPHERAL_MAP) |
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| 469 | |
|---|
| 470 | #define pMDMA_D1_CONFIG ((volatile unsigned short *)MDMA_D1_CONFIG) |
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| 471 | #define pMDMA_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_NEXT_DESC_PTR) |
|---|
| 472 | #define pMDMA_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_START_ADDR) |
|---|
| 473 | #define pMDMA_D1_X_COUNT ((volatile unsigned short *)MDMA_D1_X_COUNT) |
|---|
| 474 | #define pMDMA_D1_Y_COUNT ((volatile unsigned short *)MDMA_D1_Y_COUNT) |
|---|
| 475 | #define pMDMA_D1_X_MODIFY ((volatile signed short *)MDMA_D1_X_MODIFY) |
|---|
| 476 | #define pMDMA_D1_Y_MODIFY ((volatile signed short *)MDMA_D1_Y_MODIFY) |
|---|
| 477 | #define pMDMA_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_DESC_PTR) |
|---|
| 478 | #define pMDMA_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_ADDR) |
|---|
| 479 | #define pMDMA_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA_D1_CURR_X_COUNT) |
|---|
| 480 | #define pMDMA_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_D1_CURR_Y_COUNT) |
|---|
| 481 | #define pMDMA_D1_IRQ_STATUS ((volatile unsigned short *)MDMA_D1_IRQ_STATUS) |
|---|
| 482 | #define pMDMA_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_D1_PERIPHERAL_MAP) |
|---|
| 483 | |
|---|
| 484 | #define pMDMA_S1_CONFIG ((volatile unsigned short *)MDMA_S1_CONFIG) |
|---|
| 485 | #define pMDMA_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_NEXT_DESC_PTR) |
|---|
| 486 | #define pMDMA_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_START_ADDR) |
|---|
| 487 | #define pMDMA_S1_X_COUNT ((volatile unsigned short *)MDMA_S1_X_COUNT) |
|---|
| 488 | #define pMDMA_S1_Y_COUNT ((volatile unsigned short *)MDMA_S1_Y_COUNT) |
|---|
| 489 | #define pMDMA_S1_X_MODIFY ((volatile signed short *)MDMA_S1_X_MODIFY) |
|---|
| 490 | #define pMDMA_S1_Y_MODIFY ((volatile signed short *)MDMA_S1_Y_MODIFY) |
|---|
| 491 | #define pMDMA_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_DESC_PTR) |
|---|
| 492 | #define pMDMA_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_ADDR) |
|---|
| 493 | #define pMDMA_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA_S1_CURR_X_COUNT) |
|---|
| 494 | #define pMDMA_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA_S1_CURR_Y_COUNT) |
|---|
| 495 | #define pMDMA_S1_IRQ_STATUS ((volatile unsigned short *)MDMA_S1_IRQ_STATUS) |
|---|
| 496 | #define pMDMA_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA_S1_PERIPHERAL_MAP) |
|---|
| 497 | |
|---|
| 498 | |
|---|
| 499 | /* Parallel Peripheral Interface (0xFFC01000 - 0xFFC010FF) */ |
|---|
| 500 | #define pPPI_CONTROL ((volatile unsigned short *)PPI_CONTROL) |
|---|
| 501 | #define pPPI_STATUS ((volatile unsigned short *)PPI_STATUS) |
|---|
| 502 | #define pPPI_DELAY ((volatile unsigned short *)PPI_DELAY) |
|---|
| 503 | #define pPPI_COUNT ((volatile unsigned short *)PPI_COUNT) |
|---|
| 504 | #define pPPI_FRAME ((volatile unsigned short *)PPI_FRAME) |
|---|
| 505 | |
|---|
| 506 | |
|---|
| 507 | /* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ |
|---|
| 508 | #define pTWI_CLKDIV ((volatile unsigned short *)TWI_CLKDIV) |
|---|
| 509 | #define pTWI_CONTROL ((volatile unsigned short *)TWI_CONTROL) |
|---|
| 510 | #define pTWI_SLAVE_CTL ((volatile unsigned short *)TWI_SLAVE_CTL) |
|---|
| 511 | #define pTWI_SLAVE_STAT ((volatile unsigned short *)TWI_SLAVE_STAT) |
|---|
| 512 | #define pTWI_SLAVE_ADDR ((volatile unsigned short *)TWI_SLAVE_ADDR) |
|---|
| 513 | #define pTWI_MASTER_CTL ((volatile unsigned short *)TWI_MASTER_CTL) |
|---|
| 514 | #define pTWI_MASTER_STAT ((volatile unsigned short *)TWI_MASTER_STAT) |
|---|
| 515 | #define pTWI_MASTER_ADDR ((volatile unsigned short *)TWI_MASTER_ADDR) |
|---|
| 516 | #define pTWI_INT_STAT ((volatile unsigned short *)TWI_INT_STAT) |
|---|
| 517 | #define pTWI_INT_MASK ((volatile unsigned short *)TWI_INT_MASK) |
|---|
| 518 | #define pTWI_FIFO_CTL ((volatile unsigned short *)TWI_FIFO_CTL) |
|---|
| 519 | #define pTWI_FIFO_STAT ((volatile unsigned short *)TWI_FIFO_STAT) |
|---|
| 520 | #define pTWI_XMT_DATA8 ((volatile unsigned short *)TWI_XMT_DATA8) |
|---|
| 521 | #define pTWI_XMT_DATA16 ((volatile unsigned short *)TWI_XMT_DATA16) |
|---|
| 522 | #define pTWI_RCV_DATA8 ((volatile unsigned short *)TWI_RCV_DATA8) |
|---|
| 523 | #define pTWI_RCV_DATA16 ((volatile unsigned short *)TWI_RCV_DATA16) |
|---|
| 524 | |
|---|
| 525 | |
|---|
| 526 | /* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */ |
|---|
| 527 | #define pPORTGIO ((volatile unsigned short *)PORTGIO) |
|---|
| 528 | #define pPORTGIO_CLEAR ((volatile unsigned short *)PORTGIO_CLEAR) |
|---|
| 529 | #define pPORTGIO_SET ((volatile unsigned short *)PORTGIO_SET) |
|---|
| 530 | #define pPORTGIO_TOGGLE ((volatile unsigned short *)PORTGIO_TOGGLE) |
|---|
| 531 | #define pPORTGIO_MASKA ((volatile unsigned short *)PORTGIO_MASKA) |
|---|
| 532 | #define pPORTGIO_MASKA_CLEAR ((volatile unsigned short *)PORTGIO_MASKA_CLEAR) |
|---|
| 533 | #define pPORTGIO_MASKA_SET ((volatile unsigned short *)PORTGIO_MASKA_SET) |
|---|
| 534 | #define pPORTGIO_MASKA_TOGGLE ((volatile unsigned short *)PORTGIO_MASKA_TOGGLE) |
|---|
| 535 | #define pPORTGIO_MASKB ((volatile unsigned short *)PORTGIO_MASKB) |
|---|
| 536 | #define pPORTGIO_MASKB_CLEAR ((volatile unsigned short *)PORTGIO_MASKB_CLEAR) |
|---|
| 537 | #define pPORTGIO_MASKB_SET ((volatile unsigned short *)PORTGIO_MASKB_SET) |
|---|
| 538 | #define pPORTGIO_MASKB_TOGGLE ((volatile unsigned short *)PORTGIO_MASKB_TOGGLE) |
|---|
| 539 | #define pPORTGIO_DIR ((volatile unsigned short *)PORTGIO_DIR) |
|---|
| 540 | #define pPORTGIO_POLAR ((volatile unsigned short *)PORTGIO_POLAR) |
|---|
| 541 | #define pPORTGIO_EDGE ((volatile unsigned short *)PORTGIO_EDGE) |
|---|
| 542 | #define pPORTGIO_BOTH ((volatile unsigned short *)PORTGIO_BOTH) |
|---|
| 543 | #define pPORTGIO_INEN ((volatile unsigned short *)PORTGIO_INEN) |
|---|
| 544 | |
|---|
| 545 | |
|---|
| 546 | /* General Purpose I/O Port H (0xFFC01700 - 0xFFC017FF) */ |
|---|
| 547 | #define pPORTHIO ((volatile unsigned short *)PORTHIO) |
|---|
| 548 | #define pPORTHIO_CLEAR ((volatile unsigned short *)PORTHIO_CLEAR) |
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| 549 | #define pPORTHIO_SET ((volatile unsigned short *)PORTHIO_SET) |
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| 550 | #define pPORTHIO_TOGGLE ((volatile unsigned short *)PORTHIO_TOGGLE) |
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| 551 | #define pPORTHIO_MASKA ((volatile unsigned short *)PORTHIO_MASKA) |
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| 552 | #define pPORTHIO_MASKA_CLEAR ((volatile unsigned short *)PORTHIO_MASKA_CLEAR) |
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| 553 | #define pPORTHIO_MASKA_SET ((volatile unsigned short *)PORTHIO_MASKA_SET) |
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| 554 | #define pPORTHIO_MASKA_TOGGLE ((volatile unsigned short *)PORTHIO_MASKA_TOGGLE) |
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| 555 | #define pPORTHIO_MASKB ((volatile unsigned short *)PORTHIO_MASKB) |
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| 556 | #define pPORTHIO_MASKB_CLEAR ((volatile unsigned short *)PORTHIO_MASKB_CLEAR) |
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| 557 | #define pPORTHIO_MASKB_SET ((volatile unsigned short *)PORTHIO_MASKB_SET) |
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| 558 | #define pPORTHIO_MASKB_TOGGLE ((volatile unsigned short *)PORTHIO_MASKB_TOGGLE) |
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| 559 | #define pPORTHIO_DIR ((volatile unsigned short *)PORTHIO_DIR) |
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| 560 | #define pPORTHIO_POLAR ((volatile unsigned short *)PORTHIO_POLAR) |
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| 561 | #define pPORTHIO_EDGE ((volatile unsigned short *)PORTHIO_EDGE) |
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| 562 | #define pPORTHIO_BOTH ((volatile unsigned short *)PORTHIO_BOTH) |
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| 563 | #define pPORTHIO_INEN ((volatile unsigned short *)PORTHIO_INEN) |
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| 564 | |
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| 565 | |
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| 566 | /* UART1 Controller (0xFFC02000 - 0xFFC020FF) */ |
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| 567 | #define pUART1_THR ((volatile unsigned short *)UART1_THR) |
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| 568 | #define pUART1_RBR ((volatile unsigned short *)UART1_RBR) |
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| 569 | #define pUART1_DLL ((volatile unsigned short *)UART1_DLL) |
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| 570 | #define pUART1_IER ((volatile unsigned short *)UART1_IER) |
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| 571 | #define pUART1_DLH ((volatile unsigned short *)UART1_DLH) |
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| 572 | #define pUART1_IIR ((volatile unsigned short *)UART1_IIR) |
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| 573 | #define pUART1_LCR ((volatile unsigned short *)UART1_LCR) |
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| 574 | #define pUART1_MCR ((volatile unsigned short *)UART1_MCR) |
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| 575 | #define pUART1_LSR ((volatile unsigned short *)UART1_LSR) |
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| 576 | #define pUART1_SCR ((volatile unsigned short *)UART1_SCR) |
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| 577 | #define pUART1_GCTL ((volatile unsigned short *)UART1_GCTL) |
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| 578 | |
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| 579 | |
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| 580 | /* Pin Control Registers (0xFFC03200 - 0xFFC032FF) */ |
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| 581 | #define pPORTF_FER ((volatile unsigned short *)PORTF_FER) |
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| 582 | #define pPORTG_FER ((volatile unsigned short *)PORTG_FER) |
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| 583 | #define pPORTH_FER ((volatile unsigned short *)PORTH_FER) |
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| 584 | |
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| 585 | |
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| 586 | /* Handshake MDMA Registers (0xFFC03300 - 0xFFC033FF) */ |
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| 587 | #define pHMDMA0_CONTROL ((volatile unsigned short *)HMDMA0_CONTROL) |
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| 588 | #define pHMDMA0_ECINIT ((volatile unsigned short *)HMDMA0_ECINIT) |
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| 589 | #define pHMDMA0_BCINIT ((volatile unsigned short *)HMDMA0_BCINIT) |
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| 590 | #define pHMDMA0_ECURGENT ((volatile unsigned short *)HMDMA0_ECURGENT) |
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| 591 | #define pHMDMA0_ECOVERFLOW ((volatile unsigned short *)HMDMA0_ECOVERFLOW) |
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| 592 | #define pHMDMA0_ECOUNT ((volatile unsigned short *)HMDMA0_ECOUNT) |
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| 593 | #define pHMDMA0_BCOUNT ((volatile unsigned short *)HMDMA0_BCOUNT) |
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| 594 | |
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| 595 | #define pHMDMA1_CONTROL ((volatile unsigned short *)HMDMA1_CONTROL) |
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| 596 | #define pHMDMA1_ECINIT ((volatile unsigned short *)HMDMA1_ECINIT) |
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| 597 | #define pHMDMA1_BCINIT ((volatile unsigned short *)HMDMA1_BCINIT) |
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| 598 | #define pHMDMA1_ECURGENT ((volatile unsigned short *)HMDMA1_ECURGENT) |
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| 599 | #define pHMDMA1_ECOVERFLOW ((volatile unsigned short *)HMDMA1_ECOVERFLOW) |
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| 600 | #define pHMDMA1_ECOUNT ((volatile unsigned short *)HMDMA1_ECOUNT) |
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| 601 | #define pHMDMA1_BCOUNT ((volatile unsigned short *)HMDMA1_BCOUNT) |
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| 602 | |
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| 603 | |
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| 604 | /* GPIO PIN mux (0xFFC03210 - OxFFC03288) */ |
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| 605 | #define pPORTF_MUX ((volatile unsigned short *)PORTF_MUX) |
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| 606 | #define pPORTG_MUX ((volatile unsigned short *)PORTG_MUX) |
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| 607 | #define pPORTH_MUX ((volatile unsigned short *)PORTH_MUX) |
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| 608 | #define pPORTF_DRIVE ((volatile unsigned short *)PORTF_DRIVE) |
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| 609 | #define pPORTG_DRIVE ((volatile unsigned short *)PORTG_DRIVE) |
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| 610 | #define pPORTH_DRIVE ((volatile unsigned short *)PORTH_DRIVE) |
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| 611 | #define pPORTF_HYSTERESIS ((volatile unsigned short *)PORTF_HYSTERESIS) |
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| 612 | #define pPORTG_HYSTERESIS ((volatile unsigned short *)PORTG_HYSTERESIS) |
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| 613 | #define pPORTH_HYSTERESIS ((volatile unsigned short *)PORTH_HYSTERESIS) |
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| 614 | #define pNONGPIO_DRIVE ((volatile unsigned short *)NONGPIO_DRIVE) |
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| 615 | #define pNONGPIO_HYSTERESIS ((volatile unsigned short *)NONGPIO_HYSTERESIS) |
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| 616 | |
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| 617 | |
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| 618 | /* SPI1 Controller (0xFFC03400 - 0xFFC034FF)*/ |
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| 619 | #define pSPI1_CTL ((volatile unsigned short *)SPI1_CTL) |
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| 620 | #define pSPI1_FLG ((volatile unsigned short *)SPI1_FLG) |
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| 621 | #define pSPI1_STAT ((volatile unsigned short *)SPI1_STAT) |
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| 622 | #define pSPI1_TDBR ((volatile unsigned short *)SPI1_TDBR) |
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| 623 | #define pSPI1_RDBR ((volatile unsigned short *)SPI1_RDBR) |
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| 624 | #define pSPI1_BAUD ((volatile unsigned short *)SPI1_BAUD) |
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| 625 | #define pSPI1_SHADOW ((volatile unsigned short *)SPI1_SHADOW) |
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| 626 | |
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| 627 | |
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| 628 | /* Counter Registers (0xFFC03500 - 0xFFC035FF)*/ |
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| 629 | #define pCNT_CONFIG ((volatile unsigned short *)CNT_CONFIG) |
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| 630 | #define pCNT_IMASK ((volatile unsigned short *)CNT_IMASK) |
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| 631 | #define pCNT_STATUS ((volatile unsigned short *)CNT_STATUS) |
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| 632 | #define pCNT_COMMAND ((volatile unsigned short *)CNT_COMMAND) |
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| 633 | #define pCNT_DEBOUNCE ((volatile unsigned short *)CNT_DEBOUNCE) |
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| 634 | #define pCNT_COUNTER ((volatile unsigned long *)CNT_COUNTER) |
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| 635 | #define pCNT_MAX ((volatile unsigned long *)CNT_MAX) |
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| 636 | #define pCNT_MIN ((volatile unsigned long *)CNT_MIN) |
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| 637 | |
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| 638 | |
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| 639 | /* OTP Registers (0xFFC03600 - 0xFFC036FF) */ |
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| 640 | /* Security Registers */ |
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| 641 | #define pSECURE_SYSSWT ((volatile unsigned long *)SECURE_SYSSWT) |
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| 642 | #define pSECURE_CONTROL ((volatile unsigned short *)SECURE_CONTROL) |
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| 643 | #define pSECURE_STATUS ((volatile unsigned short *)SECURE_STATUS) |
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| 644 | |
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| 645 | /* OTP Read/Write Data Buffer Registers */ |
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| 646 | #define pOTP_DATA0 ((volatile unsigned long *)OTP_DATA0) |
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| 647 | #define pOTP_DATA1 ((volatile unsigned long *)OTP_DATA1) |
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| 648 | #define pOTP_DATA2 ((volatile unsigned long *)OTP_DATA2) |
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| 649 | #define pOTP_DATA3 ((volatile unsigned long *)OTP_DATA3) |
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| 650 | |
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| 651 | |
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| 652 | /* PWM 3PHASE (0xFFC03700 - 0xFFC037FF)*/ |
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| 653 | #define pPWM_CTRL ((volatile unsigned short *)PWM_CTRL) |
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| 654 | #define pPWM_STAT ((volatile unsigned short *)PWM_STAT) |
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| 655 | #define pPWM_TM ((volatile unsigned short *)PWM_TM) |
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| 656 | #define pPWM_DT ((volatile unsigned short *)PWM_DT) |
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| 657 | #define pPWM_GATE ((volatile unsigned short *)PWM_GATE) |
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| 658 | #define pPWM_CHA ((volatile unsigned short *)PWM_CHA) |
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| 659 | #define pPWM_CHB ((volatile unsigned short *)PWM_CHB) |
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| 660 | #define pPWM_CHC ((volatile unsigned short *)PWM_CHC) |
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| 661 | #define pPWM_SEG ((volatile unsigned short *)PWM_SEG) |
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| 662 | #define pPWM_SYNCWT ((volatile unsigned short *)PWM_SYNCWT) |
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| 663 | #define pPWM_CHAL ((volatile unsigned short *)PWM_CHAL) |
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| 664 | #define pPWM_CHBL ((volatile unsigned short *)PWM_CHBL) |
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| 665 | #define pPWM_CHCL ((volatile unsigned short *)PWM_CHCL) |
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| 666 | #define pPWM_LSI ((volatile unsigned short *)PWM_LSI) |
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| 667 | #define pPWM_STAT2 ((volatile unsigned short *)PWM_STAT2) |
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| 668 | |
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| 669 | #ifdef _MISRA_RULES |
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| 670 | #pragma diag(pop) |
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| 671 | #endif /* _MISRA_RULES */ |
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| 672 | |
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| 673 | |
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| 674 | #endif /*_CDEF_BF51X_H*/ |
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