source: trunk/libs/newlib/src/libgloss/bfin/include/cdefBF535.h @ 643

Last change on this file since 643 was 444, checked in by satin@…, 6 years ago

add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc

File size: 24.9 KB
Line 
1/*
2 * The authors hereby grant permission to use, copy, modify, distribute,
3 * and license this software and its documentation for any purpose, provided
4 * that existing copyright notices are retained in all copies and that this
5 * notice is included verbatim in any distributions. No written agreement,
6 * license, or royalty fee is required for any of the authorized uses.
7 * Modifications to this software may be copyrighted by their authors
8 * and need not follow the licensing terms described here, provided that
9 * the new terms are clearly indicated on the first page of each file where
10 * they apply.
11 */
12
13/************************************************************************
14 *
15 * cdefBF535.h
16 *
17 * (c) Copyright 2002-2005 Analog Devices, Inc.  All rights reserved.
18 *
19 ************************************************************************/
20
21#ifndef _CDEF_BF535_H
22#define _CDEF_BF535_H
23
24/* include all Core registers and bit definitions */
25#if defined(__ADSPLPBLACKFIN__)
26#warning cdefBF535.h should only be included for 535 compatible chips.
27#endif
28#include <defBF535.h>
29
30/* include core specific register pointer definitions */
31#include <cdefblackfin.h>
32
33#ifdef _MISRA_RULES
34#pragma diag(push)
35#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
36#endif /* _MISRA_RULES */
37
38#ifndef _PTR_TO_VOL_VOID_PTR
39#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
40#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
41#else
42#define _PTR_TO_VOL_VOID_PTR (volatile void **)
43#endif
44#endif
45
46/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
47#define pPLL_CTL ((volatile unsigned long *)PLL_CTL)
48#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)
49#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)
50#define pSWRST ((volatile unsigned short *)SWRST)
51#define pSYSCR ((volatile unsigned short *)SYSCR)
52#define pPLL_IOCKR ((volatile unsigned short *)PLL_IOCKR)
53#define pPLL_IOCK ((volatile unsigned short *)PLL_IOCK)
54
55/* JTAG/Debug Communication Channel (0xFFC0 0800-0xFFC0 0BFF) */
56#define pCHIPID ((volatile unsigned long *)CHIPID)
57
58/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
59#define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0)
60#define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1)
61#define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2)
62#define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK)
63#define pSIC_ISR ((volatile unsigned long *)SIC_ISR)
64#define pSIC_IWR ((volatile unsigned long *)SIC_IWR)
65
66/* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */
67#define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL)
68#define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT)
69#define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT)
70
71/* Real Time Clock (0xFFC0 1400-0xFFC0 17FF) */
72#define pRTC_STAT ((volatile unsigned long *)RTC_STAT)
73#define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL)
74#define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT)
75#define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT)
76#define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM)
77#define pRTC_FAST ((volatile unsigned short *)RTC_FAST)
78
79/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
80#define pFIO_DIR ((volatile unsigned short *)FIO_DIR)
81#define pFIO_FLAG_C ((volatile unsigned short *)FIO_FLAG_C)
82#define pFIO_FLAG_S ((volatile unsigned short *)FIO_FLAG_S)
83#define pFIO_MASKA_C ((volatile unsigned short *)FIO_MASKA_C)
84#define pFIO_MASKA_S ((volatile unsigned short *)FIO_MASKA_S)
85#define pFIO_MASKB_C ((volatile unsigned short *)FIO_MASKB_C)
86#define pFIO_MASKB_S ((volatile unsigned short *)FIO_MASKB_S)
87#define pFIO_POLAR ((volatile unsigned short *)FIO_POLAR)
88#define pFIO_EDGE ((volatile unsigned short *)FIO_EDGE)
89#define pFIO_BOTH ((volatile unsigned short *)FIO_BOTH)
90
91/* Aysnchronous Memory Controller - External Bus Interface Unit (0xFFC0 3C00-0xFFC0 3FFF) */
92#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)
93#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)
94#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)
95
96/* USB Registers (0xFFC0 4400 - 0xFFC0 47FF) */
97#define pUSBD_ID ((volatile unsigned short *)USBD_ID)
98#define pUSBD_FRM ((volatile unsigned short *)USBD_FRM)
99#define pUSBD_FRMAT ((volatile unsigned short *)USBD_FRMAT)
100#define pUSBD_EPBUF ((volatile unsigned short *)USBD_EPBUF)
101#define pUSBD_STAT ((volatile unsigned short *)USBD_STAT)
102#define pUSBD_CTRL ((volatile unsigned short *)USBD_CTRL)
103#define pUSBD_GINTR ((volatile unsigned short *)USBD_GINTR)
104#define pUSBD_GMASK ((volatile unsigned short *)USBD_GMASK)
105#define pUSBD_DMACFG ((volatile unsigned short *)USBD_DMACFG)
106#define pUSBD_DMABL ((volatile unsigned short *)USBD_DMABL)
107#define pUSBD_DMABH ((volatile unsigned short *)USBD_DMABH)
108#define pUSBD_DMACT ((volatile unsigned short *)USBD_DMACT)
109#define pUSBD_DMAIRQ ((volatile unsigned short *)USBD_DMAIRQ)
110#define pUSBD_INTR0 ((volatile unsigned short *)USBD_INTR0)
111#define pUSBD_MASK0 ((volatile unsigned short *)USBD_MASK0)
112#define pUSBD_EPCFG0 ((volatile unsigned short *)USBD_EPCFG0)
113#define pUSBD_EPADR0 ((volatile unsigned short *)USBD_EPADR0)
114#define pUSBD_EPLEN0 ((volatile unsigned short *)USBD_EPLEN0)
115#define pUSBD_INTR1 ((volatile unsigned short *)USBD_INTR1)
116#define pUSBD_MASK1 ((volatile unsigned short *)USBD_MASK1)
117#define pUSBD_EPCFG1 ((volatile unsigned short *)USBD_EPCFG1)
118#define pUSBD_EPADR1 ((volatile unsigned short *)USBD_EPADR1)
119#define pUSBD_EPLEN1 ((volatile unsigned short *)USBD_EPLEN1)
120#define pUSBD_INTR2 ((volatile unsigned short *)USBD_INTR2)
121#define pUSBD_MASK2 ((volatile unsigned short *)USBD_MASK2)
122#define pUSBD_EPCFG2 ((volatile unsigned short *)USBD_EPCFG2)
123#define pUSBD_EPADR2 ((volatile unsigned short *)USBD_EPADR2)
124#define pUSBD_EPLEN2 ((volatile unsigned short *)USBD_EPLEN2)
125#define pUSBD_INTR3 ((volatile unsigned short *)USBD_INTR3)
126#define pUSBD_MASK3 ((volatile unsigned short *)USBD_MASK3)
127#define pUSBD_EPCFG3 ((volatile unsigned short *)USBD_EPCFG3)
128#define pUSBD_EPADR3 ((volatile unsigned short *)USBD_EPADR3)
129#define pUSBD_EPLEN3 ((volatile unsigned short *)USBD_EPLEN3)
130#define pUSBD_INTR4 ((volatile unsigned short *)USBD_INTR4)
131#define pUSBD_MASK4 ((volatile unsigned short *)USBD_MASK4)
132#define pUSBD_EPCFG4 ((volatile unsigned short *)USBD_EPCFG4)
133#define pUSBD_EPADR4 ((volatile unsigned short *)USBD_EPADR4)
134#define pUSBD_EPLEN4 ((volatile unsigned short *)USBD_EPLEN4)
135#define pUSBD_INTR5 ((volatile unsigned short *)USBD_INTR5)
136#define pUSBD_MASK5 ((volatile unsigned short *)USBD_MASK5)
137#define pUSBD_EPCFG5 ((volatile unsigned short *)USBD_EPCFG5)
138#define pUSBD_EPADR5 ((volatile unsigned short *)USBD_EPADR5)
139#define pUSBD_EPLEN5 ((volatile unsigned short *)USBD_EPLEN5)
140#define pUSBD_INTR6 ((volatile unsigned short *)USBD_INTR6)
141#define pUSBD_MASK6 ((volatile unsigned short *)USBD_MASK6)
142#define pUSBD_EPCFG6 ((volatile unsigned short *)USBD_EPCFG6)
143#define pUSBD_EPADR6 ((volatile unsigned short *)USBD_EPADR6)
144#define pUSBD_EPLEN6 ((volatile unsigned short *)USBD_EPLEN6)
145#define pUSBD_INTR7 ((volatile unsigned short *)USBD_INTR7)
146#define pUSBD_MASK7 ((volatile unsigned short *)USBD_MASK7)
147#define pUSBD_EPCFG7 ((volatile unsigned short *)USBD_EPCFG7)
148#define pUSBD_EPADR7 ((volatile unsigned short *)USBD_EPADR7)
149#define pUSBD_EPLEN7 ((volatile unsigned short *)USBD_EPLEN7)
150
151/* SDRAM Controller External Bus Interface Unit (0xFFC0 4C00-0xFFC0 4FFF) */
152#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)
153#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)
154#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)
155#define pEBIU_SDBCTL ((volatile unsigned long *)EBIU_SDBCTL)
156
157/* Memory Map */
158
159/* Core MMRs */
160#define pCOREMMR_BASE ((volatile void *)COREMMR_BASE)
161
162/* System MMRs */
163#define pSYSMMR_BASE ((volatile void *)SYSMMR_BASE)
164
165/* L1 cache/SRAM internal memory */
166#define pL1_DATA_A ((void *)L1_DATA_A)
167#define pL1_DATA_B ((void *)L1_DATA_B)
168#define pL1_CODE ((void *)L1_CODE)
169#define pL1_SCRATCH ((void *)L1_SCRATCH)
170
171/* L2 SRAM external memory */
172#define pL2_BASE ((void *)L2_BASE)
173
174/* PCI Spaces */
175#define pPCI_CONFIG_SPACE_PORT ((volatile void *)PCI_CONFIG_SPACE_PORT)
176#define pPCI_CONFIG_BASE ((volatile void *)PCI_CONFIG_BASE)
177#define pPCI_IO_BASE ((volatile void *)PCI_IO_BASE)
178#define pPCI_MEM_BASE ((volatile void *)PCI_MEM_BASE)
179
180/* Async Memory Banks */
181#define pASYNC_BANK3_BASE ((void *)ASYNC_BANK3_BASE)
182#define pASYNC_BANK2_BASE ((void *)ASYNC_BANK2_BASE)
183#define pASYNC_BANK1_BASE ((void *)ASYNC_BANK1_BASE)
184#define pASYNC_BANK0_BASE ((void *)ASYNC_BANK0_BASE)
185
186/* Sync DRAM Banks */
187#define pSDRAM_BANK3_BASE ((void *)SDRAM_BANK3_BASE)
188#define pSDRAM_BANK2_BASE ((void *)SDRAM_BANK2_BASE)
189#define pSDRAM_BANK1_BASE ((void *)SDRAM_BANK1_BASE)
190#define pSDRAM_BANK0_BASE ((void *)SDRAM_BANK0_BASE)
191
192/* UART 0 Controller (0xFFC0 1800-0xFFC0 1BFF) */
193#define pUART0_THR ((volatile unsigned short *)UART0_THR)
194#define pUART0_RBR ((volatile unsigned short *)UART0_RBR)
195#define pUART0_DLL ((volatile unsigned short *)UART0_DLL)
196#define pUART0_IER ((volatile unsigned short *)UART0_IER)
197#define pUART0_DLH ((volatile unsigned short *)UART0_DLH)
198#define pUART0_IIR ((volatile unsigned short *)UART0_IIR)
199#define pUART0_LCR ((volatile unsigned short *)UART0_LCR)
200#define pUART0_MCR ((volatile unsigned short *)UART0_MCR)
201#define pUART0_LSR ((volatile unsigned short *)UART0_LSR)
202#define pUART0_MSR ((volatile unsigned short *)UART0_MSR)
203#define pUART0_SCR ((volatile unsigned short *)UART0_SCR)
204#define pUART0_IRCR ((volatile unsigned short *)UART0_IRCR)
205#define pUART0_CURR_PTR_RX ((volatile unsigned short *)UART0_CURR_PTR_RX)
206#define pUART0_CONFIG_RX ((volatile unsigned short *)UART0_CONFIG_RX)
207#define pUART0_START_ADDR_HI_RX ((volatile unsigned short *)UART0_START_ADDR_HI_RX)
208#define pUART0_START_ADDR_LO_RX ((volatile unsigned short *)UART0_START_ADDR_LO_RX)
209#define pUART0_COUNT_RX ((volatile unsigned short *)UART0_COUNT_RX)
210#define pUART0_NEXT_DESCR_RX ((volatile unsigned short *)UART0_NEXT_DESCR_RX)
211#define pUART0_DESCR_RDY_RX ((volatile unsigned short *)UART0_DESCR_RDY_RX)
212#define pUART0_IRQSTAT_RX ((volatile unsigned short *)UART0_IRQSTAT_RX)
213#define pUART0_CURR_PTR_TX ((volatile unsigned short *)UART0_CURR_PTR_TX)
214#define pUART0_CONFIG_TX ((volatile unsigned short *)UART0_CONFIG_TX)
215#define pUART0_START_ADDR_HI_TX ((volatile unsigned short *)UART0_START_ADDR_HI_TX)
216#define pUART0_START_ADDR_LO_TX ((volatile unsigned short *)UART0_START_ADDR_LO_TX)
217#define pUART0_COUNT_TX ((volatile unsigned short *)UART0_COUNT_TX)
218#define pUART0_NEXT_DESCR_TX ((volatile unsigned short *)UART0_NEXT_DESCR_TX)
219#define pUART0_DESCR_RDY_TX ((volatile unsigned short *)UART0_DESCR_RDY_TX)
220#define pUART0_IRQSTAT_TX ((volatile unsigned short *)UART0_IRQSTAT_TX)
221
222/* UART 1 Controller (0xFFC0 1C00-0xFFC0 1FFF) */
223#define pUART1_THR ((volatile unsigned short *)UART1_THR)
224#define pUART1_RBR ((volatile unsigned short *)UART1_RBR)
225#define pUART1_DLL ((volatile unsigned short *)UART1_DLL)
226#define pUART1_IER ((volatile unsigned short *)UART1_IER)
227#define pUART1_DLH ((volatile unsigned short *)UART1_DLH)
228#define pUART1_IIR ((volatile unsigned short *)UART1_IIR)
229#define pUART1_LCR ((volatile unsigned short *)UART1_LCR)
230#define pUART1_MCR ((volatile unsigned short *)UART1_MCR)
231#define pUART1_LSR ((volatile unsigned short *)UART1_LSR)
232#define pUART1_MSR ((volatile unsigned short *)UART1_MSR)
233#define pUART1_SCR ((volatile unsigned short *)UART1_SCR)
234#define pUART1_CURR_PTR_RX ((volatile unsigned short *)UART1_CURR_PTR_RX)
235#define pUART1_CONFIG_RX ((volatile unsigned short *)UART1_CONFIG_RX)
236#define pUART1_START_ADDR_HI_RX ((volatile unsigned short *)UART1_START_ADDR_HI_RX)
237#define pUART1_START_ADDR_LO_RX ((volatile unsigned short *)UART1_START_ADDR_LO_RX)
238#define pUART1_COUNT_RX ((volatile unsigned short *)UART1_COUNT_RX)
239#define pUART1_NEXT_DESCR_RX ((volatile unsigned short *)UART1_NEXT_DESCR_RX)
240#define pUART1_DESCR_RDY_RX ((volatile unsigned short *)UART1_DESCR_RDY_RX)
241#define pUART1_IRQSTAT_RX ((volatile unsigned short *)UART1_IRQSTAT_RX)
242#define pUART1_CURR_PTR_TX ((volatile unsigned short *)UART1_CURR_PTR_TX)
243#define pUART1_CONFIG_TX ((volatile unsigned short *)UART1_CONFIG_TX)
244#define pUART1_START_ADDR_HI_TX ((volatile unsigned short *)UART1_START_ADDR_HI_TX)
245#define pUART1_START_ADDR_LO_TX ((volatile unsigned short *)UART1_START_ADDR_LO_TX)
246#define pUART1_COUNT_TX ((volatile unsigned short *)UART1_COUNT_TX)
247#define pUART1_NEXT_DESCR_TX ((volatile unsigned short *)UART1_NEXT_DESCR_TX)
248#define pUART1_DESCR_RDY_TX ((volatile unsigned short *)UART1_DESCR_RDY_TX)
249#define pUART1_IRQSTAT_TX ((volatile unsigned short *)UART1_IRQSTAT_TX)
250
251/* TIMER 0, 1, 2 Registers (0xFFC0 2000-0xFFC0 23FF) */
252#define pTIMER0_STATUS ((volatile unsigned short *)TIMER0_STATUS)
253#define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG)
254#define pTIMER0_COUNTER_LO ((volatile unsigned short *)TIMER0_COUNTER_LO)
255#define pTIMER0_COUNTER_HI ((volatile unsigned short *)TIMER0_COUNTER_HI)
256#define pTIMER0_PERIOD_LO ((volatile unsigned short *)TIMER0_PERIOD_LO)
257#define pTIMER0_PERIOD_HI ((volatile unsigned short *)TIMER0_PERIOD_HI)
258#define pTIMER0_WIDTH_LO ((volatile unsigned short *)TIMER0_WIDTH_LO)
259#define pTIMER0_WIDTH_HI ((volatile unsigned short *)TIMER0_WIDTH_HI)
260#define pTIMER1_STATUS ((volatile unsigned short *)TIMER1_STATUS)
261#define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG)
262#define pTIMER1_COUNTER_LO ((volatile unsigned short *)TIMER1_COUNTER_LO)
263#define pTIMER1_COUNTER_HI ((volatile unsigned short *)TIMER1_COUNTER_HI)
264#define pTIMER1_PERIOD_LO ((volatile unsigned short *)TIMER1_PERIOD_LO)
265#define pTIMER1_PERIOD_HI ((volatile unsigned short *)TIMER1_PERIOD_HI)
266#define pTIMER1_WIDTH_LO ((volatile unsigned short *)TIMER1_WIDTH_LO)
267#define pTIMER1_WIDTH_HI ((volatile unsigned short *)TIMER1_WIDTH_HI)
268#define pTIMER2_STATUS ((volatile unsigned short *)TIMER2_STATUS)
269#define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG)
270#define pTIMER2_COUNTER_LO ((volatile unsigned short *)TIMER2_COUNTER_LO)
271#define pTIMER2_COUNTER_HI ((volatile unsigned short *)TIMER2_COUNTER_HI)
272#define pTIMER2_PERIOD_LO ((volatile unsigned short *)TIMER2_PERIOD_LO)
273#define pTIMER2_PERIOD_HI ((volatile unsigned short *)TIMER2_PERIOD_HI)
274#define pTIMER2_WIDTH_LO ((volatile unsigned short *)TIMER2_WIDTH_LO)
275#define pTIMER2_WIDTH_HI ((volatile unsigned short *)TIMER2_WIDTH_HI)
276
277/* SPORT0 Controller (0xFFC0 2800-0xFFC0 2BFF) */
278#define pSPORT0_TX_CONFIG ((volatile unsigned short *)SPORT0_TX_CONFIG)
279#define pSPORT0_RX_CONFIG ((volatile unsigned short *)SPORT0_RX_CONFIG)
280#define pSPORT0_TX ((volatile short *)SPORT0_TX)
281#define pSPORT0_RX ((volatile short *)SPORT0_RX)
282#define pSPORT0_TSCLKDIV ((volatile unsigned short *)SPORT0_TSCLKDIV)
283#define pSPORT0_RSCLKDIV ((volatile unsigned short *)SPORT0_RSCLKDIV)
284#define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV)
285#define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV)
286#define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT)
287#define pSPORT0_MTCS0 ((volatile unsigned short *)SPORT0_MTCS0)
288#define pSPORT0_MTCS1 ((volatile unsigned short *)SPORT0_MTCS1)
289#define pSPORT0_MTCS2 ((volatile unsigned short *)SPORT0_MTCS2)
290#define pSPORT0_MTCS3 ((volatile unsigned short *)SPORT0_MTCS3)
291#define pSPORT0_MTCS4 ((volatile unsigned short *)SPORT0_MTCS4)
292#define pSPORT0_MTCS5 ((volatile unsigned short *)SPORT0_MTCS5)
293#define pSPORT0_MTCS6 ((volatile unsigned short *)SPORT0_MTCS6)
294#define pSPORT0_MTCS7 ((volatile unsigned short *)SPORT0_MTCS7)
295#define pSPORT0_MRCS0 ((volatile unsigned short *)SPORT0_MRCS0)
296#define pSPORT0_MRCS1 ((volatile unsigned short *)SPORT0_MRCS1)
297#define pSPORT0_MRCS2 ((volatile unsigned short *)SPORT0_MRCS2)
298#define pSPORT0_MRCS3 ((volatile unsigned short *)SPORT0_MRCS3)
299#define pSPORT0_MRCS4 ((volatile unsigned short *)SPORT0_MRCS4)
300#define pSPORT0_MRCS5 ((volatile unsigned short *)SPORT0_MRCS5)
301#define pSPORT0_MRCS6 ((volatile unsigned short *)SPORT0_MRCS6)
302#define pSPORT0_MRCS7 ((volatile unsigned short *)SPORT0_MRCS7)
303#define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1)
304#define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2)
305#define pSPORT0_CURR_PTR_RX ((volatile unsigned short *)SPORT0_CURR_PTR_RX)
306#define pSPORT0_CONFIG_DMA_RX ((volatile unsigned short *)SPORT0_CONFIG_DMA_RX)
307#define pSPORT0_START_ADDR_HI_RX ((volatile unsigned short *)SPORT0_START_ADDR_HI_RX)
308#define pSPORT0_START_ADDR_LO_RX ((volatile unsigned short *)SPORT0_START_ADDR_LO_RX)
309#define pSPORT0_COUNT_RX ((volatile unsigned short *)SPORT0_COUNT_RX)
310#define pSPORT0_NEXT_DESCR_RX ((volatile unsigned short *)SPORT0_NEXT_DESCR_RX)
311#define pSPORT0_DESCR_RDY_RX ((volatile unsigned short *)SPORT0_DESCR_RDY_RX)
312#define pSPORT0_IRQSTAT_RX ((volatile unsigned short *)SPORT0_IRQSTAT_RX)
313#define pSPORT0_CURR_PTR_TX ((volatile unsigned short *)SPORT0_CURR_PTR_TX)
314#define pSPORT0_CONFIG_DMA_TX ((volatile unsigned short *)SPORT0_CONFIG_DMA_TX)
315#define pSPORT0_START_ADDR_HI_TX ((volatile unsigned short *)SPORT0_START_ADDR_HI_TX)
316#define pSPORT0_START_ADDR_LO_TX ((volatile unsigned short *)SPORT0_START_ADDR_LO_TX)
317#define pSPORT0_COUNT_TX ((volatile unsigned short *)SPORT0_COUNT_TX)
318#define pSPORT0_NEXT_DESCR_TX ((volatile unsigned short *)SPORT0_NEXT_DESCR_TX)
319#define pSPORT0_DESCR_RDY_TX ((volatile unsigned short *)SPORT0_DESCR_RDY_TX)
320#define pSPORT0_IRQSTAT_TX ((volatile unsigned short *)SPORT0_IRQSTAT_TX)
321
322/* SPORT1 Controller (0xFFC0 2C00-0xFFC0 2FFF) */
323#define pSPORT1_TX_CONFIG ((volatile unsigned short *)SPORT1_TX_CONFIG)
324#define pSPORT1_RX_CONFIG ((volatile unsigned short *)SPORT1_RX_CONFIG)
325#define pSPORT1_TX ((volatile short *)SPORT1_TX)
326#define pSPORT1_RX ((volatile short *)SPORT1_RX)
327#define pSPORT1_TSCLKDIV ((volatile unsigned short *)SPORT1_TSCLKDIV)
328#define pSPORT1_RSCLKDIV ((volatile unsigned short *)SPORT1_RSCLKDIV)
329#define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV)
330#define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV)
331#define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT)
332#define pSPORT1_MTCS0 ((volatile unsigned short *)SPORT1_MTCS0)
333#define pSPORT1_MTCS1 ((volatile unsigned short *)SPORT1_MTCS1)
334#define pSPORT1_MTCS2 ((volatile unsigned short *)SPORT1_MTCS2)
335#define pSPORT1_MTCS3 ((volatile unsigned short *)SPORT1_MTCS3)
336#define pSPORT1_MTCS4 ((volatile unsigned short *)SPORT1_MTCS4)
337#define pSPORT1_MTCS5 ((volatile unsigned short *)SPORT1_MTCS5)
338#define pSPORT1_MTCS6 ((volatile unsigned short *)SPORT1_MTCS6)
339#define pSPORT1_MTCS7 ((volatile unsigned short *)SPORT1_MTCS7)
340#define pSPORT1_MRCS0 ((volatile unsigned short *)SPORT1_MRCS0)
341#define pSPORT1_MRCS1 ((volatile unsigned short *)SPORT1_MRCS1)
342#define pSPORT1_MRCS2 ((volatile unsigned short *)SPORT1_MRCS2)
343#define pSPORT1_MRCS3 ((volatile unsigned short *)SPORT1_MRCS3)
344#define pSPORT1_MRCS4 ((volatile unsigned short *)SPORT1_MRCS4)
345#define pSPORT1_MRCS5 ((volatile unsigned short *)SPORT1_MRCS5)
346#define pSPORT1_MRCS6 ((volatile unsigned short *)SPORT1_MRCS6)
347#define pSPORT1_MRCS7 ((volatile unsigned short *)SPORT1_MRCS7)
348#define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1)
349#define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2)
350#define pSPORT1_CURR_PTR_RX ((volatile unsigned short *)SPORT1_CURR_PTR_RX)
351#define pSPORT1_CONFIG_DMA_RX ((volatile unsigned short *)SPORT1_CONFIG_DMA_RX)
352#define pSPORT1_START_ADDR_HI_RX ((volatile unsigned short *)SPORT1_START_ADDR_HI_RX)
353#define pSPORT1_START_ADDR_LO_RX ((volatile unsigned short *)SPORT1_START_ADDR_LO_RX)
354#define pSPORT1_COUNT_RX ((volatile unsigned short *)SPORT1_COUNT_RX)
355#define pSPORT1_NEXT_DESCR_RX ((volatile unsigned short *)SPORT1_NEXT_DESCR_RX)
356#define pSPORT1_DESCR_RDY_RX ((volatile unsigned short *)SPORT1_DESCR_RDY_RX)
357#define pSPORT1_IRQSTAT_RX ((volatile unsigned short *)SPORT1_IRQSTAT_RX)
358#define pSPORT1_CURR_PTR_TX ((volatile unsigned short *)SPORT1_CURR_PTR_TX)
359#define pSPORT1_CONFIG_DMA_TX ((volatile unsigned short *)SPORT1_CONFIG_DMA_TX)
360#define pSPORT1_START_ADDR_HI_TX ((volatile unsigned short *)SPORT1_START_ADDR_HI_TX)
361#define pSPORT1_START_ADDR_LO_TX ((volatile unsigned short *)SPORT1_START_ADDR_LO_TX)
362#define pSPORT1_COUNT_TX ((volatile unsigned short *)SPORT1_COUNT_TX)
363#define pSPORT1_NEXT_DESCR_TX ((volatile unsigned short *)SPORT1_NEXT_DESCR_TX)
364#define pSPORT1_DESCR_RDY_TX ((volatile unsigned short *)SPORT1_DESCR_RDY_TX)
365#define pSPORT1_IRQSTAT_TX ((volatile unsigned short *)SPORT1_IRQSTAT_TX)
366
367/* SPI 0 Controller (0xFFC0 3000-0xFFC0 33FF) */
368#define pSPI0_CTL ((volatile unsigned short *)SPI0_CTL)
369#define pSPI0_FLG ((volatile unsigned short *)SPI0_FLG)
370#define pSPI0_ST ((volatile unsigned short *)SPI0_ST)
371#define pSPI0_TDBR ((volatile unsigned short *)SPI0_TDBR)
372#define pSPI0_RDBR ((volatile unsigned short *)SPI0_RDBR)
373#define pSPI0_BAUD ((volatile unsigned short *)SPI0_BAUD)
374#define pSPI0_SHADOW ((volatile unsigned short *)SPI0_SHADOW)
375#define pSPI0_CURR_PTR ((volatile unsigned short *)SPI0_CURR_PTR)
376#define pSPI0_CONFIG ((volatile unsigned short *)SPI0_CONFIG)
377#define pSPI0_START_ADDR_HI ((volatile unsigned short *)SPI0_START_ADDR_HI)
378#define pSPI0_START_ADDR_LO ((volatile unsigned short *)SPI0_START_ADDR_LO)
379#define pSPI0_COUNT ((volatile unsigned short *)SPI0_COUNT)
380#define pSPI0_NEXT_DESCR ((volatile unsigned short *)SPI0_NEXT_DESCR)
381#define pSPI0_DESCR_RDY ((volatile unsigned short *)SPI0_DESCR_RDY)
382#define pSPI0_DMA_INT ((volatile unsigned short *)SPI0_DMA_INT)
383
384/* SPI 1 Controller (0xFFC0 3400-0xFFC0 37FF) */
385#define pSPI1_CTL ((volatile unsigned short *)SPI1_CTL)
386#define pSPI1_FLG ((volatile unsigned short *)SPI1_FLG)
387#define pSPI1_ST ((volatile unsigned short *)SPI1_ST)
388#define pSPI1_TDBR ((volatile unsigned short *)SPI1_TDBR)
389#define pSPI1_RDBR ((volatile unsigned short *)SPI1_RDBR)
390#define pSPI1_BAUD ((volatile unsigned short *)SPI1_BAUD)
391#define pSPI1_SHADOW ((volatile unsigned short *)SPI1_SHADOW)
392#define pSPI1_CURR_PTR ((volatile unsigned short *)SPI1_CURR_PTR)
393#define pSPI1_CONFIG ((volatile unsigned short *)SPI1_CONFIG)
394#define pSPI1_START_ADDR_HI ((volatile unsigned short *)SPI1_START_ADDR_HI)
395#define pSPI1_START_ADDR_LO ((volatile unsigned short *)SPI1_START_ADDR_LO)
396#define pSPI1_COUNT ((volatile unsigned short *)SPI1_COUNT)
397#define pSPI1_NEXT_DESCR ((volatile unsigned short *)SPI1_NEXT_DESCR)
398#define pSPI1_DESCR_RDY ((volatile unsigned short *)SPI1_DESCR_RDY)
399#define pSPI1_DMA_INT ((volatile unsigned short *)SPI1_DMA_INT)
400
401/* Memory DMA Controller (0xFFC0 3800-0xFFC0 3BFF) */
402#define pMDD_DCP ((volatile unsigned short *)MDD_DCP)
403#define pMDD_DCFG ((volatile unsigned short *)MDD_DCFG)
404#define pMDD_DSAH ((volatile unsigned short *)MDD_DSAH)
405#define pMDD_DSAL ((volatile unsigned short *)MDD_DSAL)
406#define pMDD_DCT ((volatile unsigned short *)MDD_DCT)
407#define pMDD_DND ((volatile unsigned short *)MDD_DND)
408#define pMDD_DDR ((volatile unsigned short *)MDD_DDR)
409#define pMDD_DI ((volatile unsigned short *)MDD_DI)
410#define pMDS_DCP ((volatile unsigned short *)MDS_DCP)
411#define pMDS_DCFG ((volatile unsigned short *)MDS_DCFG)
412#define pMDS_DSAH ((volatile unsigned short *)MDS_DSAH)
413#define pMDS_DSAL ((volatile unsigned short *)MDS_DSAL)
414#define pMDS_DCT ((volatile unsigned short *)MDS_DCT)
415#define pMDS_DND ((volatile unsigned short *)MDS_DND)
416#define pMDS_DDR ((volatile unsigned short *)MDS_DDR)
417#define pMDS_DI ((volatile unsigned short *)MDS_DI)
418
419/* PCI Bridge PAB Registers (0xFFC0 4000-0xFFC0 43FF) */
420#define pPCI_CTL ((volatile unsigned short *)PCI_CTL)
421#define pPCI_STAT ((volatile unsigned long *)PCI_STAT)
422#define pPCI_ICTL ((volatile unsigned long *)PCI_ICTL)
423#define pPCI_MBAP (_PTR_TO_VOL_VOID_PTR PCI_MBAP)
424#define pPCI_IBAP (_PTR_TO_VOL_VOID_PTR PCI_IBAP)
425#define pPCI_CBAP (_PTR_TO_VOL_VOID_PTR PCI_CBAP)
426#define pPCI_TMBAP (_PTR_TO_VOL_VOID_PTR PCI_TMBAP)
427#define pPCI_TIBAP (_PTR_TO_VOL_VOID_PTR PCI_TIBAP)
428
429/* PCI Bridge External Access Bus Registers (0xEEFF FF00-0xEEFF FFFF) */
430#define pPCI_DMBARM ((volatile unsigned long *)PCI_DMBARM)
431#define pPCI_DIBARM ((volatile unsigned long *)PCI_DIBARM)
432#define pPCI_CFG_DIC ((volatile unsigned long *)PCI_CFG_DIC)
433#define pPCI_CFG_VIC ((volatile unsigned long *)PCI_CFG_VIC)
434#define pPCI_CFG_STAT ((volatile unsigned long *)PCI_CFG_STAT)
435#define pPCI_CFG_CMD ((volatile unsigned long *)PCI_CFG_CMD)
436#define pPCI_CFG_CC ((volatile unsigned long *)PCI_CFG_CC)
437#define pPCI_CFG_RID ((volatile unsigned long *)PCI_CFG_RID)
438#define pPCI_CFG_BIST ((volatile unsigned long *)PCI_CFG_BIST)
439#define pPCI_CFG_HT ((volatile unsigned long *)PCI_CFG_HT)
440#define pPCI_CFG_MLT ((volatile unsigned long *)PCI_CFG_MLT)
441#define pPCI_CFG_CLS ((volatile unsigned long *)PCI_CFG_CLS)
442#define pPCI_CFG_MBAR ((volatile unsigned long *)PCI_CFG_MBAR)
443#define pPCI_CFG_IBAR ((volatile unsigned long *)PCI_CFG_IBAR)
444#define pPCI_CFG_SID ((volatile unsigned long *)PCI_CFG_SID)
445#define pPCI_CFG_SVID ((volatile unsigned long *)PCI_CFG_SVID)
446#define pPCI_CFG_MAXL ((volatile unsigned long *)PCI_CFG_MAXL)
447#define pPCI_CFG_MING ((volatile unsigned long *)PCI_CFG_MING)
448#define pPCI_CFG_IP ((volatile unsigned long *)PCI_CFG_IP)
449#define pPCI_CFG_IL ((volatile unsigned long *)PCI_CFG_IL)
450#define pPCI_HMCTL ((volatile unsigned long *)PCI_HMCTL)
451
452/* System Bus Interface Unit (0xFFC0 4800-0xFFC0 4FFF) */
453#define pDMA_DBP ((volatile unsigned short *)DMA_DBP)
454#define pDB_ACOMP (_PTR_TO_VOL_VOID_PTR DB_ACOMP)
455#define pDB_CCOMP ((volatile unsigned long *)DB_CCOMP)
456
457#ifdef _MISRA_RULES
458#pragma diag(pop)
459#endif /* _MISRA_RULES */
460
461#endif /* _CDEF_BF535_H */
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