1 | /* |
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2 | * The authors hereby grant permission to use, copy, modify, distribute, |
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3 | * and license this software and its documentation for any purpose, provided |
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4 | * that existing copyright notices are retained in all copies and that this |
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5 | * notice is included verbatim in any distributions. No written agreement, |
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6 | * license, or royalty fee is required for any of the authorized uses. |
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7 | * Modifications to this software may be copyrighted by their authors |
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8 | * and need not follow the licensing terms described here, provided that |
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9 | * the new terms are clearly indicated on the first page of each file where |
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10 | * they apply. |
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11 | */ |
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12 | |
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13 | /* |
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14 | ** cdefBF547.h |
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15 | ** |
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16 | ** Copyright (C) 2007 Analog Devices Inc., All Rights Reserved. |
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17 | ** |
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18 | ************************************************************************************ |
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19 | ** |
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20 | ** This include file contains a list of macro "defines" to enable the programmer |
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21 | ** to use symbolic names for the ADSP-BF547 peripherals. |
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22 | ** |
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23 | ************************************************************************************ |
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24 | ** System MMR Register Map |
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25 | ************************************************************************************/ |
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26 | |
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27 | #ifndef _CDEF_BF547_H |
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28 | #define _CDEF_BF547_H |
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29 | |
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30 | /* include all Core registers and bit definitions */ |
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31 | #include <defBF547.h> |
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32 | |
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33 | /* include core specific register pointer definitions */ |
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34 | #include <cdef_LPBlackfin.h> |
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35 | |
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36 | /* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF547 */ |
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37 | |
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38 | /* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x processors */ |
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39 | #include <cdefBF54x_base.h> |
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40 | |
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41 | #ifdef _MISRA_RULES |
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42 | #pragma diag(push) |
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43 | #pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant") |
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44 | #endif /* _MISRA_RULES */ |
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45 | |
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46 | /* The following are the #defines needed by ADSP-BF547 that are not in the common header */ |
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47 | |
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48 | /* Timer Registers */ |
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49 | |
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50 | #define pTIMER8_CONFIG ((volatile unsigned short *)TIMER8_CONFIG) |
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51 | #define pTIMER8_COUNTER ((volatile unsigned long *)TIMER8_COUNTER) |
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52 | #define pTIMER8_PERIOD ((volatile unsigned long *)TIMER8_PERIOD) |
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53 | #define pTIMER8_WIDTH ((volatile unsigned long *)TIMER8_WIDTH) |
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54 | #define pTIMER9_CONFIG ((volatile unsigned short *)TIMER9_CONFIG) |
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55 | #define pTIMER9_COUNTER ((volatile unsigned long *)TIMER9_COUNTER) |
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56 | #define pTIMER9_PERIOD ((volatile unsigned long *)TIMER9_PERIOD) |
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57 | #define pTIMER9_WIDTH ((volatile unsigned long *)TIMER9_WIDTH) |
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58 | #define pTIMER10_CONFIG ((volatile unsigned short *)TIMER10_CONFIG) |
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59 | #define pTIMER10_COUNTER ((volatile unsigned long *)TIMER10_COUNTER) |
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60 | #define pTIMER10_PERIOD ((volatile unsigned long *)TIMER10_PERIOD) |
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61 | #define pTIMER10_WIDTH ((volatile unsigned long *)TIMER10_WIDTH) |
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62 | |
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63 | /* Timer Group of 3 */ |
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64 | |
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65 | #define pTIMER_ENABLE1 ((volatile unsigned short *)TIMER_ENABLE1) |
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66 | #define pTIMER_DISABLE1 ((volatile unsigned short *)TIMER_DISABLE1) |
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67 | #define pTIMER_STATUS1 ((volatile unsigned long *)TIMER_STATUS1) |
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68 | |
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69 | /* SPORT0 Registers */ |
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70 | |
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71 | #define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1) |
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72 | #define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2) |
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73 | #define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV) |
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74 | #define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV) |
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75 | #define pSPORT0_TX ((volatile unsigned long *)SPORT0_TX) |
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76 | #define pSPORT0_RX ((volatile unsigned long *)SPORT0_RX) |
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77 | #define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1) |
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78 | #define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2) |
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79 | #define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV) |
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80 | #define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV) |
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81 | #define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT) |
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82 | #define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL) |
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83 | #define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1) |
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84 | #define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2) |
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85 | #define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0) |
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86 | #define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1) |
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87 | #define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2) |
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88 | #define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3) |
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89 | #define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0) |
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90 | #define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1) |
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91 | #define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2) |
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92 | #define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3) |
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93 | |
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94 | /* EPPI0 Registers */ |
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95 | |
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96 | #define pEPPI0_STATUS ((volatile unsigned short *)EPPI0_STATUS) |
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97 | #define pEPPI0_HCOUNT ((volatile unsigned short *)EPPI0_HCOUNT) |
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98 | #define pEPPI0_HDELAY ((volatile unsigned short *)EPPI0_HDELAY) |
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99 | #define pEPPI0_VCOUNT ((volatile unsigned short *)EPPI0_VCOUNT) |
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100 | #define pEPPI0_VDELAY ((volatile unsigned short *)EPPI0_VDELAY) |
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101 | #define pEPPI0_FRAME ((volatile unsigned short *)EPPI0_FRAME) |
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102 | #define pEPPI0_LINE ((volatile unsigned short *)EPPI0_LINE) |
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103 | #define pEPPI0_CLKDIV ((volatile unsigned short *)EPPI0_CLKDIV) |
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104 | #define pEPPI0_CONTROL ((volatile unsigned long *)EPPI0_CONTROL) |
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105 | #define pEPPI0_FS1W_HBL ((volatile unsigned long *)EPPI0_FS1W_HBL) |
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106 | #define pEPPI0_FS1P_AVPL ((volatile unsigned long *)EPPI0_FS1P_AVPL) |
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107 | #define pEPPI0_FS2W_LVB ((volatile unsigned long *)EPPI0_FS2W_LVB) |
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108 | #define pEPPI0_FS2P_LAVF ((volatile unsigned long *)EPPI0_FS2P_LAVF) |
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109 | #define pEPPI0_CLIP ((volatile unsigned long *)EPPI0_CLIP) |
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110 | |
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111 | /* UART2 Registers */ |
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112 | |
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113 | #define pUART2_DLL ((volatile unsigned short *)UART2_DLL) |
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114 | #define pUART2_DLH ((volatile unsigned short *)UART2_DLH) |
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115 | #define pUART2_GCTL ((volatile unsigned short *)UART2_GCTL) |
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116 | #define pUART2_LCR ((volatile unsigned short *)UART2_LCR) |
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117 | #define pUART2_MCR ((volatile unsigned short *)UART2_MCR) |
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118 | #define pUART2_LSR ((volatile unsigned short *)UART2_LSR) |
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119 | #define pUART2_MSR ((volatile unsigned short *)UART2_MSR) |
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120 | #define pUART2_SCR ((volatile unsigned short *)UART2_SCR) |
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121 | #define pUART2_IER_SET ((volatile unsigned short *)UART2_IER_SET) |
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122 | #define pUART2_IER_CLEAR ((volatile unsigned short *)UART2_IER_CLEAR) |
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123 | #define pUART2_THR ((volatile unsigned short *)UART2_THR) |
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124 | #define pUART2_RBR ((volatile unsigned short *)UART2_RBR) |
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125 | |
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126 | /* Two Wire Interface Registers (TWI1) */ |
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127 | |
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128 | #define pTWI1_CLKDIV ((volatile unsigned short *)TWI1_CLKDIV) |
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129 | #define pTWI1_CONTROL ((volatile unsigned short *)TWI1_CONTROL) |
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130 | #define pTWI1_SLAVE_CTL ((volatile unsigned short *)TWI1_SLAVE_CTL) |
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131 | #define pTWI1_SLAVE_STAT ((volatile unsigned short *)TWI1_SLAVE_STAT) |
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132 | #define pTWI1_SLAVE_ADDR ((volatile unsigned short *)TWI1_SLAVE_ADDR) |
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133 | #define pTWI1_MASTER_CTL ((volatile unsigned short *)TWI1_MASTER_CTL) |
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134 | #define pTWI1_MASTER_STAT ((volatile unsigned short *)TWI1_MASTER_STAT) |
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135 | #define pTWI1_MASTER_ADDR ((volatile unsigned short *)TWI1_MASTER_ADDR) |
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136 | #define pTWI1_INT_STAT ((volatile unsigned short *)TWI1_INT_STAT) |
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137 | #define pTWI1_INT_MASK ((volatile unsigned short *)TWI1_INT_MASK) |
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138 | #define pTWI1_FIFO_CTL ((volatile unsigned short *)TWI1_FIFO_CTL) |
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139 | #define pTWI1_FIFO_STAT ((volatile unsigned short *)TWI1_FIFO_STAT) |
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140 | #define pTWI1_XMT_DATA8 ((volatile unsigned short *)TWI1_XMT_DATA8) |
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141 | #define pTWI1_XMT_DATA16 ((volatile unsigned short *)TWI1_XMT_DATA16) |
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142 | #define pTWI1_RCV_DATA8 ((volatile unsigned short *)TWI1_RCV_DATA8) |
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143 | #define pTWI1_RCV_DATA16 ((volatile unsigned short *)TWI1_RCV_DATA16) |
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144 | |
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145 | /* SPI2 Registers */ |
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146 | |
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147 | #define pSPI2_CTL ((volatile unsigned short *)SPI2_CTL) |
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148 | #define pSPI2_FLG ((volatile unsigned short *)SPI2_FLG) |
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149 | #define pSPI2_STAT ((volatile unsigned short *)SPI2_STAT) |
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150 | #define pSPI2_TDBR ((volatile unsigned short *)SPI2_TDBR) |
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151 | #define pSPI2_RDBR ((volatile unsigned short *)SPI2_RDBR) |
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152 | #define pSPI2_BAUD ((volatile unsigned short *)SPI2_BAUD) |
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153 | #define pSPI2_SHADOW ((volatile unsigned short *)SPI2_SHADOW) |
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154 | |
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155 | /* ATAPI Registers */ |
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156 | |
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157 | #define pATAPI_CONTROL ((volatile unsigned short *)ATAPI_CONTROL) |
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158 | #define pATAPI_STATUS ((volatile unsigned short *)ATAPI_STATUS) |
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159 | #define pATAPI_DEV_ADDR ((volatile unsigned short *)ATAPI_DEV_ADDR) |
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160 | #define pATAPI_DEV_TXBUF ((volatile unsigned short *)ATAPI_DEV_TXBUF) |
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161 | #define pATAPI_DEV_RXBUF ((volatile unsigned short *)ATAPI_DEV_RXBUF) |
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162 | #define pATAPI_INT_MASK ((volatile unsigned short *)ATAPI_INT_MASK) |
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163 | #define pATAPI_INT_STATUS ((volatile unsigned short *)ATAPI_INT_STATUS) |
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164 | #define pATAPI_XFER_LEN ((volatile unsigned short *)ATAPI_XFER_LEN) |
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165 | #define pATAPI_LINE_STATUS ((volatile unsigned short *)ATAPI_LINE_STATUS) |
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166 | #define pATAPI_SM_STATE ((volatile unsigned short *)ATAPI_SM_STATE) |
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167 | #define pATAPI_TERMINATE ((volatile unsigned short *)ATAPI_TERMINATE) |
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168 | #define pATAPI_PIO_TFRCNT ((volatile unsigned short *)ATAPI_PIO_TFRCNT) |
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169 | #define pATAPI_DMA_TFRCNT ((volatile unsigned short *)ATAPI_DMA_TFRCNT) |
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170 | #define pATAPI_UMAIN_TFRCNT ((volatile unsigned short *)ATAPI_UMAIN_TFRCNT) |
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171 | #define pATAPI_UDMAOUT_TFRCNT ((volatile unsigned short *)ATAPI_UDMAOUT_TFRCNT) |
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172 | #define pATAPI_REG_TIM_0 ((volatile unsigned short *)ATAPI_REG_TIM_0) |
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173 | #define pATAPI_PIO_TIM_0 ((volatile unsigned short *)ATAPI_PIO_TIM_0) |
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174 | #define pATAPI_PIO_TIM_1 ((volatile unsigned short *)ATAPI_PIO_TIM_1) |
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175 | #define pATAPI_MULTI_TIM_0 ((volatile unsigned short *)ATAPI_MULTI_TIM_0) |
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176 | #define pATAPI_MULTI_TIM_1 ((volatile unsigned short *)ATAPI_MULTI_TIM_1) |
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177 | #define pATAPI_MULTI_TIM_2 ((volatile unsigned short *)ATAPI_MULTI_TIM_2) |
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178 | #define pATAPI_ULTRA_TIM_0 ((volatile unsigned short *)ATAPI_ULTRA_TIM_0) |
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179 | #define pATAPI_ULTRA_TIM_1 ((volatile unsigned short *)ATAPI_ULTRA_TIM_1) |
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180 | #define pATAPI_ULTRA_TIM_2 ((volatile unsigned short *)ATAPI_ULTRA_TIM_2) |
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181 | #define pATAPI_ULTRA_TIM_3 ((volatile unsigned short *)ATAPI_ULTRA_TIM_3) |
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182 | |
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183 | /* SDH Registers */ |
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184 | |
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185 | #define pSDH_PWR_CTL ((volatile unsigned short *)SDH_PWR_CTL) |
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186 | #define pSDH_CLK_CTL ((volatile unsigned short *)SDH_CLK_CTL) |
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187 | #define pSDH_ARGUMENT ((volatile unsigned long *)SDH_ARGUMENT) |
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188 | #define pSDH_COMMAND ((volatile unsigned short *)SDH_COMMAND) |
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189 | #define pSDH_RESP_CMD ((volatile unsigned short *)SDH_RESP_CMD) |
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190 | #define pSDH_RESPONSE0 ((volatile unsigned long *)SDH_RESPONSE0) |
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191 | #define pSDH_RESPONSE1 ((volatile unsigned long *)SDH_RESPONSE1) |
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192 | #define pSDH_RESPONSE2 ((volatile unsigned long *)SDH_RESPONSE2) |
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193 | #define pSDH_RESPONSE3 ((volatile unsigned long *)SDH_RESPONSE3) |
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194 | #define pSDH_DATA_TIMER ((volatile unsigned long *)SDH_DATA_TIMER) |
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195 | #define pSDH_DATA_LGTH ((volatile unsigned short *)SDH_DATA_LGTH) |
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196 | #define pSDH_DATA_CTL ((volatile unsigned short *)SDH_DATA_CTL) |
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197 | #define pSDH_DATA_CNT ((volatile unsigned short *)SDH_DATA_CNT) |
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198 | #define pSDH_STATUS ((volatile unsigned long *)SDH_STATUS) |
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199 | #define pSDH_STATUS_CLR ((volatile unsigned short *)SDH_STATUS_CLR) |
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200 | #define pSDH_MASK0 ((volatile unsigned long *)SDH_MASK0) |
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201 | #define pSDH_MASK1 ((volatile unsigned long *)SDH_MASK1) |
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202 | #define pSDH_FIFO_CNT ((volatile unsigned short *)SDH_FIFO_CNT) |
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203 | #define pSDH_FIFO ((volatile unsigned long *)SDH_FIFO) |
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204 | #define pSDH_E_STATUS ((volatile unsigned short *)SDH_E_STATUS) |
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205 | #define pSDH_E_MASK ((volatile unsigned short *)SDH_E_MASK) |
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206 | #define pSDH_CFG ((volatile unsigned short *)SDH_CFG) |
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207 | #define pSDH_RD_WAIT_EN ((volatile unsigned short *)SDH_RD_WAIT_EN) |
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208 | #define pSDH_PID0 ((volatile unsigned short *)SDH_PID0) |
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209 | #define pSDH_PID1 ((volatile unsigned short *)SDH_PID1) |
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210 | #define pSDH_PID2 ((volatile unsigned short *)SDH_PID2) |
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211 | #define pSDH_PID3 ((volatile unsigned short *)SDH_PID3) |
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212 | #define pSDH_PID4 ((volatile unsigned short *)SDH_PID4) |
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213 | #define pSDH_PID5 ((volatile unsigned short *)SDH_PID5) |
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214 | #define pSDH_PID6 ((volatile unsigned short *)SDH_PID6) |
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215 | #define pSDH_PID7 ((volatile unsigned short *)SDH_PID7) |
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216 | |
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217 | /* HOST Port Registers */ |
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218 | |
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219 | #define pHOST_CONTROL ((volatile unsigned short *)HOST_CONTROL) |
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220 | #define pHOST_STATUS ((volatile unsigned short *)HOST_STATUS) |
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221 | #define pHOST_TIMEOUT ((volatile unsigned short *)HOST_TIMEOUT) |
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222 | |
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223 | /* USB Control Registers */ |
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224 | |
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225 | #define pUSB_FADDR ((volatile unsigned short *)USB_FADDR) |
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226 | #define pUSB_POWER ((volatile unsigned short *)USB_POWER) |
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227 | #define pUSB_INTRTX ((volatile unsigned short *)USB_INTRTX) |
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228 | #define pUSB_INTRRX ((volatile unsigned short *)USB_INTRRX) |
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229 | #define pUSB_INTRTXE ((volatile unsigned short *)USB_INTRTXE) |
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230 | #define pUSB_INTRRXE ((volatile unsigned short *)USB_INTRRXE) |
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231 | #define pUSB_INTRUSB ((volatile unsigned short *)USB_INTRUSB) |
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232 | #define pUSB_INTRUSBE ((volatile unsigned short *)USB_INTRUSBE) |
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233 | #define pUSB_FRAME ((volatile unsigned short *)USB_FRAME) |
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234 | #define pUSB_INDEX ((volatile unsigned short *)USB_INDEX) |
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235 | #define pUSB_TESTMODE ((volatile unsigned short *)USB_TESTMODE) |
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236 | #define pUSB_GLOBINTR ((volatile unsigned short *)USB_GLOBINTR) |
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237 | #define pUSB_GLOBAL_CTL ((volatile unsigned short *)USB_GLOBAL_CTL) |
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238 | |
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239 | /* USB Packet Control Registers */ |
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240 | |
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241 | #define pUSB_TX_MAX_PACKET ((volatile unsigned short *)USB_TX_MAX_PACKET) |
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242 | #define pUSB_CSR0 ((volatile unsigned short *)USB_CSR0) |
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243 | #define pUSB_TXCSR ((volatile unsigned short *)USB_TXCSR) |
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244 | #define pUSB_RX_MAX_PACKET ((volatile unsigned short *)USB_RX_MAX_PACKET) |
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245 | #define pUSB_RXCSR ((volatile unsigned short *)USB_RXCSR) |
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246 | #define pUSB_COUNT0 ((volatile unsigned short *)USB_COUNT0) |
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247 | #define pUSB_RXCOUNT ((volatile unsigned short *)USB_RXCOUNT) |
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248 | #define pUSB_TXTYPE ((volatile unsigned short *)USB_TXTYPE) |
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249 | #define pUSB_NAKLIMIT0 ((volatile unsigned short *)USB_NAKLIMIT0) |
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250 | #define pUSB_TXINTERVAL ((volatile unsigned short *)USB_TXINTERVAL) |
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251 | #define pUSB_RXTYPE ((volatile unsigned short *)USB_RXTYPE) |
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252 | #define pUSB_RXINTERVAL ((volatile unsigned short *)USB_RXINTERVAL) |
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253 | #define pUSB_TXCOUNT ((volatile unsigned short *)USB_TXCOUNT) |
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254 | |
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255 | /* USB Endpoint FIFO Registers */ |
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256 | |
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257 | #define pUSB_EP0_FIFO ((volatile unsigned short *)USB_EP0_FIFO) |
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258 | #define pUSB_EP1_FIFO ((volatile unsigned short *)USB_EP1_FIFO) |
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259 | #define pUSB_EP2_FIFO ((volatile unsigned short *)USB_EP2_FIFO) |
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260 | #define pUSB_EP3_FIFO ((volatile unsigned short *)USB_EP3_FIFO) |
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261 | #define pUSB_EP4_FIFO ((volatile unsigned short *)USB_EP4_FIFO) |
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262 | #define pUSB_EP5_FIFO ((volatile unsigned short *)USB_EP5_FIFO) |
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263 | #define pUSB_EP6_FIFO ((volatile unsigned short *)USB_EP6_FIFO) |
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264 | #define pUSB_EP7_FIFO ((volatile unsigned short *)USB_EP7_FIFO) |
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265 | |
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266 | /* USB OTG Control Registers */ |
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267 | |
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268 | #define pUSB_OTG_DEV_CTL ((volatile unsigned short *)USB_OTG_DEV_CTL) |
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269 | #define pUSB_OTG_VBUS_IRQ ((volatile unsigned short *)USB_OTG_VBUS_IRQ) |
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270 | #define pUSB_OTG_VBUS_MASK ((volatile unsigned short *)USB_OTG_VBUS_MASK) |
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271 | |
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272 | /* USB Phy Control Registers */ |
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273 | |
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274 | #define pUSB_LINKINFO ((volatile unsigned short *)USB_LINKINFO) |
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275 | #define pUSB_VPLEN ((volatile unsigned short *)USB_VPLEN) |
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276 | #define pUSB_HS_EOF1 ((volatile unsigned short *)USB_HS_EOF1) |
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277 | #define pUSB_FS_EOF1 ((volatile unsigned short *)USB_FS_EOF1) |
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278 | #define pUSB_LS_EOF1 ((volatile unsigned short *)USB_LS_EOF1) |
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279 | |
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280 | /* (APHY_CNTRL is for ADI usage only) */ |
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281 | |
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282 | #define pUSB_APHY_CNTRL ((volatile unsigned short *)USB_APHY_CNTRL) |
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283 | |
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284 | /* (APHY_CALIB is for ADI usage only) */ |
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285 | |
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286 | #define pUSB_APHY_CALIB ((volatile unsigned short *)USB_APHY_CALIB) |
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287 | #define pUSB_APHY_CNTRL2 ((volatile unsigned short *)USB_APHY_CNTRL2) |
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288 | |
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289 | /* (PHY_TEST is for ADI usage only) */ |
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290 | |
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291 | #define pUSB_PHY_TEST ((volatile unsigned short *)USB_PHY_TEST) |
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292 | #define pUSB_PLLOSC_CTRL ((volatile unsigned short *)USB_PLLOSC_CTRL) |
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293 | #define pUSB_SRP_CLKDIV ((volatile unsigned short *)USB_SRP_CLKDIV) |
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294 | |
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295 | /* USB Endpoint 0 Control Registers */ |
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296 | |
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297 | #define pUSB_EP_NI0_TXMAXP ((volatile unsigned short *)USB_EP_NI0_TXMAXP) |
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298 | #define pUSB_EP_NI0_TXCSR ((volatile unsigned short *)USB_EP_NI0_TXCSR) |
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299 | #define pUSB_EP_NI0_RXMAXP ((volatile unsigned short *)USB_EP_NI0_RXMAXP) |
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300 | #define pUSB_EP_NI0_RXCSR ((volatile unsigned short *)USB_EP_NI0_RXCSR) |
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301 | #define pUSB_EP_NI0_RXCOUNT ((volatile unsigned short *)USB_EP_NI0_RXCOUNT) |
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302 | #define pUSB_EP_NI0_TXTYPE ((volatile unsigned short *)USB_EP_NI0_TXTYPE) |
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303 | #define pUSB_EP_NI0_TXINTERVAL ((volatile unsigned short *)USB_EP_NI0_TXINTERVAL) |
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304 | #define pUSB_EP_NI0_RXTYPE ((volatile unsigned short *)USB_EP_NI0_RXTYPE) |
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305 | #define pUSB_EP_NI0_RXINTERVAL ((volatile unsigned short *)USB_EP_NI0_RXINTERVAL) |
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306 | |
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307 | /* USB Endpoint 1 Control Registers */ |
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308 | |
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309 | #define pUSB_EP_NI0_TXCOUNT ((volatile unsigned short *)USB_EP_NI0_TXCOUNT) |
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310 | #define pUSB_EP_NI1_TXMAXP ((volatile unsigned short *)USB_EP_NI1_TXMAXP) |
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311 | #define pUSB_EP_NI1_TXCSR ((volatile unsigned short *)USB_EP_NI1_TXCSR) |
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312 | #define pUSB_EP_NI1_RXMAXP ((volatile unsigned short *)USB_EP_NI1_RXMAXP) |
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313 | #define pUSB_EP_NI1_RXCSR ((volatile unsigned short *)USB_EP_NI1_RXCSR) |
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314 | #define pUSB_EP_NI1_RXCOUNT ((volatile unsigned short *)USB_EP_NI1_RXCOUNT) |
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315 | #define pUSB_EP_NI1_TXTYPE ((volatile unsigned short *)USB_EP_NI1_TXTYPE) |
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316 | #define pUSB_EP_NI1_TXINTERVAL ((volatile unsigned short *)USB_EP_NI1_TXINTERVAL) |
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317 | #define pUSB_EP_NI1_RXTYPE ((volatile unsigned short *)USB_EP_NI1_RXTYPE) |
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318 | #define pUSB_EP_NI1_RXINTERVAL ((volatile unsigned short *)USB_EP_NI1_RXINTERVAL) |
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319 | |
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320 | /* USB Endpoint 2 Control Registers */ |
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321 | |
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322 | #define pUSB_EP_NI1_TXCOUNT ((volatile unsigned short *)USB_EP_NI1_TXCOUNT) |
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323 | #define pUSB_EP_NI2_TXMAXP ((volatile unsigned short *)USB_EP_NI2_TXMAXP) |
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324 | #define pUSB_EP_NI2_TXCSR ((volatile unsigned short *)USB_EP_NI2_TXCSR) |
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325 | #define pUSB_EP_NI2_RXMAXP ((volatile unsigned short *)USB_EP_NI2_RXMAXP) |
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326 | #define pUSB_EP_NI2_RXCSR ((volatile unsigned short *)USB_EP_NI2_RXCSR) |
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327 | #define pUSB_EP_NI2_RXCOUNT ((volatile unsigned short *)USB_EP_NI2_RXCOUNT) |
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328 | #define pUSB_EP_NI2_TXTYPE ((volatile unsigned short *)USB_EP_NI2_TXTYPE) |
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329 | #define pUSB_EP_NI2_TXINTERVAL ((volatile unsigned short *)USB_EP_NI2_TXINTERVAL) |
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330 | #define pUSB_EP_NI2_RXTYPE ((volatile unsigned short *)USB_EP_NI2_RXTYPE) |
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331 | #define pUSB_EP_NI2_RXINTERVAL ((volatile unsigned short *)USB_EP_NI2_RXINTERVAL) |
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332 | |
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333 | /* USB Endpoint 3 Control Registers */ |
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334 | |
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335 | #define pUSB_EP_NI2_TXCOUNT ((volatile unsigned short *)USB_EP_NI2_TXCOUNT) |
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336 | #define pUSB_EP_NI3_TXMAXP ((volatile unsigned short *)USB_EP_NI3_TXMAXP) |
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337 | #define pUSB_EP_NI3_TXCSR ((volatile unsigned short *)USB_EP_NI3_TXCSR) |
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338 | #define pUSB_EP_NI3_RXMAXP ((volatile unsigned short *)USB_EP_NI3_RXMAXP) |
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339 | #define pUSB_EP_NI3_RXCSR ((volatile unsigned short *)USB_EP_NI3_RXCSR) |
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340 | #define pUSB_EP_NI3_RXCOUNT ((volatile unsigned short *)USB_EP_NI3_RXCOUNT) |
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341 | #define pUSB_EP_NI3_TXTYPE ((volatile unsigned short *)USB_EP_NI3_TXTYPE) |
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342 | #define pUSB_EP_NI3_TXINTERVAL ((volatile unsigned short *)USB_EP_NI3_TXINTERVAL) |
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343 | #define pUSB_EP_NI3_RXTYPE ((volatile unsigned short *)USB_EP_NI3_RXTYPE) |
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344 | #define pUSB_EP_NI3_RXINTERVAL ((volatile unsigned short *)USB_EP_NI3_RXINTERVAL) |
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345 | |
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346 | /* USB Endpoint 4 Control Registers */ |
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347 | |
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348 | #define pUSB_EP_NI3_TXCOUNT ((volatile unsigned short *)USB_EP_NI3_TXCOUNT) |
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349 | #define pUSB_EP_NI4_TXMAXP ((volatile unsigned short *)USB_EP_NI4_TXMAXP) |
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350 | #define pUSB_EP_NI4_TXCSR ((volatile unsigned short *)USB_EP_NI4_TXCSR) |
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351 | #define pUSB_EP_NI4_RXMAXP ((volatile unsigned short *)USB_EP_NI4_RXMAXP) |
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352 | #define pUSB_EP_NI4_RXCSR ((volatile unsigned short *)USB_EP_NI4_RXCSR) |
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353 | #define pUSB_EP_NI4_RXCOUNT ((volatile unsigned short *)USB_EP_NI4_RXCOUNT) |
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354 | #define pUSB_EP_NI4_TXTYPE ((volatile unsigned short *)USB_EP_NI4_TXTYPE) |
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355 | #define pUSB_EP_NI4_TXINTERVAL ((volatile unsigned short *)USB_EP_NI4_TXINTERVAL) |
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356 | #define pUSB_EP_NI4_RXTYPE ((volatile unsigned short *)USB_EP_NI4_RXTYPE) |
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357 | #define pUSB_EP_NI4_RXINTERVAL ((volatile unsigned short *)USB_EP_NI4_RXINTERVAL) |
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358 | |
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359 | /* USB Endpoint 5 Control Registers */ |
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360 | |
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361 | #define pUSB_EP_NI4_TXCOUNT ((volatile unsigned short *)USB_EP_NI4_TXCOUNT) |
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362 | #define pUSB_EP_NI5_TXMAXP ((volatile unsigned short *)USB_EP_NI5_TXMAXP) |
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363 | #define pUSB_EP_NI5_TXCSR ((volatile unsigned short *)USB_EP_NI5_TXCSR) |
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364 | #define pUSB_EP_NI5_RXMAXP ((volatile unsigned short *)USB_EP_NI5_RXMAXP) |
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365 | #define pUSB_EP_NI5_RXCSR ((volatile unsigned short *)USB_EP_NI5_RXCSR) |
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366 | #define pUSB_EP_NI5_RXCOUNT ((volatile unsigned short *)USB_EP_NI5_RXCOUNT) |
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367 | #define pUSB_EP_NI5_TXTYPE ((volatile unsigned short *)USB_EP_NI5_TXTYPE) |
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368 | #define pUSB_EP_NI5_TXINTERVAL ((volatile unsigned short *)USB_EP_NI5_TXINTERVAL) |
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369 | #define pUSB_EP_NI5_RXTYPE ((volatile unsigned short *)USB_EP_NI5_RXTYPE) |
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370 | #define pUSB_EP_NI5_RXINTERVAL ((volatile unsigned short *)USB_EP_NI5_RXINTERVAL) |
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371 | |
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372 | /* USB Endpoint 6 Control Registers */ |
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373 | |
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374 | #define pUSB_EP_NI5_TXCOUNT ((volatile unsigned short *)USB_EP_NI5_TXCOUNT) |
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375 | #define pUSB_EP_NI6_TXMAXP ((volatile unsigned short *)USB_EP_NI6_TXMAXP) |
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376 | #define pUSB_EP_NI6_TXCSR ((volatile unsigned short *)USB_EP_NI6_TXCSR) |
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377 | #define pUSB_EP_NI6_RXMAXP ((volatile unsigned short *)USB_EP_NI6_RXMAXP) |
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378 | #define pUSB_EP_NI6_RXCSR ((volatile unsigned short *)USB_EP_NI6_RXCSR) |
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379 | #define pUSB_EP_NI6_RXCOUNT ((volatile unsigned short *)USB_EP_NI6_RXCOUNT) |
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380 | #define pUSB_EP_NI6_TXTYPE ((volatile unsigned short *)USB_EP_NI6_TXTYPE) |
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381 | #define pUSB_EP_NI6_TXINTERVAL ((volatile unsigned short *)USB_EP_NI6_TXINTERVAL) |
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382 | #define pUSB_EP_NI6_RXTYPE ((volatile unsigned short *)USB_EP_NI6_RXTYPE) |
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383 | #define pUSB_EP_NI6_RXINTERVAL ((volatile unsigned short *)USB_EP_NI6_RXINTERVAL) |
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384 | |
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385 | /* USB Endpoint 7 Control Registers */ |
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386 | |
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387 | #define pUSB_EP_NI6_TXCOUNT ((volatile unsigned short *)USB_EP_NI6_TXCOUNT) |
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388 | #define pUSB_EP_NI7_TXMAXP ((volatile unsigned short *)USB_EP_NI7_TXMAXP) |
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389 | #define pUSB_EP_NI7_TXCSR ((volatile unsigned short *)USB_EP_NI7_TXCSR) |
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390 | #define pUSB_EP_NI7_RXMAXP ((volatile unsigned short *)USB_EP_NI7_RXMAXP) |
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391 | #define pUSB_EP_NI7_RXCSR ((volatile unsigned short *)USB_EP_NI7_RXCSR) |
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392 | #define pUSB_EP_NI7_RXCOUNT ((volatile unsigned short *)USB_EP_NI7_RXCOUNT) |
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393 | #define pUSB_EP_NI7_TXTYPE ((volatile unsigned short *)USB_EP_NI7_TXTYPE) |
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394 | #define pUSB_EP_NI7_TXINTERVAL ((volatile unsigned short *)USB_EP_NI7_TXINTERVAL) |
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395 | #define pUSB_EP_NI7_RXTYPE ((volatile unsigned short *)USB_EP_NI7_RXTYPE) |
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396 | #define pUSB_EP_NI7_RXINTERVAL ((volatile unsigned short *)USB_EP_NI7_RXINTERVAL) |
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397 | #define pUSB_EP_NI7_TXCOUNT ((volatile unsigned short *)USB_EP_NI7_TXCOUNT) |
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398 | #define pUSB_DMA_INTERRUPT ((volatile unsigned short *)USB_DMA_INTERRUPT) |
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399 | |
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400 | /* USB Channel 0 Config Registers */ |
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401 | |
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402 | #define pUSB_DMA0CONTROL ((volatile unsigned short *)USB_DMA0CONTROL) |
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403 | #define pUSB_DMA0ADDRLOW ((volatile unsigned short *)USB_DMA0ADDRLOW) |
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404 | #define pUSB_DMA0ADDRHIGH ((volatile unsigned short *)USB_DMA0ADDRHIGH) |
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405 | #define pUSB_DMA0COUNTLOW ((volatile unsigned short *)USB_DMA0COUNTLOW) |
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406 | #define pUSB_DMA0COUNTHIGH ((volatile unsigned short *)USB_DMA0COUNTHIGH) |
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407 | |
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408 | /* USB Channel 1 Config Registers */ |
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409 | |
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410 | #define pUSB_DMA1CONTROL ((volatile unsigned short *)USB_DMA1CONTROL) |
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411 | #define pUSB_DMA1ADDRLOW ((volatile unsigned short *)USB_DMA1ADDRLOW) |
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412 | #define pUSB_DMA1ADDRHIGH ((volatile unsigned short *)USB_DMA1ADDRHIGH) |
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413 | #define pUSB_DMA1COUNTLOW ((volatile unsigned short *)USB_DMA1COUNTLOW) |
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414 | #define pUSB_DMA1COUNTHIGH ((volatile unsigned short *)USB_DMA1COUNTHIGH) |
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415 | |
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416 | /* USB Channel 2 Config Registers */ |
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417 | |
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418 | #define pUSB_DMA2CONTROL ((volatile unsigned short *)USB_DMA2CONTROL) |
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419 | #define pUSB_DMA2ADDRLOW ((volatile unsigned short *)USB_DMA2ADDRLOW) |
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420 | #define pUSB_DMA2ADDRHIGH ((volatile unsigned short *)USB_DMA2ADDRHIGH) |
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421 | #define pUSB_DMA2COUNTLOW ((volatile unsigned short *)USB_DMA2COUNTLOW) |
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422 | #define pUSB_DMA2COUNTHIGH ((volatile unsigned short *)USB_DMA2COUNTHIGH) |
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423 | |
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424 | /* USB Channel 3 Config Registers */ |
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425 | |
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426 | #define pUSB_DMA3CONTROL ((volatile unsigned short *)USB_DMA3CONTROL) |
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427 | #define pUSB_DMA3ADDRLOW ((volatile unsigned short *)USB_DMA3ADDRLOW) |
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428 | #define pUSB_DMA3ADDRHIGH ((volatile unsigned short *)USB_DMA3ADDRHIGH) |
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429 | #define pUSB_DMA3COUNTLOW ((volatile unsigned short *)USB_DMA3COUNTLOW) |
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430 | #define pUSB_DMA3COUNTHIGH ((volatile unsigned short *)USB_DMA3COUNTHIGH) |
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431 | |
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432 | /* USB Channel 4 Config Registers */ |
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433 | |
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434 | #define pUSB_DMA4CONTROL ((volatile unsigned short *)USB_DMA4CONTROL) |
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435 | #define pUSB_DMA4ADDRLOW ((volatile unsigned short *)USB_DMA4ADDRLOW) |
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436 | #define pUSB_DMA4ADDRHIGH ((volatile unsigned short *)USB_DMA4ADDRHIGH) |
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437 | #define pUSB_DMA4COUNTLOW ((volatile unsigned short *)USB_DMA4COUNTLOW) |
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438 | #define pUSB_DMA4COUNTHIGH ((volatile unsigned short *)USB_DMA4COUNTHIGH) |
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439 | |
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440 | /* USB Channel 5 Config Registers */ |
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441 | |
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442 | #define pUSB_DMA5CONTROL ((volatile unsigned short *)USB_DMA5CONTROL) |
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443 | #define pUSB_DMA5ADDRLOW ((volatile unsigned short *)USB_DMA5ADDRLOW) |
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444 | #define pUSB_DMA5ADDRHIGH ((volatile unsigned short *)USB_DMA5ADDRHIGH) |
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445 | #define pUSB_DMA5COUNTLOW ((volatile unsigned short *)USB_DMA5COUNTLOW) |
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446 | #define pUSB_DMA5COUNTHIGH ((volatile unsigned short *)USB_DMA5COUNTHIGH) |
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447 | |
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448 | /* USB Channel 6 Config Registers */ |
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449 | |
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450 | #define pUSB_DMA6CONTROL ((volatile unsigned short *)USB_DMA6CONTROL) |
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451 | #define pUSB_DMA6ADDRLOW ((volatile unsigned short *)USB_DMA6ADDRLOW) |
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452 | #define pUSB_DMA6ADDRHIGH ((volatile unsigned short *)USB_DMA6ADDRHIGH) |
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453 | #define pUSB_DMA6COUNTLOW ((volatile unsigned short *)USB_DMA6COUNTLOW) |
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454 | #define pUSB_DMA6COUNTHIGH ((volatile unsigned short *)USB_DMA6COUNTHIGH) |
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455 | |
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456 | /* USB Channel 7 Config Registers */ |
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457 | |
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458 | #define pUSB_DMA7CONTROL ((volatile unsigned short *)USB_DMA7CONTROL) |
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459 | #define pUSB_DMA7ADDRLOW ((volatile unsigned short *)USB_DMA7ADDRLOW) |
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460 | #define pUSB_DMA7ADDRHIGH ((volatile unsigned short *)USB_DMA7ADDRHIGH) |
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461 | #define pUSB_DMA7COUNTLOW ((volatile unsigned short *)USB_DMA7COUNTLOW) |
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462 | #define pUSB_DMA7COUNTHIGH ((volatile unsigned short *)USB_DMA7COUNTHIGH) |
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463 | |
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464 | /* Keypad Registers */ |
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465 | |
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466 | #define pKPAD_CTL ((volatile unsigned short *)KPAD_CTL) |
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467 | #define pKPAD_PRESCALE ((volatile unsigned short *)KPAD_PRESCALE) |
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468 | #define pKPAD_MSEL ((volatile unsigned short *)KPAD_MSEL) |
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469 | #define pKPAD_ROWCOL ((volatile unsigned short *)KPAD_ROWCOL) |
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470 | #define pKPAD_STAT ((volatile unsigned short *)KPAD_STAT) |
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471 | #define pKPAD_SOFTEVAL ((volatile unsigned short *)KPAD_SOFTEVAL) |
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472 | |
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473 | /* Pixel Compositor (PIXC) Registers */ |
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474 | |
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475 | #define pPIXC_CTL ((volatile unsigned short *)PIXC_CTL) |
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476 | #define pPIXC_PPL ((volatile unsigned short *)PIXC_PPL) |
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477 | #define pPIXC_LPF ((volatile unsigned short *)PIXC_LPF) |
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478 | #define pPIXC_AHSTART ((volatile unsigned short *)PIXC_AHSTART) |
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479 | #define pPIXC_AHEND ((volatile unsigned short *)PIXC_AHEND) |
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480 | #define pPIXC_AVSTART ((volatile unsigned short *)PIXC_AVSTART) |
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481 | #define pPIXC_AVEND ((volatile unsigned short *)PIXC_AVEND) |
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482 | #define pPIXC_ATRANSP ((volatile unsigned short *)PIXC_ATRANSP) |
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483 | #define pPIXC_BHSTART ((volatile unsigned short *)PIXC_BHSTART) |
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484 | #define pPIXC_BHEND ((volatile unsigned short *)PIXC_BHEND) |
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485 | #define pPIXC_BVSTART ((volatile unsigned short *)PIXC_BVSTART) |
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486 | #define pPIXC_BVEND ((volatile unsigned short *)PIXC_BVEND) |
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487 | #define pPIXC_BTRANSP ((volatile unsigned short *)PIXC_BTRANSP) |
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488 | #define pPIXC_INTRSTAT ((volatile unsigned short *)PIXC_INTRSTAT) |
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489 | #define pPIXC_RYCON ((volatile unsigned long *)PIXC_RYCON) |
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490 | #define pPIXC_GUCON ((volatile unsigned long *)PIXC_GUCON) |
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491 | #define pPIXC_BVCON ((volatile unsigned long *)PIXC_BVCON) |
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492 | #define pPIXC_CCBIAS ((volatile unsigned long *)PIXC_CCBIAS) |
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493 | #define pPIXC_TC ((volatile unsigned long *)PIXC_TC) |
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494 | |
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495 | #ifdef _MISRA_RULES |
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496 | #pragma diag(pop) |
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497 | #endif /* _MISRA_RULES */ |
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498 | |
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499 | #endif /* _CDEF_BF547_H */ |
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