source: trunk/libs/newlib/src/libgloss/bfin/include/cdefBF561.h @ 688

Last change on this file since 688 was 444, checked in by satin@…, 6 years ago

add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc

File size: 51.4 KB
Line 
1/*
2 * The authors hereby grant permission to use, copy, modify, distribute,
3 * and license this software and its documentation for any purpose, provided
4 * that existing copyright notices are retained in all copies and that this
5 * notice is included verbatim in any distributions. No written agreement,
6 * license, or royalty fee is required for any of the authorized uses.
7 * Modifications to this software may be copyrighted by their authors
8 * and need not follow the licensing terms described here, provided that
9 * the new terms are clearly indicated on the first page of each file where
10 * they apply.
11 */
12
13/************************************************************************
14 *
15 * cdefBF561.h
16 *
17 * (c) Copyright 2001-2009 Analog Devices, Inc.  All rights reserved.
18 *
19 ************************************************************************/
20
21/* C POINTERS TO SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 */
22
23#ifndef _CDEF_BF561_H
24#define _CDEF_BF561_H
25
26#if !defined(__ADSPBF561__)
27#warning cdefBF561.h should only be included for BF561 chip.
28#endif
29/* include all Core registers and bit definitions */
30#include <defBF561.h>
31#include <cdef_LPBlackfin.h>
32
33#ifdef _MISRA_RULES
34#pragma diag(push)
35#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
36#endif /* _MISRA_RULES */
37
38/*********************************************************************************** */
39/* System MMR Register Map */
40/*********************************************************************************** */
41
42#ifndef _PTR_TO_VOL_VOID_PTR
43#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
44#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
45#else
46#define _PTR_TO_VOL_VOID_PTR (volatile void **)
47#endif
48#endif
49
50
51/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
52#define pPLL_CTL        ((volatile unsigned short *)PLL_CTL)
53#define pPLL_DIV        ((volatile unsigned short *)PLL_DIV)
54#define pVR_CTL         ((volatile unsigned short *)VR_CTL)
55#define pPLL_STAT       ((volatile unsigned short *)PLL_STAT)
56#define pPLL_LOCKCNT    ((volatile unsigned short *)PLL_LOCKCNT)
57#define pCHIPID ((volatile unsigned long*)CHIPID)
58
59/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
60#define pSICA_SWRST     ((volatile unsigned short *)SICA_SWRST)
61#define pSICA_SYSCR     ((volatile unsigned short *)SICA_SYSCR)
62#define pSICA_RVECT     ((volatile unsigned short *)SICA_RVECT)
63#define pSICA_IMASK     ((volatile unsigned long *)SICA_IMASK)
64#define pSICA_IMASK0    ((volatile unsigned long *)SICA_IMASK0)
65#define pSICA_IMASK1    ((volatile unsigned long *)SICA_IMASK1)
66#define pSICA_IAR0      ((volatile unsigned long *)SICA_IAR0)
67#define pSICA_IAR1      ((volatile unsigned long *)SICA_IAR1)
68#define pSICA_IAR2      ((volatile unsigned long *)SICA_IAR2)
69#define pSICA_IAR3      ((volatile unsigned long *)SICA_IAR3)
70#define pSICA_IAR4      ((volatile unsigned long *)SICA_IAR4)
71#define pSICA_IAR5      ((volatile unsigned long *)SICA_IAR5)
72#define pSICA_IAR6      ((volatile unsigned long *)SICA_IAR6)
73#define pSICA_IAR7      ((volatile unsigned long *)SICA_IAR7)
74#define pSICA_ISR0      ((volatile unsigned long *)SICA_ISR0)
75#define pSICA_ISR1      ((volatile unsigned long *)SICA_ISR1)
76#define pSICA_IWR0      ((volatile unsigned long *)SICA_IWR0)
77#define pSICA_IWR1      ((volatile unsigned long *)SICA_IWR1)
78
79/* System Reset and Interrupt Controller registers for Core B (0xFFC0 1100-0xFFC0 11FF) */
80#define pSICB_SWRST     ((volatile unsigned short *)SICB_SWRST)
81#define pSICB_SYSCR     ((volatile unsigned short *)SICB_SYSCR)
82#define pSICB_RVECT     ((volatile unsigned short *)SICB_RVECT)
83#define pSICB_IMASK0    ((volatile unsigned long *)SICB_IMASK0)
84#define pSICB_IMASK1    ((volatile unsigned long *)SICB_IMASK1)
85#define pSICB_IAR0      ((volatile unsigned long *)SICB_IAR0)
86#define pSICB_IAR1      ((volatile unsigned long *)SICB_IAR1)
87#define pSICB_IAR2      ((volatile unsigned long *)SICB_IAR2)
88#define pSICB_IAR3      ((volatile unsigned long *)SICB_IAR3)
89#define pSICB_IAR4      ((volatile unsigned long *)SICB_IAR4)
90#define pSICB_IAR5      ((volatile unsigned long *)SICB_IAR5)
91#define pSICB_IAR6      ((volatile unsigned long *)SICB_IAR6)
92#define pSICB_IAR7      ((volatile unsigned long *)SICB_IAR7)
93#define pSICB_ISR0      ((volatile unsigned long *)SICB_ISR0)
94#define pSICB_ISR1      ((volatile unsigned long *)SICB_ISR1)
95#define pSICB_IWR0      ((volatile unsigned long *)SICB_IWR0)
96#define pSICB_IWR1      ((volatile unsigned long *)SICB_IWR1)
97/* Watchdog Timer registers for Core A (0xFFC0 0200-0xFFC0 02FF) */
98#define pWDOGA_CTL      ((volatile unsigned short *)WDOGA_CTL)
99#define pWDOGA_CNT      ((volatile unsigned long *)WDOGA_CNT)
100#define pWDOGA_STAT     ((volatile unsigned long *)WDOGA_STAT)
101
102/* Watchdog Timer registers for Core B (0xFFC0 1200-0xFFC0 12FF) */
103#define pWDOGB_CTL      ((volatile unsigned short *)WDOGB_CTL)
104#define pWDOGB_CNT      ((volatile unsigned long *)WDOGB_CNT)
105#define pWDOGB_STAT     ((volatile unsigned long *)WDOGB_STAT)
106
107/* UART Controller (0xFFC00400 - 0xFFC004FF) */
108#define pUART_THR       ((volatile unsigned short *)UART_THR)
109#define pUART_RBR       ((volatile unsigned short *)UART_RBR)
110#define pUART_DLL       ((volatile unsigned short *)UART_DLL)
111#define pUART_IER       ((volatile unsigned short *)UART_IER)
112#define pUART_DLH       ((volatile unsigned short *)UART_DLH)
113#define pUART_IIR       ((volatile unsigned short *)UART_IIR)
114#define pUART_LCR       ((volatile unsigned short *)UART_LCR)
115#define pUART_MCR       ((volatile unsigned short *)UART_MCR)
116#define pUART_LSR       ((volatile unsigned short *)UART_LSR)
117#define pUART_SCR       ((volatile unsigned short *)UART_SCR)
118#define pUART_GCTL      ((volatile unsigned short *)UART_GCTL)
119
120/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
121#define pSPI_CTL        ((volatile unsigned short *)SPI_CTL)
122#define pSPI_FLG        ((volatile unsigned short *)SPI_FLG)
123#define pSPI_STAT       ((volatile unsigned short *)SPI_STAT)
124#define pSPI_TDBR       ((volatile unsigned short *)SPI_TDBR)
125#define pSPI_RDBR       ((volatile unsigned short *)SPI_RDBR)
126#define pSPI_BAUD       ((volatile unsigned short *)SPI_BAUD)
127#define pSPI_SHADOW     ((volatile unsigned short *)SPI_SHADOW)
128
129/* Timer 0-7 registers (0xFFC0 0600-0xFFC0 06FF) */
130#define pTIMER0_CONFIG  ((volatile unsigned short *)TIMER0_CONFIG)
131#define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER)
132#define pTIMER0_PERIOD  ((volatile unsigned long *)TIMER0_PERIOD)
133#define pTIMER0_WIDTH   ((volatile unsigned long *)TIMER0_WIDTH)
134#define pTIMER1_CONFIG  ((volatile unsigned short *)TIMER1_CONFIG)
135#define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER)
136#define pTIMER1_PERIOD  ((volatile unsigned long *)TIMER1_PERIOD)
137#define pTIMER1_WIDTH   ((volatile unsigned long *)TIMER1_WIDTH)
138#define pTIMER2_CONFIG  ((volatile unsigned short *)TIMER2_CONFIG)
139#define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER)
140#define pTIMER2_PERIOD  ((volatile unsigned long *)TIMER2_PERIOD)
141#define pTIMER2_WIDTH   ((volatile unsigned long *)TIMER2_WIDTH)
142#define pTIMER3_CONFIG  ((volatile unsigned short *)TIMER3_CONFIG)
143#define pTIMER3_COUNTER ((volatile unsigned long *)TIMER3_COUNTER)
144#define pTIMER3_PERIOD  ((volatile unsigned long *)TIMER3_PERIOD)
145#define pTIMER3_WIDTH   ((volatile unsigned long *)TIMER3_WIDTH)
146#define pTIMER4_CONFIG  ((volatile unsigned short *)TIMER4_CONFIG)
147#define pTIMER4_COUNTER ((volatile unsigned long *)TIMER4_COUNTER)
148#define pTIMER4_PERIOD  ((volatile unsigned long *)TIMER4_PERIOD)
149#define pTIMER4_WIDTH   ((volatile unsigned long *)TIMER4_WIDTH)
150#define pTIMER5_CONFIG  ((volatile unsigned short *)TIMER5_CONFIG)
151#define pTIMER5_COUNTER ((volatile unsigned long *)TIMER5_COUNTER)
152#define pTIMER5_PERIOD  ((volatile unsigned long *)TIMER5_PERIOD)
153#define pTIMER5_WIDTH   ((volatile unsigned long *)TIMER5_WIDTH)
154#define pTIMER6_CONFIG  ((volatile unsigned short *)TIMER6_CONFIG)
155#define pTIMER6_COUNTER ((volatile unsigned long *)TIMER6_COUNTER)
156#define pTIMER6_PERIOD  ((volatile unsigned long *)TIMER6_PERIOD)
157#define pTIMER6_WIDTH   ((volatile unsigned long *)TIMER6_WIDTH)
158#define pTIMER7_CONFIG  ((volatile unsigned short *)TIMER7_CONFIG)
159#define pTIMER7_COUNTER ((volatile unsigned long *)TIMER7_COUNTER)
160#define pTIMER7_PERIOD  ((volatile unsigned long *)TIMER7_PERIOD)
161#define pTIMER7_WIDTH   ((volatile unsigned long *)TIMER7_WIDTH)
162
163/* Timer registers 8-11 (0xFFC0 1600-0xFFC0 16FF) */
164#define pTMRS8_ENABLE   ((volatile unsigned short *)TMRS8_ENABLE)
165#define pTMRS8_DISABLE  ((volatile unsigned short *)TMRS8_DISABLE)
166#define pTMRS8_STATUS   ((volatile unsigned long *)TMRS8_STATUS)
167#define pTIMER8_CONFIG  ((volatile unsigned short *)TIMER8_CONFIG)
168#define pTIMER8_COUNTER ((volatile unsigned long *)TIMER8_COUNTER)
169#define pTIMER8_PERIOD  ((volatile unsigned long *)TIMER8_PERIOD)
170#define pTIMER8_WIDTH   ((volatile unsigned long *)TIMER8_WIDTH)
171#define pTIMER9_CONFIG  ((volatile unsigned short *)TIMER9_CONFIG)
172#define pTIMER9_COUNTER ((volatile unsigned long *)TIMER9_COUNTER)
173#define pTIMER9_PERIOD  ((volatile unsigned long *)TIMER9_PERIOD)
174#define pTIMER9_WIDTH   ((volatile unsigned long *)TIMER9_WIDTH)
175#define pTIMER10_CONFIG ((volatile unsigned short *)TIMER10_CONFIG)
176#define pTIMER10_COUNTER ((volatile unsigned long *)TIMER10_COUNTER)
177#define pTIMER10_PERIOD ((volatile unsigned long *)TIMER10_PERIOD)
178#define pTIMER10_WIDTH  ((volatile unsigned long *)TIMER10_WIDTH)
179#define pTIMER11_CONFIG ((volatile unsigned short *)TIMER11_CONFIG)
180#define pTIMER11_COUNTER ((volatile unsigned long *)TIMER11_COUNTER)
181#define pTIMER11_PERIOD ((volatile unsigned long *)TIMER11_PERIOD)
182#define pTIMER11_WIDTH  ((volatile unsigned long *)TIMER11_WIDTH)
183#define pTMRS4_ENABLE   ((volatile unsigned short *)TMRS4_ENABLE)
184#define pTMRS4_DISABLE  ((volatile unsigned short *)TMRS4_DISABLE)
185#define pTMRS4_STATUS   ((volatile unsigned long *)TMRS4_STATUS)
186
187/* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */
188#define pFIO0_FLAG_D    ((volatile unsigned short *)FIO0_FLAG_D)
189#define pFIO0_FLAG_C    ((volatile unsigned short *)FIO0_FLAG_C)
190#define pFIO0_FLAG_S    ((volatile unsigned short *)FIO0_FLAG_S)
191#define pFIO0_FLAG_T    ((volatile unsigned short *)FIO0_FLAG_T)
192#define pFIO0_MASKA_D   ((volatile unsigned short *)FIO0_MASKA_D)
193#define pFIO0_MASKA_C   ((volatile unsigned short *)FIO0_MASKA_C)
194#define pFIO0_MASKA_S   ((volatile unsigned short *)FIO0_MASKA_S)
195#define pFIO0_MASKA_T   ((volatile unsigned short *)FIO0_MASKA_T)
196#define pFIO0_MASKB_D   ((volatile unsigned short *)FIO0_MASKB_D)
197#define pFIO0_MASKB_C   ((volatile unsigned short *)FIO0_MASKB_C)
198#define pFIO0_MASKB_S   ((volatile unsigned short *)FIO0_MASKB_S)
199#define pFIO0_MASKB_T   ((volatile unsigned short *)FIO0_MASKB_T)
200#define pFIO0_DIR       ((volatile unsigned short *)FIO0_DIR)
201#define pFIO0_POLAR     ((volatile unsigned short *)FIO0_POLAR)
202#define pFIO0_EDGE      ((volatile unsigned short *)FIO0_EDGE)
203#define pFIO0_BOTH      ((volatile unsigned short *)FIO0_BOTH)
204#define pFIO0_INEN      ((volatile unsigned short *)FIO0_INEN)
205/* Programmable Flag 1 registers (0xFFC0 1500-0xFFC0 15FF) */
206#define pFIO1_FLAG_D    ((volatile unsigned short *)FIO1_FLAG_D)
207#define pFIO1_FLAG_C    ((volatile unsigned short *)FIO1_FLAG_C)
208#define pFIO1_FLAG_S    ((volatile unsigned short *)FIO1_FLAG_S)
209#define pFIO1_FLAG_T    ((volatile unsigned short *)FIO1_FLAG_T)
210#define pFIO1_MASKA_D   ((volatile unsigned short *)FIO1_MASKA_D)
211#define pFIO1_MASKA_C   ((volatile unsigned short *)FIO1_MASKA_C)
212#define pFIO1_MASKA_S   ((volatile unsigned short *)FIO1_MASKA_S)
213#define pFIO1_MASKA_T   ((volatile unsigned short *)FIO1_MASKA_T)
214#define pFIO1_MASKB_D   ((volatile unsigned short *)FIO1_MASKB_D)
215#define pFIO1_MASKB_C   ((volatile unsigned short *)FIO1_MASKB_C)
216#define pFIO1_MASKB_S   ((volatile unsigned short *)FIO1_MASKB_S)
217#define pFIO1_MASKB_T   ((volatile unsigned short *)FIO1_MASKB_T)
218#define pFIO1_DIR       ((volatile unsigned short *)FIO1_DIR)
219#define pFIO1_POLAR     ((volatile unsigned short *)FIO1_POLAR)
220#define pFIO1_EDGE      ((volatile unsigned short *)FIO1_EDGE)
221#define pFIO1_BOTH      ((volatile unsigned short *)FIO1_BOTH)
222#define pFIO1_INEN      ((volatile unsigned short *)FIO1_INEN)
223/* Programmable Flag registers (0xFFC0 1700-0xFFC0 17FF) */
224#define pFIO2_FLAG_D    ((volatile unsigned short *)FIO2_FLAG_D)
225#define pFIO2_FLAG_C    ((volatile unsigned short *)FIO2_FLAG_C)
226#define pFIO2_FLAG_S    ((volatile unsigned short *)FIO2_FLAG_S)
227#define pFIO2_FLAG_T    ((volatile unsigned short *)FIO2_FLAG_T)
228#define pFIO2_MASKA_D   ((volatile unsigned short *)FIO2_MASKA_D)
229#define pFIO2_MASKA_C   ((volatile unsigned short *)FIO2_MASKA_C)
230#define pFIO2_MASKA_S   ((volatile unsigned short *)FIO2_MASKA_S)
231#define pFIO2_MASKA_T   ((volatile unsigned short *)FIO2_MASKA_T)
232#define pFIO2_MASKB_D   ((volatile unsigned short *)FIO2_MASKB_D)
233#define pFIO2_MASKB_C   ((volatile unsigned short *)FIO2_MASKB_C)
234#define pFIO2_MASKB_S   ((volatile unsigned short *)FIO2_MASKB_S)
235#define pFIO2_MASKB_T   ((volatile unsigned short *)FIO2_MASKB_T)
236#define pFIO2_DIR       ((volatile unsigned short *)FIO2_DIR)
237#define pFIO2_POLAR     ((volatile unsigned short *)FIO2_POLAR)
238#define pFIO2_EDGE      ((volatile unsigned short *)FIO2_EDGE)
239#define pFIO2_BOTH      ((volatile unsigned short *)FIO2_BOTH)
240#define pFIO2_INEN      ((volatile unsigned short *)FIO2_INEN)
241/* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */
242#define pSPORT0_TCR1    ((volatile unsigned short *)SPORT0_TCR1)
243#define pSPORT0_TCR2    ((volatile unsigned short *)SPORT0_TCR2)
244#define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV)
245#define pSPORT0_TFSDIV  ((volatile unsigned short *)SPORT0_TFSDIV)
246#define pSPORT0_TX      ((volatile unsigned long *)SPORT0_TX)
247#define pSPORT0_RX      ((volatile unsigned long *)SPORT0_RX)
248#define pSPORT0_TX32    ((volatile long *)SPORT0_TX)
249#define pSPORT0_RX32    ((volatile long *)SPORT0_RX)
250#define pSPORT0_TX16    ((volatile unsigned short *)SPORT0_TX)
251#define pSPORT0_RX16    ((volatile unsigned short *)SPORT0_RX)
252#define pSPORT0_RCR1    ((volatile unsigned short *)SPORT0_RCR1)
253#define pSPORT0_RCR2    ((volatile unsigned short *)SPORT0_RCR2)
254#define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV)
255#define pSPORT0_RFSDIV  ((volatile unsigned short *)SPORT0_RFSDIV)
256#define pSPORT0_STAT    ((volatile unsigned short *)SPORT0_STAT)
257#define pSPORT0_CHNL    ((volatile unsigned short *)SPORT0_CHNL)
258#define pSPORT0_MCMC1   ((volatile unsigned short *)SPORT0_MCMC1)
259#define pSPORT0_MCMC2   ((volatile unsigned short *)SPORT0_MCMC2)
260#define pSPORT0_MTCS0   ((volatile unsigned long *)SPORT0_MTCS0)
261#define pSPORT0_MTCS1   ((volatile unsigned long *)SPORT0_MTCS1)
262#define pSPORT0_MTCS2   ((volatile unsigned long *)SPORT0_MTCS2)
263#define pSPORT0_MTCS3   ((volatile unsigned long *)SPORT0_MTCS3)
264#define pSPORT0_MRCS0   ((volatile unsigned long *)SPORT0_MRCS0)
265#define pSPORT0_MRCS1   ((volatile unsigned long *)SPORT0_MRCS1)
266#define pSPORT0_MRCS2   ((volatile unsigned long *)SPORT0_MRCS2)
267#define pSPORT0_MRCS3   ((volatile unsigned long *)SPORT0_MRCS3)
268/* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */
269#define pSPORT1_TCR1    ((volatile unsigned short *)SPORT1_TCR1)
270#define pSPORT1_TCR2    ((volatile unsigned short *)SPORT1_TCR2)
271#define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV)
272#define pSPORT1_TFSDIV  ((volatile unsigned short *)SPORT1_TFSDIV)
273#define pSPORT1_TX      ((volatile unsigned long *)SPORT1_TX)
274#define pSPORT1_RX      ((volatile unsigned long *)SPORT1_RX)
275#define pSPORT1_TX32    ((volatile long *)SPORT1_TX)
276#define pSPORT1_RX32    ((volatile long *)SPORT1_RX)
277#define pSPORT1_TX16    ((volatile unsigned short *)SPORT1_TX)
278#define pSPORT1_RX16    ((volatile unsigned short *)SPORT1_RX)
279#define pSPORT1_RCR1    ((volatile unsigned short *)SPORT1_RCR1)
280#define pSPORT1_RCR2    ((volatile unsigned short *)SPORT1_RCR2)
281#define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV)
282#define pSPORT1_RFSDIV  ((volatile unsigned short *)SPORT1_RFSDIV)
283#define pSPORT1_STAT    ((volatile unsigned short *)SPORT1_STAT)
284#define pSPORT1_CHNL    ((volatile unsigned short *)SPORT1_CHNL)
285#define pSPORT1_MCMC1   ((volatile unsigned short *)SPORT1_MCMC1)
286#define pSPORT1_MCMC2   ((volatile unsigned short *)SPORT1_MCMC2)
287#define pSPORT1_MTCS0   ((volatile unsigned long *)SPORT1_MTCS0)
288#define pSPORT1_MTCS1   ((volatile unsigned long *)SPORT1_MTCS1)
289#define pSPORT1_MTCS2   ((volatile unsigned long *)SPORT1_MTCS2)
290#define pSPORT1_MTCS3   ((volatile unsigned long *)SPORT1_MTCS3)
291#define pSPORT1_MRCS0   ((volatile unsigned long *)SPORT1_MRCS0)
292#define pSPORT1_MRCS1   ((volatile unsigned long *)SPORT1_MRCS1)
293#define pSPORT1_MRCS2   ((volatile unsigned long *)SPORT1_MRCS2)
294#define pSPORT1_MRCS3   ((volatile unsigned long *)SPORT1_MRCS3)
295/* Asynchronous Memory Controller - External Bus Interface Unit */
296#define pEBIU_AMGCTL    ((volatile unsigned short *)EBIU_AMGCTL)
297#define pEBIU_AMBCTL0   ((volatile unsigned long *)EBIU_AMBCTL0)
298#define pEBIU_AMBCTL1   ((volatile unsigned long *)EBIU_AMBCTL1)
299/* SDRAM Controller External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */
300#define pEBIU_SDGCTL    ((volatile unsigned long *)EBIU_SDGCTL)
301#define pEBIU_SDBCTL    ((volatile unsigned long *)EBIU_SDBCTL)
302#define pEBIU_SDRRC     ((volatile unsigned short *)EBIU_SDRRC)
303#define pEBIU_SDSTAT    ((volatile unsigned short *)EBIU_SDSTAT)
304/* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0 10FF) */
305#define pPPI0_CONTROL   ((volatile unsigned short *)PPI0_CONTROL)
306#define pPPI0_STATUS    ((volatile unsigned short *)PPI0_STATUS)
307#define pPPI0_COUNT     ((volatile unsigned short *)PPI0_COUNT)
308#define pPPI0_DELAY     ((volatile unsigned short *)PPI0_DELAY)
309#define pPPI0_FRAME     ((volatile unsigned short *)PPI0_FRAME)
310/* Parallel Peripheral Interface (PPI) 1 registers (0xFFC0 1300-0xFFC0 13FF) */
311#define pPPI1_CONTROL   ((volatile unsigned short *)PPI1_CONTROL)
312#define pPPI1_STATUS    ((volatile unsigned short *)PPI1_STATUS)
313#define pPPI1_COUNT     ((volatile unsigned short *)PPI1_COUNT)
314#define pPPI1_DELAY     ((volatile unsigned short *)PPI1_DELAY)
315#define pPPI1_FRAME     ((volatile unsigned short *)PPI1_FRAME)
316/*DMA traffic control registers */
317#define pDMA1_TC_PER    ((volatile unsigned short *)DMA1_TC_PER)
318#define pDMA1_TC_CNT    ((volatile unsigned short *)DMA1_TC_CNT)
319#define pDMA2_TC_PER    ((volatile unsigned short *)DMA2_TC_PER)
320#define pDMA2_TC_CNT    ((volatile unsigned short *)DMA2_TC_CNT)
321/* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */
322#define pDMA1_0_CONFIG          ((volatile unsigned short *)DMA1_0_CONFIG)
323#define pDMA1_0_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_0_NEXT_DESC_PTR)
324#define pDMA1_0_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_0_START_ADDR)
325#define pDMA1_0_X_COUNT         ((volatile unsigned short *)DMA1_0_X_COUNT)
326#define pDMA1_0_Y_COUNT         ((volatile unsigned short *)DMA1_0_Y_COUNT)
327#define pDMA1_0_X_MODIFY        (volatile signed short *)DMA1_0_X_MODIFY
328#define pDMA1_0_Y_MODIFY        (volatile signed short *)DMA1_0_Y_MODIFY
329#define pDMA1_0_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_0_CURR_DESC_PTR)
330#define pDMA1_0_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_0_CURR_ADDR)
331#define pDMA1_0_CURR_X_COUNT    ((volatile unsigned short *)DMA1_0_CURR_X_COUNT)
332#define pDMA1_0_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_0_CURR_Y_COUNT)
333#define pDMA1_0_IRQ_STATUS      ((volatile unsigned short *)DMA1_0_IRQ_STATUS)
334#define pDMA1_0_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_0_PERIPHERAL_MAP)
335#define pDMA1_1_CONFIG          ((volatile unsigned short *)DMA1_1_CONFIG)
336#define pDMA1_1_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_1_NEXT_DESC_PTR)
337#define pDMA1_1_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_1_START_ADDR)
338#define pDMA1_1_X_COUNT         ((volatile unsigned short *)DMA1_1_X_COUNT)
339#define pDMA1_1_Y_COUNT         ((volatile unsigned short *)DMA1_1_Y_COUNT)
340#define pDMA1_1_X_MODIFY        (volatile signed short *)DMA1_1_X_MODIFY
341#define pDMA1_1_Y_MODIFY        (volatile signed short *)DMA1_1_Y_MODIFY
342#define pDMA1_1_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_1_CURR_DESC_PTR)
343#define pDMA1_1_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_1_CURR_ADDR)
344#define pDMA1_1_CURR_X_COUNT    ((volatile unsigned short *)DMA1_1_CURR_X_COUNT)
345#define pDMA1_1_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_1_CURR_Y_COUNT)
346#define pDMA1_1_IRQ_STATUS      ((volatile unsigned short *)DMA1_1_IRQ_STATUS)
347#define pDMA1_1_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_1_PERIPHERAL_MAP)
348#define pDMA1_2_CONFIG          ((volatile unsigned short *)DMA1_2_CONFIG)
349#define pDMA1_2_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_2_NEXT_DESC_PTR)
350#define pDMA1_2_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_2_START_ADDR)
351#define pDMA1_2_X_COUNT         ((volatile unsigned short *)DMA1_2_X_COUNT)
352#define pDMA1_2_Y_COUNT         ((volatile unsigned short *)DMA1_2_Y_COUNT)
353#define pDMA1_2_X_MODIFY        (volatile signed short *)DMA1_2_X_MODIFY
354#define pDMA1_2_Y_MODIFY        (volatile signed short *)DMA1_2_Y_MODIFY
355#define pDMA1_2_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_2_CURR_DESC_PTR)
356#define pDMA1_2_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_2_CURR_ADDR)
357#define pDMA1_2_CURR_X_COUNT    ((volatile unsigned short *)DMA1_2_CURR_X_COUNT)
358#define pDMA1_2_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_2_CURR_Y_COUNT)
359#define pDMA1_2_IRQ_STATUS      ((volatile unsigned short *)DMA1_2_IRQ_STATUS)
360#define pDMA1_2_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_2_PERIPHERAL_MAP)
361#define pDMA1_3_CONFIG          ((volatile unsigned short *)DMA1_3_CONFIG)
362#define pDMA1_3_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_3_NEXT_DESC_PTR)
363#define pDMA1_3_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_3_START_ADDR)
364#define pDMA1_3_X_COUNT         ((volatile unsigned short *)DMA1_3_X_COUNT)
365#define pDMA1_3_Y_COUNT         ((volatile unsigned short *)DMA1_3_Y_COUNT)
366#define pDMA1_3_X_MODIFY        (volatile signed short *)DMA1_3_X_MODIFY
367#define pDMA1_3_Y_MODIFY        (volatile signed short *)DMA1_3_Y_MODIFY
368#define pDMA1_3_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_3_CURR_DESC_PTR)
369#define pDMA1_3_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_3_CURR_ADDR)
370#define pDMA1_3_CURR_X_COUNT    ((volatile unsigned short *)DMA1_3_CURR_X_COUNT)
371#define pDMA1_3_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_3_CURR_Y_COUNT)
372#define pDMA1_3_IRQ_STATUS      ((volatile unsigned short *)DMA1_3_IRQ_STATUS)
373#define pDMA1_3_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_3_PERIPHERAL_MAP)
374#define pDMA1_4_CONFIG          ((volatile unsigned short *)DMA1_4_CONFIG)
375#define pDMA1_4_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_4_NEXT_DESC_PTR)
376#define pDMA1_4_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_4_START_ADDR)
377#define pDMA1_4_X_COUNT         ((volatile unsigned short *)DMA1_4_X_COUNT)
378#define pDMA1_4_Y_COUNT         ((volatile unsigned short *)DMA1_4_Y_COUNT)
379#define pDMA1_4_X_MODIFY        (volatile signed short *)DMA1_4_X_MODIFY
380#define pDMA1_4_Y_MODIFY        (volatile signed short *)DMA1_4_Y_MODIFY
381#define pDMA1_4_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_4_CURR_DESC_PTR)
382#define pDMA1_4_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_4_CURR_ADDR)
383#define pDMA1_4_CURR_X_COUNT    ((volatile unsigned short *)DMA1_4_CURR_X_COUNT)
384#define pDMA1_4_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_4_CURR_Y_COUNT)
385#define pDMA1_4_IRQ_STATUS      ((volatile unsigned short *)DMA1_4_IRQ_STATUS)
386#define pDMA1_4_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_4_PERIPHERAL_MAP)
387#define pDMA1_5_CONFIG          ((volatile unsigned short *)DMA1_5_CONFIG)
388#define pDMA1_5_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_5_NEXT_DESC_PTR)
389#define pDMA1_5_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_5_START_ADDR)
390#define pDMA1_5_X_COUNT         ((volatile unsigned short *)DMA1_5_X_COUNT)
391#define pDMA1_5_Y_COUNT         ((volatile unsigned short *)DMA1_5_Y_COUNT)
392#define pDMA1_5_X_MODIFY        (volatile signed short *)DMA1_5_X_MODIFY
393#define pDMA1_5_Y_MODIFY        (volatile signed short *)DMA1_5_Y_MODIFY
394#define pDMA1_5_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_5_CURR_DESC_PTR)
395#define pDMA1_5_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_5_CURR_ADDR)
396#define pDMA1_5_CURR_X_COUNT    ((volatile unsigned short *)DMA1_5_CURR_X_COUNT)
397#define pDMA1_5_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_5_CURR_Y_COUNT)
398#define pDMA1_5_IRQ_STATUS      ((volatile unsigned short *)DMA1_5_IRQ_STATUS)
399#define pDMA1_5_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_5_PERIPHERAL_MAP)
400#define pDMA1_6_CONFIG          ((volatile unsigned short *)DMA1_6_CONFIG)
401#define pDMA1_6_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_6_NEXT_DESC_PTR)
402#define pDMA1_6_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_6_START_ADDR)
403#define pDMA1_6_X_COUNT         ((volatile unsigned short *)DMA1_6_X_COUNT)
404#define pDMA1_6_Y_COUNT         ((volatile unsigned short *)DMA1_6_Y_COUNT)
405#define pDMA1_6_X_MODIFY        (volatile signed short *)DMA1_6_X_MODIFY
406#define pDMA1_6_Y_MODIFY        (volatile signed short *)DMA1_6_Y_MODIFY
407#define pDMA1_6_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_6_CURR_DESC_PTR)
408#define pDMA1_6_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_6_CURR_ADDR)
409#define pDMA1_6_CURR_X_COUNT    ((volatile unsigned short *)DMA1_6_CURR_X_COUNT)
410#define pDMA1_6_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_6_CURR_Y_COUNT)
411#define pDMA1_6_IRQ_STATUS      ((volatile unsigned short *)DMA1_6_IRQ_STATUS)
412#define pDMA1_6_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_6_PERIPHERAL_MAP)
413#define pDMA1_7_CONFIG          ((volatile unsigned short *)DMA1_7_CONFIG)
414#define pDMA1_7_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_7_NEXT_DESC_PTR)
415#define pDMA1_7_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_7_START_ADDR)
416#define pDMA1_7_X_COUNT         ((volatile unsigned short *)DMA1_7_X_COUNT)
417#define pDMA1_7_Y_COUNT         ((volatile unsigned short *)DMA1_7_Y_COUNT)
418#define pDMA1_7_X_MODIFY        (volatile signed short *)DMA1_7_X_MODIFY
419#define pDMA1_7_Y_MODIFY        (volatile signed short *)DMA1_7_Y_MODIFY
420#define pDMA1_7_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_7_CURR_DESC_PTR)
421#define pDMA1_7_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_7_CURR_ADDR)
422#define pDMA1_7_CURR_X_COUNT    ((volatile unsigned short *)DMA1_7_CURR_X_COUNT)
423#define pDMA1_7_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_7_CURR_Y_COUNT)
424#define pDMA1_7_IRQ_STATUS      ((volatile unsigned short *)DMA1_7_IRQ_STATUS)
425#define pDMA1_7_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_7_PERIPHERAL_MAP)
426#define pDMA1_8_CONFIG          ((volatile unsigned short *)DMA1_8_CONFIG)
427#define pDMA1_8_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_8_NEXT_DESC_PTR)
428#define pDMA1_8_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_8_START_ADDR)
429#define pDMA1_8_X_COUNT         ((volatile unsigned short *)DMA1_8_X_COUNT)
430#define pDMA1_8_Y_COUNT         ((volatile unsigned short *)DMA1_8_Y_COUNT)
431#define pDMA1_8_X_MODIFY        (volatile signed short *)DMA1_8_X_MODIFY
432#define pDMA1_8_Y_MODIFY        (volatile signed short *)DMA1_8_Y_MODIFY
433#define pDMA1_8_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_8_CURR_DESC_PTR)
434#define pDMA1_8_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_8_CURR_ADDR)
435#define pDMA1_8_CURR_X_COUNT    ((volatile unsigned short *)DMA1_8_CURR_X_COUNT)
436#define pDMA1_8_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_8_CURR_Y_COUNT)
437#define pDMA1_8_IRQ_STATUS      ((volatile unsigned short *)DMA1_8_IRQ_STATUS)
438#define pDMA1_8_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_8_PERIPHERAL_MAP)
439#define pDMA1_9_CONFIG          ((volatile unsigned short *)DMA1_9_CONFIG)
440#define pDMA1_9_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_9_NEXT_DESC_PTR)
441#define pDMA1_9_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_9_START_ADDR)
442#define pDMA1_9_X_COUNT         ((volatile unsigned short *)DMA1_9_X_COUNT)
443#define pDMA1_9_Y_COUNT         ((volatile unsigned short *)DMA1_9_Y_COUNT)
444#define pDMA1_9_X_MODIFY        (volatile signed short *)DMA1_9_X_MODIFY
445#define pDMA1_9_Y_MODIFY        (volatile signed short *)DMA1_9_Y_MODIFY
446#define pDMA1_9_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA1_9_CURR_DESC_PTR)
447#define pDMA1_9_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA1_9_CURR_ADDR)
448#define pDMA1_9_CURR_X_COUNT    ((volatile unsigned short *)DMA1_9_CURR_X_COUNT)
449#define pDMA1_9_CURR_Y_COUNT    ((volatile unsigned short *)DMA1_9_CURR_Y_COUNT)
450#define pDMA1_9_IRQ_STATUS      ((volatile unsigned short *)DMA1_9_IRQ_STATUS)
451#define pDMA1_9_PERIPHERAL_MAP  ((volatile unsigned short *)DMA1_9_PERIPHERAL_MAP)
452#define pDMA1_10_CONFIG         ((volatile unsigned short *)DMA1_10_CONFIG)
453#define pDMA1_10_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA1_10_NEXT_DESC_PTR)
454#define pDMA1_10_START_ADDR     (_PTR_TO_VOL_VOID_PTR DMA1_10_START_ADDR)
455#define pDMA1_10_X_COUNT        ((volatile unsigned short *)DMA1_10_X_COUNT)
456#define pDMA1_10_Y_COUNT        ((volatile unsigned short *)DMA1_10_Y_COUNT)
457#define pDMA1_10_X_MODIFY       (volatile signed short *)DMA1_10_X_MODIFY
458#define pDMA1_10_Y_MODIFY       (volatile signed short *)DMA1_10_Y_MODIFY
459#define pDMA1_10_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA1_10_CURR_DESC_PTR)
460#define pDMA1_10_CURR_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_10_CURR_ADDR)
461#define pDMA1_10_CURR_X_COUNT   ((volatile unsigned short *)DMA1_10_CURR_X_COUNT)
462#define pDMA1_10_CURR_Y_COUNT   ((volatile unsigned short *)DMA1_10_CURR_Y_COUNT)
463#define pDMA1_10_IRQ_STATUS     ((volatile unsigned short *)DMA1_10_IRQ_STATUS)
464#define pDMA1_10_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_10_PERIPHERAL_MAP)
465#define pDMA1_11_CONFIG         ((volatile unsigned short *)DMA1_11_CONFIG)
466#define pDMA1_11_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA1_11_NEXT_DESC_PTR)
467#define pDMA1_11_START_ADDR     (_PTR_TO_VOL_VOID_PTR DMA1_11_START_ADDR)
468#define pDMA1_11_X_COUNT        ((volatile unsigned short *)DMA1_11_X_COUNT)
469#define pDMA1_11_Y_COUNT        ((volatile unsigned short *)DMA1_11_Y_COUNT)
470#define pDMA1_11_X_MODIFY       (volatile signed short *)DMA1_11_X_MODIFY
471#define pDMA1_11_Y_MODIFY       (volatile signed short *)DMA1_11_Y_MODIFY
472#define pDMA1_11_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA1_11_CURR_DESC_PTR)
473#define pDMA1_11_CURR_ADDR      (_PTR_TO_VOL_VOID_PTR DMA1_11_CURR_ADDR)
474#define pDMA1_11_CURR_X_COUNT   ((volatile unsigned short *)DMA1_11_CURR_X_COUNT)
475#define pDMA1_11_CURR_Y_COUNT   ((volatile unsigned short *)DMA1_11_CURR_Y_COUNT)
476#define pDMA1_11_IRQ_STATUS     ((volatile unsigned short *)DMA1_11_IRQ_STATUS)
477#define pDMA1_11_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_11_PERIPHERAL_MAP)
478/* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */
479#define pMDMA1_D0_CONFIG        ((volatile unsigned short *)MDMA1_D0_CONFIG)
480#define pMDMA1_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_NEXT_DESC_PTR)
481#define pMDMA1_D0_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA1_D0_START_ADDR)
482#define pMDMA1_D0_X_COUNT       ((volatile unsigned short *)MDMA1_D0_X_COUNT)
483#define pMDMA1_D0_Y_COUNT       ((volatile unsigned short *)MDMA1_D0_Y_COUNT)
484#define pMDMA1_D0_X_MODIFY      (volatile signed short *)MDMA1_D0_X_MODIFY
485#define pMDMA1_D0_Y_MODIFY      (volatile signed short *)MDMA1_D0_Y_MODIFY
486#define pMDMA1_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_DESC_PTR)
487#define pMDMA1_D0_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_ADDR)
488#define pMDMA1_D0_CURR_X_COUNT  ((volatile unsigned short *)MDMA1_D0_CURR_X_COUNT       )
489#define pMDMA1_D0_CURR_Y_COUNT  ((volatile unsigned short *)MDMA1_D0_CURR_Y_COUNT)
490#define pMDMA1_D0_IRQ_STATUS    ((volatile unsigned short *)MDMA1_D0_IRQ_STATUS)
491#define pMDMA1_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_D0_PERIPHERAL_MAP)
492#define pMDMA1_S0_CONFIG        ((volatile unsigned short *)MDMA1_S0_CONFIG)
493#define pMDMA1_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_NEXT_DESC_PTR)
494#define pMDMA1_S0_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA1_S0_START_ADDR)
495#define pMDMA1_S0_X_COUNT       ((volatile unsigned short *)MDMA1_S0_X_COUNT)
496#define pMDMA1_S0_Y_COUNT       ((volatile unsigned short *)MDMA1_S0_Y_COUNT)
497#define pMDMA1_S0_X_MODIFY      (volatile signed short *)MDMA1_S0_X_MODIFY
498#define pMDMA1_S0_Y_MODIFY      (volatile signed short *)MDMA1_S0_Y_MODIFY
499#define pMDMA1_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_DESC_PTR)
500#define pMDMA1_S0_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_ADDR)
501#define pMDMA1_S0_CURR_X_COUNT  ((volatile unsigned short *)MDMA1_S0_CURR_X_COUNT)
502#define pMDMA1_S0_CURR_Y_COUNT  ((volatile unsigned short *)MDMA1_S0_CURR_Y_COUNT)
503#define pMDMA1_S0_IRQ_STATUS    ((volatile unsigned short *)MDMA1_S0_IRQ_STATUS)
504#define pMDMA1_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_S0_PERIPHERAL_MAP)
505#define pMDMA1_D1_CONFIG        ((volatile unsigned short *)MDMA1_D1_CONFIG)
506#define pMDMA1_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_NEXT_DESC_PTR)
507#define pMDMA1_D1_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA1_D1_START_ADDR)
508#define pMDMA1_D1_X_COUNT       ((volatile unsigned short *)MDMA1_D1_X_COUNT)
509#define pMDMA1_D1_Y_COUNT       ((volatile unsigned short *)MDMA1_D1_Y_COUNT)
510#define pMDMA1_D1_X_MODIFY      (volatile signed short *)MDMA1_D1_X_MODIFY
511#define pMDMA1_D1_Y_MODIFY      (volatile signed short *)MDMA1_D1_Y_MODIFY
512#define pMDMA1_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_DESC_PTR)
513#define pMDMA1_D1_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_ADDR)
514#define pMDMA1_D1_CURR_X_COUNT  ((volatile unsigned short *)MDMA1_D1_CURR_X_COUNT)
515#define pMDMA1_D1_CURR_Y_COUNT  ((volatile unsigned short *)MDMA1_D1_CURR_Y_COUNT)
516#define pMDMA1_D1_IRQ_STATUS    ((volatile unsigned short *)MDMA1_D1_IRQ_STATUS)
517#define pMDMA1_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_D1_PERIPHERAL_MAP)
518#define pMDMA1_S1_CONFIG        ((volatile unsigned short *)MDMA1_S1_CONFIG)
519#define pMDMA1_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_NEXT_DESC_PTR)
520#define pMDMA1_S1_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA1_S1_START_ADDR)
521#define pMDMA1_S1_X_COUNT       ((volatile unsigned short *)MDMA1_S1_X_COUNT)
522#define pMDMA1_S1_Y_COUNT       ((volatile unsigned short *)MDMA1_S1_Y_COUNT)
523#define pMDMA1_S1_X_MODIFY      (volatile signed short *)MDMA1_S1_X_MODIFY
524#define pMDMA1_S1_Y_MODIFY      (volatile signed short *)MDMA1_S1_Y_MODIFY
525#define pMDMA1_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_DESC_PTR)
526#define pMDMA1_S1_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_ADDR)
527#define pMDMA1_S1_CURR_X_COUNT  ((volatile unsigned short *)MDMA1_S1_CURR_X_COUNT)
528#define pMDMA1_S1_CURR_Y_COUNT  ((volatile unsigned short *)MDMA1_S1_CURR_Y_COUNT)
529#define pMDMA1_S1_IRQ_STATUS    ((volatile unsigned short *)MDMA1_S1_IRQ_STATUS)
530#define pMDMA1_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_S1_PERIPHERAL_MAP)
531/* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */
532#define pDMA2_0_CONFIG          ((volatile unsigned short *)DMA2_0_CONFIG)
533#define pDMA2_0_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_0_NEXT_DESC_PTR)
534#define pDMA2_0_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_0_START_ADDR)
535#define pDMA2_0_X_COUNT         ((volatile unsigned short *)DMA2_0_X_COUNT)
536#define pDMA2_0_Y_COUNT         ((volatile unsigned short *)DMA2_0_Y_COUNT)
537#define pDMA2_0_X_MODIFY        (volatile signed short *)DMA2_0_X_MODIFY
538#define pDMA2_0_Y_MODIFY        (volatile signed short *)DMA2_0_Y_MODIFY
539#define pDMA2_0_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_0_CURR_DESC_PTR)
540#define pDMA2_0_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_0_CURR_ADDR)
541#define pDMA2_0_CURR_X_COUNT    ((volatile unsigned short *)DMA2_0_CURR_X_COUNT)
542#define pDMA2_0_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_0_CURR_Y_COUNT)
543#define pDMA2_0_IRQ_STATUS      ((volatile unsigned short *)DMA2_0_IRQ_STATUS)
544#define pDMA2_0_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_0_PERIPHERAL_MAP)
545#define pDMA2_1_CONFIG          ((volatile unsigned short *)DMA2_1_CONFIG)
546#define pDMA2_1_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_1_NEXT_DESC_PTR)
547#define pDMA2_1_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_1_START_ADDR)
548#define pDMA2_1_X_COUNT         ((volatile unsigned short *)DMA2_1_X_COUNT)
549#define pDMA2_1_Y_COUNT         ((volatile unsigned short *)DMA2_1_Y_COUNT)
550#define pDMA2_1_X_MODIFY        (volatile signed short *)DMA2_1_X_MODIFY
551#define pDMA2_1_Y_MODIFY        (volatile signed short *)DMA2_1_Y_MODIFY
552#define pDMA2_1_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_1_CURR_DESC_PTR)
553#define pDMA2_1_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_1_CURR_ADDR)
554#define pDMA2_1_CURR_X_COUNT    ((volatile unsigned short *)DMA2_1_CURR_X_COUNT)
555#define pDMA2_1_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_1_CURR_Y_COUNT)
556#define pDMA2_1_IRQ_STATUS      ((volatile unsigned short *)DMA2_1_IRQ_STATUS)
557#define pDMA2_1_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_1_PERIPHERAL_MAP)
558#define pDMA2_2_CONFIG          ((volatile unsigned short *)DMA2_2_CONFIG)
559#define pDMA2_2_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_2_NEXT_DESC_PTR)
560#define pDMA2_2_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_2_START_ADDR)
561#define pDMA2_2_X_COUNT         ((volatile unsigned short *)DMA2_2_X_COUNT)
562#define pDMA2_2_Y_COUNT         ((volatile unsigned short *)DMA2_2_Y_COUNT)
563#define pDMA2_2_X_MODIFY        (volatile signed short *)DMA2_2_X_MODIFY
564#define pDMA2_2_Y_MODIFY        (volatile signed short *)DMA2_2_Y_MODIFY
565#define pDMA2_2_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_2_CURR_DESC_PTR)
566#define pDMA2_2_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_2_CURR_ADDR)
567#define pDMA2_2_CURR_X_COUNT    ((volatile unsigned short *)DMA2_2_CURR_X_COUNT)
568#define pDMA2_2_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_2_CURR_Y_COUNT)
569#define pDMA2_2_IRQ_STATUS      ((volatile unsigned short *)DMA2_2_IRQ_STATUS)
570#define pDMA2_2_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_2_PERIPHERAL_MAP)
571#define pDMA2_3_CONFIG          ((volatile unsigned short *)DMA2_3_CONFIG)
572#define pDMA2_3_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_3_NEXT_DESC_PTR)
573#define pDMA2_3_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_3_START_ADDR)
574#define pDMA2_3_X_COUNT         ((volatile unsigned short *)DMA2_3_X_COUNT)
575#define pDMA2_3_Y_COUNT         ((volatile unsigned short *)DMA2_3_Y_COUNT)
576#define pDMA2_3_X_MODIFY        (volatile signed short *)DMA2_3_X_MODIFY
577#define pDMA2_3_Y_MODIFY        (volatile signed short *)DMA2_3_Y_MODIFY
578#define pDMA2_3_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_3_CURR_DESC_PTR)
579#define pDMA2_3_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_3_CURR_ADDR)
580#define pDMA2_3_CURR_X_COUNT    ((volatile unsigned short *)DMA2_3_CURR_X_COUNT)
581#define pDMA2_3_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_3_CURR_Y_COUNT)
582#define pDMA2_3_IRQ_STATUS      ((volatile unsigned short *)DMA2_3_IRQ_STATUS)
583#define pDMA2_3_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_3_PERIPHERAL_MAP)
584#define pDMA2_4_CONFIG          ((volatile unsigned short *)DMA2_4_CONFIG)
585#define pDMA2_4_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_4_NEXT_DESC_PTR)
586#define pDMA2_4_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_4_START_ADDR)
587#define pDMA2_4_X_COUNT         ((volatile unsigned short *)DMA2_4_X_COUNT)
588#define pDMA2_4_Y_COUNT         ((volatile unsigned short *)DMA2_4_Y_COUNT)
589#define pDMA2_4_X_MODIFY        (volatile signed short *)DMA2_4_X_MODIFY
590#define pDMA2_4_Y_MODIFY        (volatile signed short *)DMA2_4_Y_MODIFY
591#define pDMA2_4_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_4_CURR_DESC_PTR)
592#define pDMA2_4_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_4_CURR_ADDR)
593#define pDMA2_4_CURR_X_COUNT    ((volatile unsigned short *)DMA2_4_CURR_X_COUNT)
594#define pDMA2_4_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_4_CURR_Y_COUNT)
595#define pDMA2_4_IRQ_STATUS      ((volatile unsigned short *)DMA2_4_IRQ_STATUS)
596#define pDMA2_4_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_4_PERIPHERAL_MAP)
597#define pDMA2_5_CONFIG          ((volatile unsigned short *)DMA2_5_CONFIG)
598#define pDMA2_5_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_5_NEXT_DESC_PTR)
599#define pDMA2_5_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_5_START_ADDR)
600#define pDMA2_5_X_COUNT         ((volatile unsigned short *)DMA2_5_X_COUNT)
601#define pDMA2_5_Y_COUNT         ((volatile unsigned short *)DMA2_5_Y_COUNT)
602#define pDMA2_5_X_MODIFY        (volatile signed short *)DMA2_5_X_MODIFY
603#define pDMA2_5_Y_MODIFY        (volatile signed short *)DMA2_5_Y_MODIFY
604#define pDMA2_5_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_5_CURR_DESC_PTR)
605#define pDMA2_5_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_5_CURR_ADDR)
606#define pDMA2_5_CURR_X_COUNT    ((volatile unsigned short *)DMA2_5_CURR_X_COUNT)
607#define pDMA2_5_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_5_CURR_Y_COUNT)
608#define pDMA2_5_IRQ_STATUS      ((volatile unsigned short *)DMA2_5_IRQ_STATUS)
609#define pDMA2_5_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_5_PERIPHERAL_MAP)
610#define pDMA2_6_CONFIG          ((volatile unsigned short *)DMA2_6_CONFIG)
611#define pDMA2_6_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_6_NEXT_DESC_PTR)
612#define pDMA2_6_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_6_START_ADDR)
613#define pDMA2_6_X_COUNT         ((volatile unsigned short *)DMA2_6_X_COUNT)
614#define pDMA2_6_Y_COUNT         ((volatile unsigned short *)DMA2_6_Y_COUNT)
615#define pDMA2_6_X_MODIFY        (volatile signed short *)DMA2_6_X_MODIFY
616#define pDMA2_6_Y_MODIFY        (volatile signed short *)DMA2_6_Y_MODIFY
617#define pDMA2_6_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_6_CURR_DESC_PTR)
618#define pDMA2_6_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_6_CURR_ADDR)
619#define pDMA2_6_CURR_X_COUNT    ((volatile unsigned short *)DMA2_6_CURR_X_COUNT)
620#define pDMA2_6_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_6_CURR_Y_COUNT)
621#define pDMA2_6_IRQ_STATUS      ((volatile unsigned short *)DMA2_6_IRQ_STATUS)
622#define pDMA2_6_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_6_PERIPHERAL_MAP)
623#define pDMA2_7_CONFIG          ((volatile unsigned short *)DMA2_7_CONFIG)
624#define pDMA2_7_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_7_NEXT_DESC_PTR)
625#define pDMA2_7_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_7_START_ADDR)
626#define pDMA2_7_X_COUNT         ((volatile unsigned short *)DMA2_7_X_COUNT)
627#define pDMA2_7_Y_COUNT         ((volatile unsigned short *)DMA2_7_Y_COUNT)
628#define pDMA2_7_X_MODIFY        (volatile signed short *)DMA2_7_X_MODIFY
629#define pDMA2_7_Y_MODIFY        (volatile signed short *)DMA2_7_Y_MODIFY
630#define pDMA2_7_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_7_CURR_DESC_PTR)
631#define pDMA2_7_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_7_CURR_ADDR)
632#define pDMA2_7_CURR_X_COUNT    ((volatile unsigned short *)DMA2_7_CURR_X_COUNT)
633#define pDMA2_7_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_7_CURR_Y_COUNT)
634#define pDMA2_7_IRQ_STATUS      ((volatile unsigned short *)DMA2_7_IRQ_STATUS)
635#define pDMA2_7_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_7_PERIPHERAL_MAP)
636#define pDMA2_8_CONFIG          ((volatile unsigned short *)DMA2_8_CONFIG)
637#define pDMA2_8_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_8_NEXT_DESC_PTR)
638#define pDMA2_8_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_8_START_ADDR)
639#define pDMA2_8_X_COUNT         ((volatile unsigned short *)DMA2_8_X_COUNT)
640#define pDMA2_8_Y_COUNT         ((volatile unsigned short *)DMA2_8_Y_COUNT)
641#define pDMA2_8_X_MODIFY        (volatile signed short *)DMA2_8_X_MODIFY
642#define pDMA2_8_Y_MODIFY        (volatile signed short *)DMA2_8_Y_MODIFY
643#define pDMA2_8_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_8_CURR_DESC_PTR)
644#define pDMA2_8_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_8_CURR_ADDR)
645#define pDMA2_8_CURR_X_COUNT    ((volatile unsigned short *)DMA2_8_CURR_X_COUNT)
646#define pDMA2_8_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_8_CURR_Y_COUNT)
647#define pDMA2_8_IRQ_STATUS      ((volatile unsigned short *)DMA2_8_IRQ_STATUS)
648#define pDMA2_8_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_8_PERIPHERAL_MAP)
649#define pDMA2_9_CONFIG          ((volatile unsigned short *)DMA2_9_CONFIG)
650#define pDMA2_9_NEXT_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_9_NEXT_DESC_PTR)
651#define pDMA2_9_START_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_9_START_ADDR)
652#define pDMA2_9_X_COUNT         ((volatile unsigned short *)DMA2_9_X_COUNT)
653#define pDMA2_9_Y_COUNT         ((volatile unsigned short *)DMA2_9_Y_COUNT)
654#define pDMA2_9_X_MODIFY        (volatile signed short *)DMA2_9_X_MODIFY
655#define pDMA2_9_Y_MODIFY        (volatile signed short *)DMA2_9_Y_MODIFY
656#define pDMA2_9_CURR_DESC_PTR   (_PTR_TO_VOL_VOID_PTR DMA2_9_CURR_DESC_PTR)
657#define pDMA2_9_CURR_ADDR       (_PTR_TO_VOL_VOID_PTR DMA2_9_CURR_ADDR)
658#define pDMA2_9_CURR_X_COUNT    ((volatile unsigned short *)DMA2_9_CURR_X_COUNT)
659#define pDMA2_9_CURR_Y_COUNT    ((volatile unsigned short *)DMA2_9_CURR_Y_COUNT)
660#define pDMA2_9_IRQ_STATUS      ((volatile unsigned short *)DMA2_9_IRQ_STATUS)
661#define pDMA2_9_PERIPHERAL_MAP  ((volatile unsigned short *)DMA2_9_PERIPHERAL_MAP)
662#define pDMA2_10_CONFIG         ((volatile unsigned short *)DMA2_10_CONFIG)
663#define pDMA2_10_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA2_10_NEXT_DESC_PTR)
664#define pDMA2_10_START_ADDR     (_PTR_TO_VOL_VOID_PTR DMA2_10_START_ADDR)
665#define pDMA2_10_X_COUNT        ((volatile unsigned short *)DMA2_10_X_COUNT)
666#define pDMA2_10_Y_COUNT        ((volatile unsigned short *)DMA2_10_Y_COUNT)
667#define pDMA2_10_X_MODIFY       (volatile signed short *)DMA2_10_X_MODIFY
668#define pDMA2_10_Y_MODIFY       (volatile signed short *)DMA2_10_Y_MODIFY
669#define pDMA2_10_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA2_10_CURR_DESC_PTR)
670#define pDMA2_10_CURR_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_10_CURR_ADDR)
671#define pDMA2_10_CURR_X_COUNT   ((volatile unsigned short *)DMA2_10_CURR_X_COUNT)
672#define pDMA2_10_CURR_Y_COUNT   ((volatile unsigned short *)DMA2_10_CURR_Y_COUNT)
673#define pDMA2_10_IRQ_STATUS     ((volatile unsigned short *)DMA2_10_IRQ_STATUS)
674#define pDMA2_10_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_10_PERIPHERAL_MAP)
675#define pDMA2_11_CONFIG         ((volatile unsigned short *)DMA2_11_CONFIG)
676#define pDMA2_11_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA2_11_NEXT_DESC_PTR)
677#define pDMA2_11_START_ADDR     (_PTR_TO_VOL_VOID_PTR DMA2_11_START_ADDR)
678#define pDMA2_11_X_COUNT        ((volatile unsigned short *)DMA2_11_X_COUNT)
679#define pDMA2_11_Y_COUNT        ((volatile unsigned short *)DMA2_11_Y_COUNT)
680#define pDMA2_11_X_MODIFY       (volatile signed short *)DMA2_11_X_MODIFY
681#define pDMA2_11_Y_MODIFY       (volatile signed short *)DMA2_11_Y_MODIFY
682#define pDMA2_11_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR DMA2_11_CURR_DESC_PTR)
683#define pDMA2_11_CURR_ADDR      (_PTR_TO_VOL_VOID_PTR DMA2_11_CURR_ADDR)
684#define pDMA2_11_CURR_X_COUNT   ((volatile unsigned short *)DMA2_11_CURR_X_COUNT)
685#define pDMA2_11_CURR_Y_COUNT   ((volatile unsigned short *)DMA2_11_CURR_Y_COUNT)
686#define pDMA2_11_IRQ_STATUS     ((volatile unsigned short *)DMA2_11_IRQ_STATUS)
687#define pDMA2_11_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_11_PERIPHERAL_MAP)
688/* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */
689#define pMDMA2_D0_CONFIG        ((volatile unsigned short *)MDMA2_D0_CONFIG)
690#define pMDMA2_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_NEXT_DESC_PTR)
691#define pMDMA2_D0_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA2_D0_START_ADDR)
692#define pMDMA2_D0_X_COUNT       ((volatile unsigned short *)MDMA2_D0_X_COUNT)
693#define pMDMA2_D0_Y_COUNT       ((volatile unsigned short *)MDMA2_D0_Y_COUNT)
694#define pMDMA2_D0_X_MODIFY      (volatile signed short *)MDMA2_D0_X_MODIFY
695#define pMDMA2_D0_Y_MODIFY      (volatile signed short *)MDMA2_D0_Y_MODIFY
696#define pMDMA2_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_DESC_PTR)
697#define pMDMA2_D0_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_ADDR)
698#define pMDMA2_D0_CURR_X_COUNT  ((volatile unsigned short *)MDMA2_D0_CURR_X_COUNT)
699#define pMDMA2_D0_CURR_Y_COUNT  ((volatile unsigned short *)MDMA2_D0_CURR_Y_COUNT)
700#define pMDMA2_D0_IRQ_STATUS    ((volatile unsigned short *)MDMA2_D0_IRQ_STATUS)
701#define pMDMA2_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_D0_PERIPHERAL_MAP)
702#define pMDMA2_S0_CONFIG        ((volatile unsigned short *)MDMA2_S0_CONFIG)
703#define pMDMA2_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_NEXT_DESC_PTR)
704#define pMDMA2_S0_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA2_S0_START_ADDR)
705#define pMDMA2_S0_X_COUNT       ((volatile unsigned short *)MDMA2_S0_X_COUNT)
706#define pMDMA2_S0_Y_COUNT       ((volatile unsigned short *)MDMA2_S0_Y_COUNT)
707#define pMDMA2_S0_X_MODIFY      (volatile signed short *)MDMA2_S0_X_MODIFY
708#define pMDMA2_S0_Y_MODIFY      (volatile signed short *)MDMA2_S0_Y_MODIFY
709#define pMDMA2_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_DESC_PTR)
710#define pMDMA2_S0_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_ADDR)
711#define pMDMA2_S0_CURR_X_COUNT  ((volatile unsigned short *)MDMA2_S0_CURR_X_COUNT)
712#define pMDMA2_S0_CURR_Y_COUNT  ((volatile unsigned short *)MDMA2_S0_CURR_Y_COUNT)
713#define pMDMA2_S0_IRQ_STATUS    ((volatile unsigned short *)MDMA2_S0_IRQ_STATUS)
714#define pMDMA2_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_S0_PERIPHERAL_MAP)
715#define pMDMA2_D1_CONFIG        ((volatile unsigned short *)MDMA2_D1_CONFIG)
716#define pMDMA2_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_NEXT_DESC_PTR)
717#define pMDMA2_D1_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA2_D1_START_ADDR)
718#define pMDMA2_D1_X_COUNT       ((volatile unsigned short *)MDMA2_D1_X_COUNT)
719#define pMDMA2_D1_Y_COUNT       ((volatile unsigned short *)MDMA2_D1_Y_COUNT)
720#define pMDMA2_D1_X_MODIFY      (volatile signed short *)MDMA2_D1_X_MODIFY
721#define pMDMA2_D1_Y_MODIFY      (volatile signed short *)MDMA2_D1_Y_MODIFY
722#define pMDMA2_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_DESC_PTR)
723#define pMDMA2_D1_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_ADDR)
724#define pMDMA2_D1_CURR_X_COUNT  ((volatile unsigned short *)MDMA2_D1_CURR_X_COUNT)
725#define pMDMA2_D1_CURR_Y_COUNT  ((volatile unsigned short *)MDMA2_D1_CURR_Y_COUNT)
726#define pMDMA2_D1_IRQ_STATUS    ((volatile unsigned short *)MDMA2_D1_IRQ_STATUS)
727#define pMDMA2_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_D1_PERIPHERAL_MAP)
728#define pMDMA2_S1_CONFIG        ((volatile unsigned short *)MDMA2_S1_CONFIG)
729#define pMDMA2_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_NEXT_DESC_PTR)
730#define pMDMA2_S1_START_ADDR    (_PTR_TO_VOL_VOID_PTR MDMA2_S1_START_ADDR)
731#define pMDMA2_S1_X_COUNT       ((volatile unsigned short *)MDMA2_S1_X_COUNT)
732#define pMDMA2_S1_Y_COUNT       ((volatile unsigned short *)MDMA2_S1_Y_COUNT)
733#define pMDMA2_S1_X_MODIFY      (volatile signed short *)MDMA2_S1_X_MODIFY
734#define pMDMA2_S1_Y_MODIFY      (volatile signed short *)MDMA2_S1_Y_MODIFY
735#define pMDMA2_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_DESC_PTR)
736#define pMDMA2_S1_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_ADDR)
737#define pMDMA2_S1_CURR_X_COUNT  ((volatile unsigned short *)MDMA2_S1_CURR_X_COUNT)
738#define pMDMA2_S1_CURR_Y_COUNT  ((volatile unsigned short *)MDMA2_S1_CURR_Y_COUNT)
739#define pMDMA2_S1_IRQ_STATUS    ((volatile unsigned short *)MDMA2_S1_IRQ_STATUS)
740#define pMDMA2_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_S1_PERIPHERAL_MAP)
741/* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */
742#define pIMDMA_D0_CONFIG        ((volatile unsigned short *)IMDMA_D0_CONFIG)
743#define pIMDMA_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_NEXT_DESC_PTR)
744#define pIMDMA_D0_START_ADDR    (_PTR_TO_VOL_VOID_PTR IMDMA_D0_START_ADDR)
745#define pIMDMA_D0_X_COUNT       ((volatile unsigned short *)IMDMA_D0_X_COUNT)
746#define pIMDMA_D0_Y_COUNT       ((volatile unsigned short *)IMDMA_D0_Y_COUNT)
747#define pIMDMA_D0_X_MODIFY      (volatile signed short *)IMDMA_D0_X_MODIFY
748#define pIMDMA_D0_Y_MODIFY      (volatile signed short *)IMDMA_D0_Y_MODIFY
749#define pIMDMA_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_DESC_PTR)
750#define pIMDMA_D0_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_ADDR)
751#define pIMDMA_D0_CURR_X_COUNT  ((volatile unsigned short *)IMDMA_D0_CURR_X_COUNT)
752#define pIMDMA_D0_CURR_Y_COUNT  ((volatile unsigned short *)IMDMA_D0_CURR_Y_COUNT)
753#define pIMDMA_D0_IRQ_STATUS    ((volatile unsigned short *)IMDMA_D0_IRQ_STATUS)
754#define pIMDMA_S0_CONFIG        ((volatile unsigned short *)IMDMA_S0_CONFIG)
755#define pIMDMA_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_NEXT_DESC_PTR)
756#define pIMDMA_S0_START_ADDR    (_PTR_TO_VOL_VOID_PTR IMDMA_S0_START_ADDR)
757#define pIMDMA_S0_X_COUNT       ((volatile unsigned short *)IMDMA_S0_X_COUNT)
758#define pIMDMA_S0_Y_COUNT       ((volatile unsigned short *)IMDMA_S0_Y_COUNT)
759#define pIMDMA_S0_X_MODIFY      (volatile signed short *)IMDMA_S0_X_MODIFY
760#define pIMDMA_S0_Y_MODIFY      (volatile signed short *)IMDMA_S0_Y_MODIFY
761#define pIMDMA_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_DESC_PTR)
762#define pIMDMA_S0_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_ADDR)
763#define pIMDMA_S0_CURR_X_COUNT  ((volatile unsigned short *)IMDMA_S0_CURR_X_COUNT)
764#define pIMDMA_S0_CURR_Y_COUNT  ((volatile unsigned short *)IMDMA_S0_CURR_Y_COUNT)
765#define pIMDMA_S0_IRQ_STATUS    ((volatile unsigned short *)IMDMA_S0_IRQ_STATUS)
766#define pIMDMA_D1_CONFIG        ((volatile unsigned short *)IMDMA_D1_CONFIG)
767#define pIMDMA_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_NEXT_DESC_PTR)
768#define pIMDMA_D1_START_ADDR    (_PTR_TO_VOL_VOID_PTR IMDMA_D1_START_ADDR)
769#define pIMDMA_D1_X_COUNT       ((volatile unsigned short *)IMDMA_D1_X_COUNT)
770#define pIMDMA_D1_Y_COUNT       ((volatile unsigned short *)IMDMA_D1_Y_COUNT)
771#define pIMDMA_D1_X_MODIFY      (volatile signed short *)IMDMA_D1_X_MODIFY
772#define pIMDMA_D1_Y_MODIFY      (volatile signed short *)IMDMA_D1_Y_MODIFY
773#define pIMDMA_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_DESC_PTR)
774#define pIMDMA_D1_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_ADDR)
775#define pIMDMA_D1_CURR_X_COUNT  ((volatile unsigned short *)IMDMA_D1_CURR_X_COUNT)
776#define pIMDMA_D1_CURR_Y_COUNT  ((volatile unsigned short *)IMDMA_D1_CURR_Y_COUNT)
777#define pIMDMA_D1_IRQ_STATUS    ((volatile unsigned short *)IMDMA_D1_IRQ_STATUS)
778#define pIMDMA_S1_CONFIG        ((volatile unsigned short *)IMDMA_S1_CONFIG)
779#define pIMDMA_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_NEXT_DESC_PTR)
780#define pIMDMA_S1_START_ADDR    (_PTR_TO_VOL_VOID_PTR IMDMA_S1_START_ADDR)
781#define pIMDMA_S1_X_COUNT       ((volatile unsigned short *)IMDMA_S1_X_COUNT)
782#define pIMDMA_S1_Y_COUNT       ((volatile unsigned short *)IMDMA_S1_Y_COUNT)
783#define pIMDMA_S1_X_MODIFY      (volatile signed short *)IMDMA_S1_X_MODIFY
784#define pIMDMA_S1_Y_MODIFY      (volatile signed short *)IMDMA_S1_Y_MODIFY
785#define pIMDMA_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_DESC_PTR)
786#define pIMDMA_S1_CURR_ADDR     (_PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_ADDR)
787#define pIMDMA_S1_CURR_X_COUNT  ((volatile unsigned short *)IMDMA_S1_CURR_X_COUNT)
788#define pIMDMA_S1_CURR_Y_COUNT  ((volatile unsigned short *)IMDMA_S1_CURR_Y_COUNT)
789#define pIMDMA_S1_IRQ_STATUS    ((volatile unsigned short *)IMDMA_S1_IRQ_STATUS)
790
791#ifdef _MISRA_RULES
792#pragma diag(pop)
793#endif /* _MISRA_RULES */
794
795#endif /* _CDEF_BF561_H */
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