| 1 | /* |
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| 2 | * The authors hereby grant permission to use, copy, modify, distribute, |
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| 3 | * and license this software and its documentation for any purpose, provided |
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| 4 | * that existing copyright notices are retained in all copies and that this |
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| 5 | * notice is included verbatim in any distributions. No written agreement, |
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| 6 | * license, or royalty fee is required for any of the authorized uses. |
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| 7 | * Modifications to this software may be copyrighted by their authors |
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| 8 | * and need not follow the licensing terms described here, provided that |
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| 9 | * the new terms are clearly indicated on the first page of each file where |
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| 10 | * they apply. |
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| 11 | */ |
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| 12 | |
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| 13 | /************************************************************************ |
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| 14 | * |
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| 15 | * cdefBF561.h |
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| 16 | * |
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| 17 | * (c) Copyright 2001-2009 Analog Devices, Inc. All rights reserved. |
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| 18 | * |
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| 19 | ************************************************************************/ |
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| 20 | |
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| 21 | /* C POINTERS TO SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 */ |
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| 22 | |
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| 23 | #ifndef _CDEF_BF561_H |
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| 24 | #define _CDEF_BF561_H |
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| 25 | |
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| 26 | #if !defined(__ADSPBF561__) |
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| 27 | #warning cdefBF561.h should only be included for BF561 chip. |
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| 28 | #endif |
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| 29 | /* include all Core registers and bit definitions */ |
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| 30 | #include <defBF561.h> |
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| 31 | #include <cdef_LPBlackfin.h> |
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| 32 | |
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| 33 | #ifdef _MISRA_RULES |
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| 34 | #pragma diag(push) |
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| 35 | #pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant") |
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| 36 | #endif /* _MISRA_RULES */ |
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| 37 | |
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| 38 | /*********************************************************************************** */ |
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| 39 | /* System MMR Register Map */ |
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| 40 | /*********************************************************************************** */ |
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| 41 | |
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| 42 | #ifndef _PTR_TO_VOL_VOID_PTR |
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| 43 | #ifndef _USE_LEGACY_CDEF_BEHAVIOUR |
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| 44 | #define _PTR_TO_VOL_VOID_PTR (void * volatile *) |
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| 45 | #else |
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| 46 | #define _PTR_TO_VOL_VOID_PTR (volatile void **) |
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| 47 | #endif |
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| 48 | #endif |
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| 49 | |
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| 50 | |
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| 51 | /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */ |
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| 52 | #define pPLL_CTL ((volatile unsigned short *)PLL_CTL) |
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| 53 | #define pPLL_DIV ((volatile unsigned short *)PLL_DIV) |
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| 54 | #define pVR_CTL ((volatile unsigned short *)VR_CTL) |
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| 55 | #define pPLL_STAT ((volatile unsigned short *)PLL_STAT) |
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| 56 | #define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT) |
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| 57 | #define pCHIPID ((volatile unsigned long*)CHIPID) |
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| 58 | |
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| 59 | /* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */ |
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| 60 | #define pSICA_SWRST ((volatile unsigned short *)SICA_SWRST) |
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| 61 | #define pSICA_SYSCR ((volatile unsigned short *)SICA_SYSCR) |
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| 62 | #define pSICA_RVECT ((volatile unsigned short *)SICA_RVECT) |
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| 63 | #define pSICA_IMASK ((volatile unsigned long *)SICA_IMASK) |
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| 64 | #define pSICA_IMASK0 ((volatile unsigned long *)SICA_IMASK0) |
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| 65 | #define pSICA_IMASK1 ((volatile unsigned long *)SICA_IMASK1) |
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| 66 | #define pSICA_IAR0 ((volatile unsigned long *)SICA_IAR0) |
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| 67 | #define pSICA_IAR1 ((volatile unsigned long *)SICA_IAR1) |
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| 68 | #define pSICA_IAR2 ((volatile unsigned long *)SICA_IAR2) |
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| 69 | #define pSICA_IAR3 ((volatile unsigned long *)SICA_IAR3) |
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| 70 | #define pSICA_IAR4 ((volatile unsigned long *)SICA_IAR4) |
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| 71 | #define pSICA_IAR5 ((volatile unsigned long *)SICA_IAR5) |
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| 72 | #define pSICA_IAR6 ((volatile unsigned long *)SICA_IAR6) |
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| 73 | #define pSICA_IAR7 ((volatile unsigned long *)SICA_IAR7) |
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| 74 | #define pSICA_ISR0 ((volatile unsigned long *)SICA_ISR0) |
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| 75 | #define pSICA_ISR1 ((volatile unsigned long *)SICA_ISR1) |
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| 76 | #define pSICA_IWR0 ((volatile unsigned long *)SICA_IWR0) |
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| 77 | #define pSICA_IWR1 ((volatile unsigned long *)SICA_IWR1) |
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| 78 | |
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| 79 | /* System Reset and Interrupt Controller registers for Core B (0xFFC0 1100-0xFFC0 11FF) */ |
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| 80 | #define pSICB_SWRST ((volatile unsigned short *)SICB_SWRST) |
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| 81 | #define pSICB_SYSCR ((volatile unsigned short *)SICB_SYSCR) |
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| 82 | #define pSICB_RVECT ((volatile unsigned short *)SICB_RVECT) |
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| 83 | #define pSICB_IMASK0 ((volatile unsigned long *)SICB_IMASK0) |
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| 84 | #define pSICB_IMASK1 ((volatile unsigned long *)SICB_IMASK1) |
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| 85 | #define pSICB_IAR0 ((volatile unsigned long *)SICB_IAR0) |
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| 86 | #define pSICB_IAR1 ((volatile unsigned long *)SICB_IAR1) |
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| 87 | #define pSICB_IAR2 ((volatile unsigned long *)SICB_IAR2) |
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| 88 | #define pSICB_IAR3 ((volatile unsigned long *)SICB_IAR3) |
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| 89 | #define pSICB_IAR4 ((volatile unsigned long *)SICB_IAR4) |
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| 90 | #define pSICB_IAR5 ((volatile unsigned long *)SICB_IAR5) |
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| 91 | #define pSICB_IAR6 ((volatile unsigned long *)SICB_IAR6) |
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| 92 | #define pSICB_IAR7 ((volatile unsigned long *)SICB_IAR7) |
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| 93 | #define pSICB_ISR0 ((volatile unsigned long *)SICB_ISR0) |
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| 94 | #define pSICB_ISR1 ((volatile unsigned long *)SICB_ISR1) |
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| 95 | #define pSICB_IWR0 ((volatile unsigned long *)SICB_IWR0) |
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| 96 | #define pSICB_IWR1 ((volatile unsigned long *)SICB_IWR1) |
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| 97 | /* Watchdog Timer registers for Core A (0xFFC0 0200-0xFFC0 02FF) */ |
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| 98 | #define pWDOGA_CTL ((volatile unsigned short *)WDOGA_CTL) |
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| 99 | #define pWDOGA_CNT ((volatile unsigned long *)WDOGA_CNT) |
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| 100 | #define pWDOGA_STAT ((volatile unsigned long *)WDOGA_STAT) |
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| 101 | |
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| 102 | /* Watchdog Timer registers for Core B (0xFFC0 1200-0xFFC0 12FF) */ |
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| 103 | #define pWDOGB_CTL ((volatile unsigned short *)WDOGB_CTL) |
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| 104 | #define pWDOGB_CNT ((volatile unsigned long *)WDOGB_CNT) |
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| 105 | #define pWDOGB_STAT ((volatile unsigned long *)WDOGB_STAT) |
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| 106 | |
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| 107 | /* UART Controller (0xFFC00400 - 0xFFC004FF) */ |
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| 108 | #define pUART_THR ((volatile unsigned short *)UART_THR) |
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| 109 | #define pUART_RBR ((volatile unsigned short *)UART_RBR) |
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| 110 | #define pUART_DLL ((volatile unsigned short *)UART_DLL) |
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| 111 | #define pUART_IER ((volatile unsigned short *)UART_IER) |
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| 112 | #define pUART_DLH ((volatile unsigned short *)UART_DLH) |
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| 113 | #define pUART_IIR ((volatile unsigned short *)UART_IIR) |
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| 114 | #define pUART_LCR ((volatile unsigned short *)UART_LCR) |
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| 115 | #define pUART_MCR ((volatile unsigned short *)UART_MCR) |
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| 116 | #define pUART_LSR ((volatile unsigned short *)UART_LSR) |
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| 117 | #define pUART_SCR ((volatile unsigned short *)UART_SCR) |
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| 118 | #define pUART_GCTL ((volatile unsigned short *)UART_GCTL) |
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| 119 | |
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| 120 | /* SPI Controller (0xFFC00500 - 0xFFC005FF) */ |
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| 121 | #define pSPI_CTL ((volatile unsigned short *)SPI_CTL) |
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| 122 | #define pSPI_FLG ((volatile unsigned short *)SPI_FLG) |
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| 123 | #define pSPI_STAT ((volatile unsigned short *)SPI_STAT) |
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| 124 | #define pSPI_TDBR ((volatile unsigned short *)SPI_TDBR) |
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| 125 | #define pSPI_RDBR ((volatile unsigned short *)SPI_RDBR) |
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| 126 | #define pSPI_BAUD ((volatile unsigned short *)SPI_BAUD) |
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| 127 | #define pSPI_SHADOW ((volatile unsigned short *)SPI_SHADOW) |
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| 128 | |
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| 129 | /* Timer 0-7 registers (0xFFC0 0600-0xFFC0 06FF) */ |
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| 130 | #define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG) |
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| 131 | #define pTIMER0_COUNTER ((volatile unsigned long *)TIMER0_COUNTER) |
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| 132 | #define pTIMER0_PERIOD ((volatile unsigned long *)TIMER0_PERIOD) |
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| 133 | #define pTIMER0_WIDTH ((volatile unsigned long *)TIMER0_WIDTH) |
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| 134 | #define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG) |
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| 135 | #define pTIMER1_COUNTER ((volatile unsigned long *)TIMER1_COUNTER) |
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| 136 | #define pTIMER1_PERIOD ((volatile unsigned long *)TIMER1_PERIOD) |
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| 137 | #define pTIMER1_WIDTH ((volatile unsigned long *)TIMER1_WIDTH) |
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| 138 | #define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG) |
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| 139 | #define pTIMER2_COUNTER ((volatile unsigned long *)TIMER2_COUNTER) |
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| 140 | #define pTIMER2_PERIOD ((volatile unsigned long *)TIMER2_PERIOD) |
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| 141 | #define pTIMER2_WIDTH ((volatile unsigned long *)TIMER2_WIDTH) |
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| 142 | #define pTIMER3_CONFIG ((volatile unsigned short *)TIMER3_CONFIG) |
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| 143 | #define pTIMER3_COUNTER ((volatile unsigned long *)TIMER3_COUNTER) |
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| 144 | #define pTIMER3_PERIOD ((volatile unsigned long *)TIMER3_PERIOD) |
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| 145 | #define pTIMER3_WIDTH ((volatile unsigned long *)TIMER3_WIDTH) |
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| 146 | #define pTIMER4_CONFIG ((volatile unsigned short *)TIMER4_CONFIG) |
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| 147 | #define pTIMER4_COUNTER ((volatile unsigned long *)TIMER4_COUNTER) |
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| 148 | #define pTIMER4_PERIOD ((volatile unsigned long *)TIMER4_PERIOD) |
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| 149 | #define pTIMER4_WIDTH ((volatile unsigned long *)TIMER4_WIDTH) |
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| 150 | #define pTIMER5_CONFIG ((volatile unsigned short *)TIMER5_CONFIG) |
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| 151 | #define pTIMER5_COUNTER ((volatile unsigned long *)TIMER5_COUNTER) |
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| 152 | #define pTIMER5_PERIOD ((volatile unsigned long *)TIMER5_PERIOD) |
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| 153 | #define pTIMER5_WIDTH ((volatile unsigned long *)TIMER5_WIDTH) |
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| 154 | #define pTIMER6_CONFIG ((volatile unsigned short *)TIMER6_CONFIG) |
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| 155 | #define pTIMER6_COUNTER ((volatile unsigned long *)TIMER6_COUNTER) |
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| 156 | #define pTIMER6_PERIOD ((volatile unsigned long *)TIMER6_PERIOD) |
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| 157 | #define pTIMER6_WIDTH ((volatile unsigned long *)TIMER6_WIDTH) |
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| 158 | #define pTIMER7_CONFIG ((volatile unsigned short *)TIMER7_CONFIG) |
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| 159 | #define pTIMER7_COUNTER ((volatile unsigned long *)TIMER7_COUNTER) |
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| 160 | #define pTIMER7_PERIOD ((volatile unsigned long *)TIMER7_PERIOD) |
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| 161 | #define pTIMER7_WIDTH ((volatile unsigned long *)TIMER7_WIDTH) |
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| 162 | |
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| 163 | /* Timer registers 8-11 (0xFFC0 1600-0xFFC0 16FF) */ |
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| 164 | #define pTMRS8_ENABLE ((volatile unsigned short *)TMRS8_ENABLE) |
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| 165 | #define pTMRS8_DISABLE ((volatile unsigned short *)TMRS8_DISABLE) |
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| 166 | #define pTMRS8_STATUS ((volatile unsigned long *)TMRS8_STATUS) |
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| 167 | #define pTIMER8_CONFIG ((volatile unsigned short *)TIMER8_CONFIG) |
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| 168 | #define pTIMER8_COUNTER ((volatile unsigned long *)TIMER8_COUNTER) |
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| 169 | #define pTIMER8_PERIOD ((volatile unsigned long *)TIMER8_PERIOD) |
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| 170 | #define pTIMER8_WIDTH ((volatile unsigned long *)TIMER8_WIDTH) |
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| 171 | #define pTIMER9_CONFIG ((volatile unsigned short *)TIMER9_CONFIG) |
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| 172 | #define pTIMER9_COUNTER ((volatile unsigned long *)TIMER9_COUNTER) |
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| 173 | #define pTIMER9_PERIOD ((volatile unsigned long *)TIMER9_PERIOD) |
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| 174 | #define pTIMER9_WIDTH ((volatile unsigned long *)TIMER9_WIDTH) |
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| 175 | #define pTIMER10_CONFIG ((volatile unsigned short *)TIMER10_CONFIG) |
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| 176 | #define pTIMER10_COUNTER ((volatile unsigned long *)TIMER10_COUNTER) |
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| 177 | #define pTIMER10_PERIOD ((volatile unsigned long *)TIMER10_PERIOD) |
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| 178 | #define pTIMER10_WIDTH ((volatile unsigned long *)TIMER10_WIDTH) |
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| 179 | #define pTIMER11_CONFIG ((volatile unsigned short *)TIMER11_CONFIG) |
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| 180 | #define pTIMER11_COUNTER ((volatile unsigned long *)TIMER11_COUNTER) |
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| 181 | #define pTIMER11_PERIOD ((volatile unsigned long *)TIMER11_PERIOD) |
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| 182 | #define pTIMER11_WIDTH ((volatile unsigned long *)TIMER11_WIDTH) |
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| 183 | #define pTMRS4_ENABLE ((volatile unsigned short *)TMRS4_ENABLE) |
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| 184 | #define pTMRS4_DISABLE ((volatile unsigned short *)TMRS4_DISABLE) |
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| 185 | #define pTMRS4_STATUS ((volatile unsigned long *)TMRS4_STATUS) |
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| 186 | |
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| 187 | /* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */ |
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| 188 | #define pFIO0_FLAG_D ((volatile unsigned short *)FIO0_FLAG_D) |
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| 189 | #define pFIO0_FLAG_C ((volatile unsigned short *)FIO0_FLAG_C) |
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| 190 | #define pFIO0_FLAG_S ((volatile unsigned short *)FIO0_FLAG_S) |
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| 191 | #define pFIO0_FLAG_T ((volatile unsigned short *)FIO0_FLAG_T) |
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| 192 | #define pFIO0_MASKA_D ((volatile unsigned short *)FIO0_MASKA_D) |
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| 193 | #define pFIO0_MASKA_C ((volatile unsigned short *)FIO0_MASKA_C) |
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| 194 | #define pFIO0_MASKA_S ((volatile unsigned short *)FIO0_MASKA_S) |
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| 195 | #define pFIO0_MASKA_T ((volatile unsigned short *)FIO0_MASKA_T) |
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| 196 | #define pFIO0_MASKB_D ((volatile unsigned short *)FIO0_MASKB_D) |
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| 197 | #define pFIO0_MASKB_C ((volatile unsigned short *)FIO0_MASKB_C) |
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| 198 | #define pFIO0_MASKB_S ((volatile unsigned short *)FIO0_MASKB_S) |
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| 199 | #define pFIO0_MASKB_T ((volatile unsigned short *)FIO0_MASKB_T) |
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| 200 | #define pFIO0_DIR ((volatile unsigned short *)FIO0_DIR) |
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| 201 | #define pFIO0_POLAR ((volatile unsigned short *)FIO0_POLAR) |
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| 202 | #define pFIO0_EDGE ((volatile unsigned short *)FIO0_EDGE) |
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| 203 | #define pFIO0_BOTH ((volatile unsigned short *)FIO0_BOTH) |
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| 204 | #define pFIO0_INEN ((volatile unsigned short *)FIO0_INEN) |
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| 205 | /* Programmable Flag 1 registers (0xFFC0 1500-0xFFC0 15FF) */ |
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| 206 | #define pFIO1_FLAG_D ((volatile unsigned short *)FIO1_FLAG_D) |
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| 207 | #define pFIO1_FLAG_C ((volatile unsigned short *)FIO1_FLAG_C) |
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| 208 | #define pFIO1_FLAG_S ((volatile unsigned short *)FIO1_FLAG_S) |
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| 209 | #define pFIO1_FLAG_T ((volatile unsigned short *)FIO1_FLAG_T) |
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| 210 | #define pFIO1_MASKA_D ((volatile unsigned short *)FIO1_MASKA_D) |
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| 211 | #define pFIO1_MASKA_C ((volatile unsigned short *)FIO1_MASKA_C) |
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| 212 | #define pFIO1_MASKA_S ((volatile unsigned short *)FIO1_MASKA_S) |
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| 213 | #define pFIO1_MASKA_T ((volatile unsigned short *)FIO1_MASKA_T) |
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| 214 | #define pFIO1_MASKB_D ((volatile unsigned short *)FIO1_MASKB_D) |
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| 215 | #define pFIO1_MASKB_C ((volatile unsigned short *)FIO1_MASKB_C) |
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| 216 | #define pFIO1_MASKB_S ((volatile unsigned short *)FIO1_MASKB_S) |
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| 217 | #define pFIO1_MASKB_T ((volatile unsigned short *)FIO1_MASKB_T) |
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| 218 | #define pFIO1_DIR ((volatile unsigned short *)FIO1_DIR) |
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| 219 | #define pFIO1_POLAR ((volatile unsigned short *)FIO1_POLAR) |
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| 220 | #define pFIO1_EDGE ((volatile unsigned short *)FIO1_EDGE) |
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| 221 | #define pFIO1_BOTH ((volatile unsigned short *)FIO1_BOTH) |
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| 222 | #define pFIO1_INEN ((volatile unsigned short *)FIO1_INEN) |
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| 223 | /* Programmable Flag registers (0xFFC0 1700-0xFFC0 17FF) */ |
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| 224 | #define pFIO2_FLAG_D ((volatile unsigned short *)FIO2_FLAG_D) |
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| 225 | #define pFIO2_FLAG_C ((volatile unsigned short *)FIO2_FLAG_C) |
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| 226 | #define pFIO2_FLAG_S ((volatile unsigned short *)FIO2_FLAG_S) |
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| 227 | #define pFIO2_FLAG_T ((volatile unsigned short *)FIO2_FLAG_T) |
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| 228 | #define pFIO2_MASKA_D ((volatile unsigned short *)FIO2_MASKA_D) |
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| 229 | #define pFIO2_MASKA_C ((volatile unsigned short *)FIO2_MASKA_C) |
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| 230 | #define pFIO2_MASKA_S ((volatile unsigned short *)FIO2_MASKA_S) |
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| 231 | #define pFIO2_MASKA_T ((volatile unsigned short *)FIO2_MASKA_T) |
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| 232 | #define pFIO2_MASKB_D ((volatile unsigned short *)FIO2_MASKB_D) |
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| 233 | #define pFIO2_MASKB_C ((volatile unsigned short *)FIO2_MASKB_C) |
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| 234 | #define pFIO2_MASKB_S ((volatile unsigned short *)FIO2_MASKB_S) |
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| 235 | #define pFIO2_MASKB_T ((volatile unsigned short *)FIO2_MASKB_T) |
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| 236 | #define pFIO2_DIR ((volatile unsigned short *)FIO2_DIR) |
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| 237 | #define pFIO2_POLAR ((volatile unsigned short *)FIO2_POLAR) |
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| 238 | #define pFIO2_EDGE ((volatile unsigned short *)FIO2_EDGE) |
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| 239 | #define pFIO2_BOTH ((volatile unsigned short *)FIO2_BOTH) |
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| 240 | #define pFIO2_INEN ((volatile unsigned short *)FIO2_INEN) |
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| 241 | /* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */ |
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| 242 | #define pSPORT0_TCR1 ((volatile unsigned short *)SPORT0_TCR1) |
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| 243 | #define pSPORT0_TCR2 ((volatile unsigned short *)SPORT0_TCR2) |
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| 244 | #define pSPORT0_TCLKDIV ((volatile unsigned short *)SPORT0_TCLKDIV) |
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| 245 | #define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV) |
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| 246 | #define pSPORT0_TX ((volatile unsigned long *)SPORT0_TX) |
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| 247 | #define pSPORT0_RX ((volatile unsigned long *)SPORT0_RX) |
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| 248 | #define pSPORT0_TX32 ((volatile long *)SPORT0_TX) |
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| 249 | #define pSPORT0_RX32 ((volatile long *)SPORT0_RX) |
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| 250 | #define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX) |
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| 251 | #define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX) |
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| 252 | #define pSPORT0_RCR1 ((volatile unsigned short *)SPORT0_RCR1) |
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| 253 | #define pSPORT0_RCR2 ((volatile unsigned short *)SPORT0_RCR2) |
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| 254 | #define pSPORT0_RCLKDIV ((volatile unsigned short *)SPORT0_RCLKDIV) |
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| 255 | #define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV) |
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| 256 | #define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT) |
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| 257 | #define pSPORT0_CHNL ((volatile unsigned short *)SPORT0_CHNL) |
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| 258 | #define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1) |
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| 259 | #define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2) |
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| 260 | #define pSPORT0_MTCS0 ((volatile unsigned long *)SPORT0_MTCS0) |
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| 261 | #define pSPORT0_MTCS1 ((volatile unsigned long *)SPORT0_MTCS1) |
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| 262 | #define pSPORT0_MTCS2 ((volatile unsigned long *)SPORT0_MTCS2) |
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| 263 | #define pSPORT0_MTCS3 ((volatile unsigned long *)SPORT0_MTCS3) |
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| 264 | #define pSPORT0_MRCS0 ((volatile unsigned long *)SPORT0_MRCS0) |
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| 265 | #define pSPORT0_MRCS1 ((volatile unsigned long *)SPORT0_MRCS1) |
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| 266 | #define pSPORT0_MRCS2 ((volatile unsigned long *)SPORT0_MRCS2) |
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| 267 | #define pSPORT0_MRCS3 ((volatile unsigned long *)SPORT0_MRCS3) |
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| 268 | /* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */ |
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| 269 | #define pSPORT1_TCR1 ((volatile unsigned short *)SPORT1_TCR1) |
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| 270 | #define pSPORT1_TCR2 ((volatile unsigned short *)SPORT1_TCR2) |
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| 271 | #define pSPORT1_TCLKDIV ((volatile unsigned short *)SPORT1_TCLKDIV) |
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| 272 | #define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV) |
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| 273 | #define pSPORT1_TX ((volatile unsigned long *)SPORT1_TX) |
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| 274 | #define pSPORT1_RX ((volatile unsigned long *)SPORT1_RX) |
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| 275 | #define pSPORT1_TX32 ((volatile long *)SPORT1_TX) |
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| 276 | #define pSPORT1_RX32 ((volatile long *)SPORT1_RX) |
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| 277 | #define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX) |
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| 278 | #define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX) |
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| 279 | #define pSPORT1_RCR1 ((volatile unsigned short *)SPORT1_RCR1) |
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| 280 | #define pSPORT1_RCR2 ((volatile unsigned short *)SPORT1_RCR2) |
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| 281 | #define pSPORT1_RCLKDIV ((volatile unsigned short *)SPORT1_RCLKDIV) |
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| 282 | #define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV) |
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| 283 | #define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT) |
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| 284 | #define pSPORT1_CHNL ((volatile unsigned short *)SPORT1_CHNL) |
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| 285 | #define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1) |
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| 286 | #define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2) |
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| 287 | #define pSPORT1_MTCS0 ((volatile unsigned long *)SPORT1_MTCS0) |
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| 288 | #define pSPORT1_MTCS1 ((volatile unsigned long *)SPORT1_MTCS1) |
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| 289 | #define pSPORT1_MTCS2 ((volatile unsigned long *)SPORT1_MTCS2) |
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| 290 | #define pSPORT1_MTCS3 ((volatile unsigned long *)SPORT1_MTCS3) |
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| 291 | #define pSPORT1_MRCS0 ((volatile unsigned long *)SPORT1_MRCS0) |
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| 292 | #define pSPORT1_MRCS1 ((volatile unsigned long *)SPORT1_MRCS1) |
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| 293 | #define pSPORT1_MRCS2 ((volatile unsigned long *)SPORT1_MRCS2) |
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| 294 | #define pSPORT1_MRCS3 ((volatile unsigned long *)SPORT1_MRCS3) |
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| 295 | /* Asynchronous Memory Controller - External Bus Interface Unit */ |
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| 296 | #define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL) |
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| 297 | #define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0) |
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| 298 | #define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1) |
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| 299 | /* SDRAM Controller External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */ |
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| 300 | #define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL) |
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| 301 | #define pEBIU_SDBCTL ((volatile unsigned long *)EBIU_SDBCTL) |
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| 302 | #define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC) |
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| 303 | #define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT) |
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| 304 | /* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0 10FF) */ |
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| 305 | #define pPPI0_CONTROL ((volatile unsigned short *)PPI0_CONTROL) |
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| 306 | #define pPPI0_STATUS ((volatile unsigned short *)PPI0_STATUS) |
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| 307 | #define pPPI0_COUNT ((volatile unsigned short *)PPI0_COUNT) |
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| 308 | #define pPPI0_DELAY ((volatile unsigned short *)PPI0_DELAY) |
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| 309 | #define pPPI0_FRAME ((volatile unsigned short *)PPI0_FRAME) |
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| 310 | /* Parallel Peripheral Interface (PPI) 1 registers (0xFFC0 1300-0xFFC0 13FF) */ |
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| 311 | #define pPPI1_CONTROL ((volatile unsigned short *)PPI1_CONTROL) |
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| 312 | #define pPPI1_STATUS ((volatile unsigned short *)PPI1_STATUS) |
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| 313 | #define pPPI1_COUNT ((volatile unsigned short *)PPI1_COUNT) |
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| 314 | #define pPPI1_DELAY ((volatile unsigned short *)PPI1_DELAY) |
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| 315 | #define pPPI1_FRAME ((volatile unsigned short *)PPI1_FRAME) |
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| 316 | /*DMA traffic control registers */ |
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| 317 | #define pDMA1_TC_PER ((volatile unsigned short *)DMA1_TC_PER) |
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| 318 | #define pDMA1_TC_CNT ((volatile unsigned short *)DMA1_TC_CNT) |
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| 319 | #define pDMA2_TC_PER ((volatile unsigned short *)DMA2_TC_PER) |
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| 320 | #define pDMA2_TC_CNT ((volatile unsigned short *)DMA2_TC_CNT) |
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| 321 | /* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */ |
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| 322 | #define pDMA1_0_CONFIG ((volatile unsigned short *)DMA1_0_CONFIG) |
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| 323 | #define pDMA1_0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_0_NEXT_DESC_PTR) |
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| 324 | #define pDMA1_0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_0_START_ADDR) |
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| 325 | #define pDMA1_0_X_COUNT ((volatile unsigned short *)DMA1_0_X_COUNT) |
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| 326 | #define pDMA1_0_Y_COUNT ((volatile unsigned short *)DMA1_0_Y_COUNT) |
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| 327 | #define pDMA1_0_X_MODIFY (volatile signed short *)DMA1_0_X_MODIFY |
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| 328 | #define pDMA1_0_Y_MODIFY (volatile signed short *)DMA1_0_Y_MODIFY |
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| 329 | #define pDMA1_0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_0_CURR_DESC_PTR) |
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| 330 | #define pDMA1_0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_0_CURR_ADDR) |
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| 331 | #define pDMA1_0_CURR_X_COUNT ((volatile unsigned short *)DMA1_0_CURR_X_COUNT) |
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| 332 | #define pDMA1_0_CURR_Y_COUNT ((volatile unsigned short *)DMA1_0_CURR_Y_COUNT) |
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| 333 | #define pDMA1_0_IRQ_STATUS ((volatile unsigned short *)DMA1_0_IRQ_STATUS) |
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| 334 | #define pDMA1_0_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_0_PERIPHERAL_MAP) |
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| 335 | #define pDMA1_1_CONFIG ((volatile unsigned short *)DMA1_1_CONFIG) |
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| 336 | #define pDMA1_1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_1_NEXT_DESC_PTR) |
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| 337 | #define pDMA1_1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_1_START_ADDR) |
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| 338 | #define pDMA1_1_X_COUNT ((volatile unsigned short *)DMA1_1_X_COUNT) |
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| 339 | #define pDMA1_1_Y_COUNT ((volatile unsigned short *)DMA1_1_Y_COUNT) |
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| 340 | #define pDMA1_1_X_MODIFY (volatile signed short *)DMA1_1_X_MODIFY |
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| 341 | #define pDMA1_1_Y_MODIFY (volatile signed short *)DMA1_1_Y_MODIFY |
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| 342 | #define pDMA1_1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_1_CURR_DESC_PTR) |
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| 343 | #define pDMA1_1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_1_CURR_ADDR) |
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| 344 | #define pDMA1_1_CURR_X_COUNT ((volatile unsigned short *)DMA1_1_CURR_X_COUNT) |
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| 345 | #define pDMA1_1_CURR_Y_COUNT ((volatile unsigned short *)DMA1_1_CURR_Y_COUNT) |
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| 346 | #define pDMA1_1_IRQ_STATUS ((volatile unsigned short *)DMA1_1_IRQ_STATUS) |
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| 347 | #define pDMA1_1_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_1_PERIPHERAL_MAP) |
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| 348 | #define pDMA1_2_CONFIG ((volatile unsigned short *)DMA1_2_CONFIG) |
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| 349 | #define pDMA1_2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_2_NEXT_DESC_PTR) |
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| 350 | #define pDMA1_2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_2_START_ADDR) |
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| 351 | #define pDMA1_2_X_COUNT ((volatile unsigned short *)DMA1_2_X_COUNT) |
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| 352 | #define pDMA1_2_Y_COUNT ((volatile unsigned short *)DMA1_2_Y_COUNT) |
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| 353 | #define pDMA1_2_X_MODIFY (volatile signed short *)DMA1_2_X_MODIFY |
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| 354 | #define pDMA1_2_Y_MODIFY (volatile signed short *)DMA1_2_Y_MODIFY |
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| 355 | #define pDMA1_2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_2_CURR_DESC_PTR) |
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| 356 | #define pDMA1_2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_2_CURR_ADDR) |
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| 357 | #define pDMA1_2_CURR_X_COUNT ((volatile unsigned short *)DMA1_2_CURR_X_COUNT) |
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| 358 | #define pDMA1_2_CURR_Y_COUNT ((volatile unsigned short *)DMA1_2_CURR_Y_COUNT) |
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| 359 | #define pDMA1_2_IRQ_STATUS ((volatile unsigned short *)DMA1_2_IRQ_STATUS) |
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| 360 | #define pDMA1_2_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_2_PERIPHERAL_MAP) |
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| 361 | #define pDMA1_3_CONFIG ((volatile unsigned short *)DMA1_3_CONFIG) |
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| 362 | #define pDMA1_3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_3_NEXT_DESC_PTR) |
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| 363 | #define pDMA1_3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_3_START_ADDR) |
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| 364 | #define pDMA1_3_X_COUNT ((volatile unsigned short *)DMA1_3_X_COUNT) |
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| 365 | #define pDMA1_3_Y_COUNT ((volatile unsigned short *)DMA1_3_Y_COUNT) |
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| 366 | #define pDMA1_3_X_MODIFY (volatile signed short *)DMA1_3_X_MODIFY |
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| 367 | #define pDMA1_3_Y_MODIFY (volatile signed short *)DMA1_3_Y_MODIFY |
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| 368 | #define pDMA1_3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_3_CURR_DESC_PTR) |
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| 369 | #define pDMA1_3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_3_CURR_ADDR) |
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| 370 | #define pDMA1_3_CURR_X_COUNT ((volatile unsigned short *)DMA1_3_CURR_X_COUNT) |
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| 371 | #define pDMA1_3_CURR_Y_COUNT ((volatile unsigned short *)DMA1_3_CURR_Y_COUNT) |
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| 372 | #define pDMA1_3_IRQ_STATUS ((volatile unsigned short *)DMA1_3_IRQ_STATUS) |
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| 373 | #define pDMA1_3_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_3_PERIPHERAL_MAP) |
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| 374 | #define pDMA1_4_CONFIG ((volatile unsigned short *)DMA1_4_CONFIG) |
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| 375 | #define pDMA1_4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_4_NEXT_DESC_PTR) |
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| 376 | #define pDMA1_4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_4_START_ADDR) |
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| 377 | #define pDMA1_4_X_COUNT ((volatile unsigned short *)DMA1_4_X_COUNT) |
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| 378 | #define pDMA1_4_Y_COUNT ((volatile unsigned short *)DMA1_4_Y_COUNT) |
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| 379 | #define pDMA1_4_X_MODIFY (volatile signed short *)DMA1_4_X_MODIFY |
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| 380 | #define pDMA1_4_Y_MODIFY (volatile signed short *)DMA1_4_Y_MODIFY |
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| 381 | #define pDMA1_4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_4_CURR_DESC_PTR) |
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| 382 | #define pDMA1_4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_4_CURR_ADDR) |
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| 383 | #define pDMA1_4_CURR_X_COUNT ((volatile unsigned short *)DMA1_4_CURR_X_COUNT) |
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| 384 | #define pDMA1_4_CURR_Y_COUNT ((volatile unsigned short *)DMA1_4_CURR_Y_COUNT) |
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| 385 | #define pDMA1_4_IRQ_STATUS ((volatile unsigned short *)DMA1_4_IRQ_STATUS) |
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| 386 | #define pDMA1_4_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_4_PERIPHERAL_MAP) |
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| 387 | #define pDMA1_5_CONFIG ((volatile unsigned short *)DMA1_5_CONFIG) |
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| 388 | #define pDMA1_5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_5_NEXT_DESC_PTR) |
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| 389 | #define pDMA1_5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_5_START_ADDR) |
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| 390 | #define pDMA1_5_X_COUNT ((volatile unsigned short *)DMA1_5_X_COUNT) |
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| 391 | #define pDMA1_5_Y_COUNT ((volatile unsigned short *)DMA1_5_Y_COUNT) |
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| 392 | #define pDMA1_5_X_MODIFY (volatile signed short *)DMA1_5_X_MODIFY |
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| 393 | #define pDMA1_5_Y_MODIFY (volatile signed short *)DMA1_5_Y_MODIFY |
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| 394 | #define pDMA1_5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_5_CURR_DESC_PTR) |
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| 395 | #define pDMA1_5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_5_CURR_ADDR) |
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| 396 | #define pDMA1_5_CURR_X_COUNT ((volatile unsigned short *)DMA1_5_CURR_X_COUNT) |
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| 397 | #define pDMA1_5_CURR_Y_COUNT ((volatile unsigned short *)DMA1_5_CURR_Y_COUNT) |
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| 398 | #define pDMA1_5_IRQ_STATUS ((volatile unsigned short *)DMA1_5_IRQ_STATUS) |
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| 399 | #define pDMA1_5_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_5_PERIPHERAL_MAP) |
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| 400 | #define pDMA1_6_CONFIG ((volatile unsigned short *)DMA1_6_CONFIG) |
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| 401 | #define pDMA1_6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_6_NEXT_DESC_PTR) |
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| 402 | #define pDMA1_6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_6_START_ADDR) |
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| 403 | #define pDMA1_6_X_COUNT ((volatile unsigned short *)DMA1_6_X_COUNT) |
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| 404 | #define pDMA1_6_Y_COUNT ((volatile unsigned short *)DMA1_6_Y_COUNT) |
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| 405 | #define pDMA1_6_X_MODIFY (volatile signed short *)DMA1_6_X_MODIFY |
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| 406 | #define pDMA1_6_Y_MODIFY (volatile signed short *)DMA1_6_Y_MODIFY |
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| 407 | #define pDMA1_6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_6_CURR_DESC_PTR) |
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| 408 | #define pDMA1_6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_6_CURR_ADDR) |
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| 409 | #define pDMA1_6_CURR_X_COUNT ((volatile unsigned short *)DMA1_6_CURR_X_COUNT) |
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| 410 | #define pDMA1_6_CURR_Y_COUNT ((volatile unsigned short *)DMA1_6_CURR_Y_COUNT) |
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| 411 | #define pDMA1_6_IRQ_STATUS ((volatile unsigned short *)DMA1_6_IRQ_STATUS) |
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| 412 | #define pDMA1_6_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_6_PERIPHERAL_MAP) |
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| 413 | #define pDMA1_7_CONFIG ((volatile unsigned short *)DMA1_7_CONFIG) |
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| 414 | #define pDMA1_7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_7_NEXT_DESC_PTR) |
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| 415 | #define pDMA1_7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_7_START_ADDR) |
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| 416 | #define pDMA1_7_X_COUNT ((volatile unsigned short *)DMA1_7_X_COUNT) |
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| 417 | #define pDMA1_7_Y_COUNT ((volatile unsigned short *)DMA1_7_Y_COUNT) |
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| 418 | #define pDMA1_7_X_MODIFY (volatile signed short *)DMA1_7_X_MODIFY |
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| 419 | #define pDMA1_7_Y_MODIFY (volatile signed short *)DMA1_7_Y_MODIFY |
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| 420 | #define pDMA1_7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_7_CURR_DESC_PTR) |
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| 421 | #define pDMA1_7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_7_CURR_ADDR) |
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| 422 | #define pDMA1_7_CURR_X_COUNT ((volatile unsigned short *)DMA1_7_CURR_X_COUNT) |
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| 423 | #define pDMA1_7_CURR_Y_COUNT ((volatile unsigned short *)DMA1_7_CURR_Y_COUNT) |
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| 424 | #define pDMA1_7_IRQ_STATUS ((volatile unsigned short *)DMA1_7_IRQ_STATUS) |
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| 425 | #define pDMA1_7_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_7_PERIPHERAL_MAP) |
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| 426 | #define pDMA1_8_CONFIG ((volatile unsigned short *)DMA1_8_CONFIG) |
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| 427 | #define pDMA1_8_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_8_NEXT_DESC_PTR) |
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| 428 | #define pDMA1_8_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_8_START_ADDR) |
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| 429 | #define pDMA1_8_X_COUNT ((volatile unsigned short *)DMA1_8_X_COUNT) |
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| 430 | #define pDMA1_8_Y_COUNT ((volatile unsigned short *)DMA1_8_Y_COUNT) |
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| 431 | #define pDMA1_8_X_MODIFY (volatile signed short *)DMA1_8_X_MODIFY |
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| 432 | #define pDMA1_8_Y_MODIFY (volatile signed short *)DMA1_8_Y_MODIFY |
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| 433 | #define pDMA1_8_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_8_CURR_DESC_PTR) |
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| 434 | #define pDMA1_8_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_8_CURR_ADDR) |
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| 435 | #define pDMA1_8_CURR_X_COUNT ((volatile unsigned short *)DMA1_8_CURR_X_COUNT) |
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| 436 | #define pDMA1_8_CURR_Y_COUNT ((volatile unsigned short *)DMA1_8_CURR_Y_COUNT) |
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| 437 | #define pDMA1_8_IRQ_STATUS ((volatile unsigned short *)DMA1_8_IRQ_STATUS) |
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| 438 | #define pDMA1_8_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_8_PERIPHERAL_MAP) |
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| 439 | #define pDMA1_9_CONFIG ((volatile unsigned short *)DMA1_9_CONFIG) |
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| 440 | #define pDMA1_9_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_9_NEXT_DESC_PTR) |
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| 441 | #define pDMA1_9_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_9_START_ADDR) |
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| 442 | #define pDMA1_9_X_COUNT ((volatile unsigned short *)DMA1_9_X_COUNT) |
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| 443 | #define pDMA1_9_Y_COUNT ((volatile unsigned short *)DMA1_9_Y_COUNT) |
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| 444 | #define pDMA1_9_X_MODIFY (volatile signed short *)DMA1_9_X_MODIFY |
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| 445 | #define pDMA1_9_Y_MODIFY (volatile signed short *)DMA1_9_Y_MODIFY |
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| 446 | #define pDMA1_9_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_9_CURR_DESC_PTR) |
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| 447 | #define pDMA1_9_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_9_CURR_ADDR) |
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| 448 | #define pDMA1_9_CURR_X_COUNT ((volatile unsigned short *)DMA1_9_CURR_X_COUNT) |
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| 449 | #define pDMA1_9_CURR_Y_COUNT ((volatile unsigned short *)DMA1_9_CURR_Y_COUNT) |
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| 450 | #define pDMA1_9_IRQ_STATUS ((volatile unsigned short *)DMA1_9_IRQ_STATUS) |
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| 451 | #define pDMA1_9_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_9_PERIPHERAL_MAP) |
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| 452 | #define pDMA1_10_CONFIG ((volatile unsigned short *)DMA1_10_CONFIG) |
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| 453 | #define pDMA1_10_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_10_NEXT_DESC_PTR) |
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| 454 | #define pDMA1_10_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_10_START_ADDR) |
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| 455 | #define pDMA1_10_X_COUNT ((volatile unsigned short *)DMA1_10_X_COUNT) |
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| 456 | #define pDMA1_10_Y_COUNT ((volatile unsigned short *)DMA1_10_Y_COUNT) |
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| 457 | #define pDMA1_10_X_MODIFY (volatile signed short *)DMA1_10_X_MODIFY |
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| 458 | #define pDMA1_10_Y_MODIFY (volatile signed short *)DMA1_10_Y_MODIFY |
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| 459 | #define pDMA1_10_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_10_CURR_DESC_PTR) |
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| 460 | #define pDMA1_10_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_10_CURR_ADDR) |
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| 461 | #define pDMA1_10_CURR_X_COUNT ((volatile unsigned short *)DMA1_10_CURR_X_COUNT) |
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| 462 | #define pDMA1_10_CURR_Y_COUNT ((volatile unsigned short *)DMA1_10_CURR_Y_COUNT) |
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| 463 | #define pDMA1_10_IRQ_STATUS ((volatile unsigned short *)DMA1_10_IRQ_STATUS) |
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| 464 | #define pDMA1_10_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_10_PERIPHERAL_MAP) |
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| 465 | #define pDMA1_11_CONFIG ((volatile unsigned short *)DMA1_11_CONFIG) |
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| 466 | #define pDMA1_11_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_11_NEXT_DESC_PTR) |
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| 467 | #define pDMA1_11_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_11_START_ADDR) |
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| 468 | #define pDMA1_11_X_COUNT ((volatile unsigned short *)DMA1_11_X_COUNT) |
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| 469 | #define pDMA1_11_Y_COUNT ((volatile unsigned short *)DMA1_11_Y_COUNT) |
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| 470 | #define pDMA1_11_X_MODIFY (volatile signed short *)DMA1_11_X_MODIFY |
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| 471 | #define pDMA1_11_Y_MODIFY (volatile signed short *)DMA1_11_Y_MODIFY |
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| 472 | #define pDMA1_11_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_11_CURR_DESC_PTR) |
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| 473 | #define pDMA1_11_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_11_CURR_ADDR) |
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| 474 | #define pDMA1_11_CURR_X_COUNT ((volatile unsigned short *)DMA1_11_CURR_X_COUNT) |
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| 475 | #define pDMA1_11_CURR_Y_COUNT ((volatile unsigned short *)DMA1_11_CURR_Y_COUNT) |
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| 476 | #define pDMA1_11_IRQ_STATUS ((volatile unsigned short *)DMA1_11_IRQ_STATUS) |
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| 477 | #define pDMA1_11_PERIPHERAL_MAP ((volatile unsigned short *)DMA1_11_PERIPHERAL_MAP) |
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| 478 | /* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */ |
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| 479 | #define pMDMA1_D0_CONFIG ((volatile unsigned short *)MDMA1_D0_CONFIG) |
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| 480 | #define pMDMA1_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_NEXT_DESC_PTR) |
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| 481 | #define pMDMA1_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_START_ADDR) |
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| 482 | #define pMDMA1_D0_X_COUNT ((volatile unsigned short *)MDMA1_D0_X_COUNT) |
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| 483 | #define pMDMA1_D0_Y_COUNT ((volatile unsigned short *)MDMA1_D0_Y_COUNT) |
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| 484 | #define pMDMA1_D0_X_MODIFY (volatile signed short *)MDMA1_D0_X_MODIFY |
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| 485 | #define pMDMA1_D0_Y_MODIFY (volatile signed short *)MDMA1_D0_Y_MODIFY |
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| 486 | #define pMDMA1_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_DESC_PTR) |
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| 487 | #define pMDMA1_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_ADDR) |
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| 488 | #define pMDMA1_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA1_D0_CURR_X_COUNT ) |
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| 489 | #define pMDMA1_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_D0_CURR_Y_COUNT) |
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| 490 | #define pMDMA1_D0_IRQ_STATUS ((volatile unsigned short *)MDMA1_D0_IRQ_STATUS) |
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| 491 | #define pMDMA1_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_D0_PERIPHERAL_MAP) |
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| 492 | #define pMDMA1_S0_CONFIG ((volatile unsigned short *)MDMA1_S0_CONFIG) |
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| 493 | #define pMDMA1_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_NEXT_DESC_PTR) |
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| 494 | #define pMDMA1_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_START_ADDR) |
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| 495 | #define pMDMA1_S0_X_COUNT ((volatile unsigned short *)MDMA1_S0_X_COUNT) |
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| 496 | #define pMDMA1_S0_Y_COUNT ((volatile unsigned short *)MDMA1_S0_Y_COUNT) |
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| 497 | #define pMDMA1_S0_X_MODIFY (volatile signed short *)MDMA1_S0_X_MODIFY |
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| 498 | #define pMDMA1_S0_Y_MODIFY (volatile signed short *)MDMA1_S0_Y_MODIFY |
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| 499 | #define pMDMA1_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_DESC_PTR) |
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| 500 | #define pMDMA1_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_ADDR) |
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| 501 | #define pMDMA1_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA1_S0_CURR_X_COUNT) |
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| 502 | #define pMDMA1_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_S0_CURR_Y_COUNT) |
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| 503 | #define pMDMA1_S0_IRQ_STATUS ((volatile unsigned short *)MDMA1_S0_IRQ_STATUS) |
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| 504 | #define pMDMA1_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_S0_PERIPHERAL_MAP) |
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| 505 | #define pMDMA1_D1_CONFIG ((volatile unsigned short *)MDMA1_D1_CONFIG) |
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| 506 | #define pMDMA1_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_NEXT_DESC_PTR) |
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| 507 | #define pMDMA1_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_START_ADDR) |
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| 508 | #define pMDMA1_D1_X_COUNT ((volatile unsigned short *)MDMA1_D1_X_COUNT) |
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| 509 | #define pMDMA1_D1_Y_COUNT ((volatile unsigned short *)MDMA1_D1_Y_COUNT) |
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| 510 | #define pMDMA1_D1_X_MODIFY (volatile signed short *)MDMA1_D1_X_MODIFY |
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| 511 | #define pMDMA1_D1_Y_MODIFY (volatile signed short *)MDMA1_D1_Y_MODIFY |
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| 512 | #define pMDMA1_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_DESC_PTR) |
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| 513 | #define pMDMA1_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_ADDR) |
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| 514 | #define pMDMA1_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA1_D1_CURR_X_COUNT) |
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| 515 | #define pMDMA1_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_D1_CURR_Y_COUNT) |
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| 516 | #define pMDMA1_D1_IRQ_STATUS ((volatile unsigned short *)MDMA1_D1_IRQ_STATUS) |
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| 517 | #define pMDMA1_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_D1_PERIPHERAL_MAP) |
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| 518 | #define pMDMA1_S1_CONFIG ((volatile unsigned short *)MDMA1_S1_CONFIG) |
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| 519 | #define pMDMA1_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_NEXT_DESC_PTR) |
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| 520 | #define pMDMA1_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_START_ADDR) |
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| 521 | #define pMDMA1_S1_X_COUNT ((volatile unsigned short *)MDMA1_S1_X_COUNT) |
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| 522 | #define pMDMA1_S1_Y_COUNT ((volatile unsigned short *)MDMA1_S1_Y_COUNT) |
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| 523 | #define pMDMA1_S1_X_MODIFY (volatile signed short *)MDMA1_S1_X_MODIFY |
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| 524 | #define pMDMA1_S1_Y_MODIFY (volatile signed short *)MDMA1_S1_Y_MODIFY |
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| 525 | #define pMDMA1_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_DESC_PTR) |
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| 526 | #define pMDMA1_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_ADDR) |
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| 527 | #define pMDMA1_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA1_S1_CURR_X_COUNT) |
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| 528 | #define pMDMA1_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA1_S1_CURR_Y_COUNT) |
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| 529 | #define pMDMA1_S1_IRQ_STATUS ((volatile unsigned short *)MDMA1_S1_IRQ_STATUS) |
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| 530 | #define pMDMA1_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA1_S1_PERIPHERAL_MAP) |
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| 531 | /* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */ |
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| 532 | #define pDMA2_0_CONFIG ((volatile unsigned short *)DMA2_0_CONFIG) |
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| 533 | #define pDMA2_0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_0_NEXT_DESC_PTR) |
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| 534 | #define pDMA2_0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_0_START_ADDR) |
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| 535 | #define pDMA2_0_X_COUNT ((volatile unsigned short *)DMA2_0_X_COUNT) |
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| 536 | #define pDMA2_0_Y_COUNT ((volatile unsigned short *)DMA2_0_Y_COUNT) |
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| 537 | #define pDMA2_0_X_MODIFY (volatile signed short *)DMA2_0_X_MODIFY |
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| 538 | #define pDMA2_0_Y_MODIFY (volatile signed short *)DMA2_0_Y_MODIFY |
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| 539 | #define pDMA2_0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_0_CURR_DESC_PTR) |
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| 540 | #define pDMA2_0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_0_CURR_ADDR) |
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| 541 | #define pDMA2_0_CURR_X_COUNT ((volatile unsigned short *)DMA2_0_CURR_X_COUNT) |
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| 542 | #define pDMA2_0_CURR_Y_COUNT ((volatile unsigned short *)DMA2_0_CURR_Y_COUNT) |
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| 543 | #define pDMA2_0_IRQ_STATUS ((volatile unsigned short *)DMA2_0_IRQ_STATUS) |
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| 544 | #define pDMA2_0_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_0_PERIPHERAL_MAP) |
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| 545 | #define pDMA2_1_CONFIG ((volatile unsigned short *)DMA2_1_CONFIG) |
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| 546 | #define pDMA2_1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_1_NEXT_DESC_PTR) |
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| 547 | #define pDMA2_1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_1_START_ADDR) |
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| 548 | #define pDMA2_1_X_COUNT ((volatile unsigned short *)DMA2_1_X_COUNT) |
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| 549 | #define pDMA2_1_Y_COUNT ((volatile unsigned short *)DMA2_1_Y_COUNT) |
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| 550 | #define pDMA2_1_X_MODIFY (volatile signed short *)DMA2_1_X_MODIFY |
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| 551 | #define pDMA2_1_Y_MODIFY (volatile signed short *)DMA2_1_Y_MODIFY |
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| 552 | #define pDMA2_1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_1_CURR_DESC_PTR) |
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| 553 | #define pDMA2_1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_1_CURR_ADDR) |
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| 554 | #define pDMA2_1_CURR_X_COUNT ((volatile unsigned short *)DMA2_1_CURR_X_COUNT) |
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| 555 | #define pDMA2_1_CURR_Y_COUNT ((volatile unsigned short *)DMA2_1_CURR_Y_COUNT) |
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| 556 | #define pDMA2_1_IRQ_STATUS ((volatile unsigned short *)DMA2_1_IRQ_STATUS) |
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| 557 | #define pDMA2_1_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_1_PERIPHERAL_MAP) |
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| 558 | #define pDMA2_2_CONFIG ((volatile unsigned short *)DMA2_2_CONFIG) |
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| 559 | #define pDMA2_2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_2_NEXT_DESC_PTR) |
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| 560 | #define pDMA2_2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_2_START_ADDR) |
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| 561 | #define pDMA2_2_X_COUNT ((volatile unsigned short *)DMA2_2_X_COUNT) |
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| 562 | #define pDMA2_2_Y_COUNT ((volatile unsigned short *)DMA2_2_Y_COUNT) |
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| 563 | #define pDMA2_2_X_MODIFY (volatile signed short *)DMA2_2_X_MODIFY |
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| 564 | #define pDMA2_2_Y_MODIFY (volatile signed short *)DMA2_2_Y_MODIFY |
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| 565 | #define pDMA2_2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_2_CURR_DESC_PTR) |
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| 566 | #define pDMA2_2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_2_CURR_ADDR) |
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| 567 | #define pDMA2_2_CURR_X_COUNT ((volatile unsigned short *)DMA2_2_CURR_X_COUNT) |
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| 568 | #define pDMA2_2_CURR_Y_COUNT ((volatile unsigned short *)DMA2_2_CURR_Y_COUNT) |
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| 569 | #define pDMA2_2_IRQ_STATUS ((volatile unsigned short *)DMA2_2_IRQ_STATUS) |
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| 570 | #define pDMA2_2_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_2_PERIPHERAL_MAP) |
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| 571 | #define pDMA2_3_CONFIG ((volatile unsigned short *)DMA2_3_CONFIG) |
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| 572 | #define pDMA2_3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_3_NEXT_DESC_PTR) |
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| 573 | #define pDMA2_3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_3_START_ADDR) |
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| 574 | #define pDMA2_3_X_COUNT ((volatile unsigned short *)DMA2_3_X_COUNT) |
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| 575 | #define pDMA2_3_Y_COUNT ((volatile unsigned short *)DMA2_3_Y_COUNT) |
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| 576 | #define pDMA2_3_X_MODIFY (volatile signed short *)DMA2_3_X_MODIFY |
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| 577 | #define pDMA2_3_Y_MODIFY (volatile signed short *)DMA2_3_Y_MODIFY |
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| 578 | #define pDMA2_3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_3_CURR_DESC_PTR) |
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| 579 | #define pDMA2_3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_3_CURR_ADDR) |
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| 580 | #define pDMA2_3_CURR_X_COUNT ((volatile unsigned short *)DMA2_3_CURR_X_COUNT) |
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| 581 | #define pDMA2_3_CURR_Y_COUNT ((volatile unsigned short *)DMA2_3_CURR_Y_COUNT) |
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| 582 | #define pDMA2_3_IRQ_STATUS ((volatile unsigned short *)DMA2_3_IRQ_STATUS) |
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| 583 | #define pDMA2_3_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_3_PERIPHERAL_MAP) |
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| 584 | #define pDMA2_4_CONFIG ((volatile unsigned short *)DMA2_4_CONFIG) |
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| 585 | #define pDMA2_4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_4_NEXT_DESC_PTR) |
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| 586 | #define pDMA2_4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_4_START_ADDR) |
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| 587 | #define pDMA2_4_X_COUNT ((volatile unsigned short *)DMA2_4_X_COUNT) |
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| 588 | #define pDMA2_4_Y_COUNT ((volatile unsigned short *)DMA2_4_Y_COUNT) |
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| 589 | #define pDMA2_4_X_MODIFY (volatile signed short *)DMA2_4_X_MODIFY |
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| 590 | #define pDMA2_4_Y_MODIFY (volatile signed short *)DMA2_4_Y_MODIFY |
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| 591 | #define pDMA2_4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_4_CURR_DESC_PTR) |
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| 592 | #define pDMA2_4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_4_CURR_ADDR) |
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| 593 | #define pDMA2_4_CURR_X_COUNT ((volatile unsigned short *)DMA2_4_CURR_X_COUNT) |
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| 594 | #define pDMA2_4_CURR_Y_COUNT ((volatile unsigned short *)DMA2_4_CURR_Y_COUNT) |
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| 595 | #define pDMA2_4_IRQ_STATUS ((volatile unsigned short *)DMA2_4_IRQ_STATUS) |
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| 596 | #define pDMA2_4_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_4_PERIPHERAL_MAP) |
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| 597 | #define pDMA2_5_CONFIG ((volatile unsigned short *)DMA2_5_CONFIG) |
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| 598 | #define pDMA2_5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_5_NEXT_DESC_PTR) |
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| 599 | #define pDMA2_5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_5_START_ADDR) |
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| 600 | #define pDMA2_5_X_COUNT ((volatile unsigned short *)DMA2_5_X_COUNT) |
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| 601 | #define pDMA2_5_Y_COUNT ((volatile unsigned short *)DMA2_5_Y_COUNT) |
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| 602 | #define pDMA2_5_X_MODIFY (volatile signed short *)DMA2_5_X_MODIFY |
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| 603 | #define pDMA2_5_Y_MODIFY (volatile signed short *)DMA2_5_Y_MODIFY |
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| 604 | #define pDMA2_5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_5_CURR_DESC_PTR) |
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| 605 | #define pDMA2_5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_5_CURR_ADDR) |
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| 606 | #define pDMA2_5_CURR_X_COUNT ((volatile unsigned short *)DMA2_5_CURR_X_COUNT) |
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| 607 | #define pDMA2_5_CURR_Y_COUNT ((volatile unsigned short *)DMA2_5_CURR_Y_COUNT) |
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| 608 | #define pDMA2_5_IRQ_STATUS ((volatile unsigned short *)DMA2_5_IRQ_STATUS) |
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| 609 | #define pDMA2_5_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_5_PERIPHERAL_MAP) |
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| 610 | #define pDMA2_6_CONFIG ((volatile unsigned short *)DMA2_6_CONFIG) |
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| 611 | #define pDMA2_6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_6_NEXT_DESC_PTR) |
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| 612 | #define pDMA2_6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_6_START_ADDR) |
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| 613 | #define pDMA2_6_X_COUNT ((volatile unsigned short *)DMA2_6_X_COUNT) |
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| 614 | #define pDMA2_6_Y_COUNT ((volatile unsigned short *)DMA2_6_Y_COUNT) |
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| 615 | #define pDMA2_6_X_MODIFY (volatile signed short *)DMA2_6_X_MODIFY |
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| 616 | #define pDMA2_6_Y_MODIFY (volatile signed short *)DMA2_6_Y_MODIFY |
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| 617 | #define pDMA2_6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_6_CURR_DESC_PTR) |
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| 618 | #define pDMA2_6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_6_CURR_ADDR) |
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| 619 | #define pDMA2_6_CURR_X_COUNT ((volatile unsigned short *)DMA2_6_CURR_X_COUNT) |
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| 620 | #define pDMA2_6_CURR_Y_COUNT ((volatile unsigned short *)DMA2_6_CURR_Y_COUNT) |
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| 621 | #define pDMA2_6_IRQ_STATUS ((volatile unsigned short *)DMA2_6_IRQ_STATUS) |
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| 622 | #define pDMA2_6_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_6_PERIPHERAL_MAP) |
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| 623 | #define pDMA2_7_CONFIG ((volatile unsigned short *)DMA2_7_CONFIG) |
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| 624 | #define pDMA2_7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_7_NEXT_DESC_PTR) |
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| 625 | #define pDMA2_7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_7_START_ADDR) |
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| 626 | #define pDMA2_7_X_COUNT ((volatile unsigned short *)DMA2_7_X_COUNT) |
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| 627 | #define pDMA2_7_Y_COUNT ((volatile unsigned short *)DMA2_7_Y_COUNT) |
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| 628 | #define pDMA2_7_X_MODIFY (volatile signed short *)DMA2_7_X_MODIFY |
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| 629 | #define pDMA2_7_Y_MODIFY (volatile signed short *)DMA2_7_Y_MODIFY |
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| 630 | #define pDMA2_7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_7_CURR_DESC_PTR) |
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| 631 | #define pDMA2_7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_7_CURR_ADDR) |
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| 632 | #define pDMA2_7_CURR_X_COUNT ((volatile unsigned short *)DMA2_7_CURR_X_COUNT) |
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| 633 | #define pDMA2_7_CURR_Y_COUNT ((volatile unsigned short *)DMA2_7_CURR_Y_COUNT) |
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| 634 | #define pDMA2_7_IRQ_STATUS ((volatile unsigned short *)DMA2_7_IRQ_STATUS) |
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| 635 | #define pDMA2_7_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_7_PERIPHERAL_MAP) |
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| 636 | #define pDMA2_8_CONFIG ((volatile unsigned short *)DMA2_8_CONFIG) |
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| 637 | #define pDMA2_8_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_8_NEXT_DESC_PTR) |
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| 638 | #define pDMA2_8_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_8_START_ADDR) |
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| 639 | #define pDMA2_8_X_COUNT ((volatile unsigned short *)DMA2_8_X_COUNT) |
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| 640 | #define pDMA2_8_Y_COUNT ((volatile unsigned short *)DMA2_8_Y_COUNT) |
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| 641 | #define pDMA2_8_X_MODIFY (volatile signed short *)DMA2_8_X_MODIFY |
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| 642 | #define pDMA2_8_Y_MODIFY (volatile signed short *)DMA2_8_Y_MODIFY |
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| 643 | #define pDMA2_8_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_8_CURR_DESC_PTR) |
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| 644 | #define pDMA2_8_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_8_CURR_ADDR) |
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| 645 | #define pDMA2_8_CURR_X_COUNT ((volatile unsigned short *)DMA2_8_CURR_X_COUNT) |
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| 646 | #define pDMA2_8_CURR_Y_COUNT ((volatile unsigned short *)DMA2_8_CURR_Y_COUNT) |
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| 647 | #define pDMA2_8_IRQ_STATUS ((volatile unsigned short *)DMA2_8_IRQ_STATUS) |
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| 648 | #define pDMA2_8_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_8_PERIPHERAL_MAP) |
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| 649 | #define pDMA2_9_CONFIG ((volatile unsigned short *)DMA2_9_CONFIG) |
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| 650 | #define pDMA2_9_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_9_NEXT_DESC_PTR) |
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| 651 | #define pDMA2_9_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_9_START_ADDR) |
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| 652 | #define pDMA2_9_X_COUNT ((volatile unsigned short *)DMA2_9_X_COUNT) |
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| 653 | #define pDMA2_9_Y_COUNT ((volatile unsigned short *)DMA2_9_Y_COUNT) |
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| 654 | #define pDMA2_9_X_MODIFY (volatile signed short *)DMA2_9_X_MODIFY |
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| 655 | #define pDMA2_9_Y_MODIFY (volatile signed short *)DMA2_9_Y_MODIFY |
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| 656 | #define pDMA2_9_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_9_CURR_DESC_PTR) |
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| 657 | #define pDMA2_9_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_9_CURR_ADDR) |
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| 658 | #define pDMA2_9_CURR_X_COUNT ((volatile unsigned short *)DMA2_9_CURR_X_COUNT) |
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| 659 | #define pDMA2_9_CURR_Y_COUNT ((volatile unsigned short *)DMA2_9_CURR_Y_COUNT) |
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| 660 | #define pDMA2_9_IRQ_STATUS ((volatile unsigned short *)DMA2_9_IRQ_STATUS) |
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| 661 | #define pDMA2_9_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_9_PERIPHERAL_MAP) |
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| 662 | #define pDMA2_10_CONFIG ((volatile unsigned short *)DMA2_10_CONFIG) |
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| 663 | #define pDMA2_10_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_10_NEXT_DESC_PTR) |
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| 664 | #define pDMA2_10_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_10_START_ADDR) |
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| 665 | #define pDMA2_10_X_COUNT ((volatile unsigned short *)DMA2_10_X_COUNT) |
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| 666 | #define pDMA2_10_Y_COUNT ((volatile unsigned short *)DMA2_10_Y_COUNT) |
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| 667 | #define pDMA2_10_X_MODIFY (volatile signed short *)DMA2_10_X_MODIFY |
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| 668 | #define pDMA2_10_Y_MODIFY (volatile signed short *)DMA2_10_Y_MODIFY |
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| 669 | #define pDMA2_10_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_10_CURR_DESC_PTR) |
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| 670 | #define pDMA2_10_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_10_CURR_ADDR) |
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| 671 | #define pDMA2_10_CURR_X_COUNT ((volatile unsigned short *)DMA2_10_CURR_X_COUNT) |
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| 672 | #define pDMA2_10_CURR_Y_COUNT ((volatile unsigned short *)DMA2_10_CURR_Y_COUNT) |
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| 673 | #define pDMA2_10_IRQ_STATUS ((volatile unsigned short *)DMA2_10_IRQ_STATUS) |
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| 674 | #define pDMA2_10_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_10_PERIPHERAL_MAP) |
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| 675 | #define pDMA2_11_CONFIG ((volatile unsigned short *)DMA2_11_CONFIG) |
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| 676 | #define pDMA2_11_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_11_NEXT_DESC_PTR) |
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| 677 | #define pDMA2_11_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_11_START_ADDR) |
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| 678 | #define pDMA2_11_X_COUNT ((volatile unsigned short *)DMA2_11_X_COUNT) |
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| 679 | #define pDMA2_11_Y_COUNT ((volatile unsigned short *)DMA2_11_Y_COUNT) |
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| 680 | #define pDMA2_11_X_MODIFY (volatile signed short *)DMA2_11_X_MODIFY |
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| 681 | #define pDMA2_11_Y_MODIFY (volatile signed short *)DMA2_11_Y_MODIFY |
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| 682 | #define pDMA2_11_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_11_CURR_DESC_PTR) |
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| 683 | #define pDMA2_11_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_11_CURR_ADDR) |
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| 684 | #define pDMA2_11_CURR_X_COUNT ((volatile unsigned short *)DMA2_11_CURR_X_COUNT) |
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| 685 | #define pDMA2_11_CURR_Y_COUNT ((volatile unsigned short *)DMA2_11_CURR_Y_COUNT) |
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| 686 | #define pDMA2_11_IRQ_STATUS ((volatile unsigned short *)DMA2_11_IRQ_STATUS) |
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| 687 | #define pDMA2_11_PERIPHERAL_MAP ((volatile unsigned short *)DMA2_11_PERIPHERAL_MAP) |
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| 688 | /* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */ |
|---|
| 689 | #define pMDMA2_D0_CONFIG ((volatile unsigned short *)MDMA2_D0_CONFIG) |
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| 690 | #define pMDMA2_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_NEXT_DESC_PTR) |
|---|
| 691 | #define pMDMA2_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_START_ADDR) |
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| 692 | #define pMDMA2_D0_X_COUNT ((volatile unsigned short *)MDMA2_D0_X_COUNT) |
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| 693 | #define pMDMA2_D0_Y_COUNT ((volatile unsigned short *)MDMA2_D0_Y_COUNT) |
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| 694 | #define pMDMA2_D0_X_MODIFY (volatile signed short *)MDMA2_D0_X_MODIFY |
|---|
| 695 | #define pMDMA2_D0_Y_MODIFY (volatile signed short *)MDMA2_D0_Y_MODIFY |
|---|
| 696 | #define pMDMA2_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_DESC_PTR) |
|---|
| 697 | #define pMDMA2_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_ADDR) |
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| 698 | #define pMDMA2_D0_CURR_X_COUNT ((volatile unsigned short *)MDMA2_D0_CURR_X_COUNT) |
|---|
| 699 | #define pMDMA2_D0_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_D0_CURR_Y_COUNT) |
|---|
| 700 | #define pMDMA2_D0_IRQ_STATUS ((volatile unsigned short *)MDMA2_D0_IRQ_STATUS) |
|---|
| 701 | #define pMDMA2_D0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_D0_PERIPHERAL_MAP) |
|---|
| 702 | #define pMDMA2_S0_CONFIG ((volatile unsigned short *)MDMA2_S0_CONFIG) |
|---|
| 703 | #define pMDMA2_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_NEXT_DESC_PTR) |
|---|
| 704 | #define pMDMA2_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_START_ADDR) |
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| 705 | #define pMDMA2_S0_X_COUNT ((volatile unsigned short *)MDMA2_S0_X_COUNT) |
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| 706 | #define pMDMA2_S0_Y_COUNT ((volatile unsigned short *)MDMA2_S0_Y_COUNT) |
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| 707 | #define pMDMA2_S0_X_MODIFY (volatile signed short *)MDMA2_S0_X_MODIFY |
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| 708 | #define pMDMA2_S0_Y_MODIFY (volatile signed short *)MDMA2_S0_Y_MODIFY |
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| 709 | #define pMDMA2_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_DESC_PTR) |
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| 710 | #define pMDMA2_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_ADDR) |
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| 711 | #define pMDMA2_S0_CURR_X_COUNT ((volatile unsigned short *)MDMA2_S0_CURR_X_COUNT) |
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| 712 | #define pMDMA2_S0_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_S0_CURR_Y_COUNT) |
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| 713 | #define pMDMA2_S0_IRQ_STATUS ((volatile unsigned short *)MDMA2_S0_IRQ_STATUS) |
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| 714 | #define pMDMA2_S0_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_S0_PERIPHERAL_MAP) |
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| 715 | #define pMDMA2_D1_CONFIG ((volatile unsigned short *)MDMA2_D1_CONFIG) |
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| 716 | #define pMDMA2_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_NEXT_DESC_PTR) |
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| 717 | #define pMDMA2_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_START_ADDR) |
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| 718 | #define pMDMA2_D1_X_COUNT ((volatile unsigned short *)MDMA2_D1_X_COUNT) |
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| 719 | #define pMDMA2_D1_Y_COUNT ((volatile unsigned short *)MDMA2_D1_Y_COUNT) |
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| 720 | #define pMDMA2_D1_X_MODIFY (volatile signed short *)MDMA2_D1_X_MODIFY |
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| 721 | #define pMDMA2_D1_Y_MODIFY (volatile signed short *)MDMA2_D1_Y_MODIFY |
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| 722 | #define pMDMA2_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_DESC_PTR) |
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| 723 | #define pMDMA2_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_ADDR) |
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| 724 | #define pMDMA2_D1_CURR_X_COUNT ((volatile unsigned short *)MDMA2_D1_CURR_X_COUNT) |
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| 725 | #define pMDMA2_D1_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_D1_CURR_Y_COUNT) |
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| 726 | #define pMDMA2_D1_IRQ_STATUS ((volatile unsigned short *)MDMA2_D1_IRQ_STATUS) |
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| 727 | #define pMDMA2_D1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_D1_PERIPHERAL_MAP) |
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| 728 | #define pMDMA2_S1_CONFIG ((volatile unsigned short *)MDMA2_S1_CONFIG) |
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| 729 | #define pMDMA2_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_NEXT_DESC_PTR) |
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| 730 | #define pMDMA2_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_START_ADDR) |
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| 731 | #define pMDMA2_S1_X_COUNT ((volatile unsigned short *)MDMA2_S1_X_COUNT) |
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| 732 | #define pMDMA2_S1_Y_COUNT ((volatile unsigned short *)MDMA2_S1_Y_COUNT) |
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| 733 | #define pMDMA2_S1_X_MODIFY (volatile signed short *)MDMA2_S1_X_MODIFY |
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| 734 | #define pMDMA2_S1_Y_MODIFY (volatile signed short *)MDMA2_S1_Y_MODIFY |
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| 735 | #define pMDMA2_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_DESC_PTR) |
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| 736 | #define pMDMA2_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_ADDR) |
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| 737 | #define pMDMA2_S1_CURR_X_COUNT ((volatile unsigned short *)MDMA2_S1_CURR_X_COUNT) |
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| 738 | #define pMDMA2_S1_CURR_Y_COUNT ((volatile unsigned short *)MDMA2_S1_CURR_Y_COUNT) |
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| 739 | #define pMDMA2_S1_IRQ_STATUS ((volatile unsigned short *)MDMA2_S1_IRQ_STATUS) |
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| 740 | #define pMDMA2_S1_PERIPHERAL_MAP ((volatile unsigned short *)MDMA2_S1_PERIPHERAL_MAP) |
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| 741 | /* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */ |
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| 742 | #define pIMDMA_D0_CONFIG ((volatile unsigned short *)IMDMA_D0_CONFIG) |
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| 743 | #define pIMDMA_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_NEXT_DESC_PTR) |
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| 744 | #define pIMDMA_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_START_ADDR) |
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| 745 | #define pIMDMA_D0_X_COUNT ((volatile unsigned short *)IMDMA_D0_X_COUNT) |
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| 746 | #define pIMDMA_D0_Y_COUNT ((volatile unsigned short *)IMDMA_D0_Y_COUNT) |
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| 747 | #define pIMDMA_D0_X_MODIFY (volatile signed short *)IMDMA_D0_X_MODIFY |
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| 748 | #define pIMDMA_D0_Y_MODIFY (volatile signed short *)IMDMA_D0_Y_MODIFY |
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| 749 | #define pIMDMA_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_DESC_PTR) |
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| 750 | #define pIMDMA_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_ADDR) |
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| 751 | #define pIMDMA_D0_CURR_X_COUNT ((volatile unsigned short *)IMDMA_D0_CURR_X_COUNT) |
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| 752 | #define pIMDMA_D0_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_D0_CURR_Y_COUNT) |
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| 753 | #define pIMDMA_D0_IRQ_STATUS ((volatile unsigned short *)IMDMA_D0_IRQ_STATUS) |
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| 754 | #define pIMDMA_S0_CONFIG ((volatile unsigned short *)IMDMA_S0_CONFIG) |
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| 755 | #define pIMDMA_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_NEXT_DESC_PTR) |
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| 756 | #define pIMDMA_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_START_ADDR) |
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| 757 | #define pIMDMA_S0_X_COUNT ((volatile unsigned short *)IMDMA_S0_X_COUNT) |
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| 758 | #define pIMDMA_S0_Y_COUNT ((volatile unsigned short *)IMDMA_S0_Y_COUNT) |
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| 759 | #define pIMDMA_S0_X_MODIFY (volatile signed short *)IMDMA_S0_X_MODIFY |
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| 760 | #define pIMDMA_S0_Y_MODIFY (volatile signed short *)IMDMA_S0_Y_MODIFY |
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| 761 | #define pIMDMA_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_DESC_PTR) |
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| 762 | #define pIMDMA_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_ADDR) |
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| 763 | #define pIMDMA_S0_CURR_X_COUNT ((volatile unsigned short *)IMDMA_S0_CURR_X_COUNT) |
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| 764 | #define pIMDMA_S0_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_S0_CURR_Y_COUNT) |
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| 765 | #define pIMDMA_S0_IRQ_STATUS ((volatile unsigned short *)IMDMA_S0_IRQ_STATUS) |
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| 766 | #define pIMDMA_D1_CONFIG ((volatile unsigned short *)IMDMA_D1_CONFIG) |
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| 767 | #define pIMDMA_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_NEXT_DESC_PTR) |
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| 768 | #define pIMDMA_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_START_ADDR) |
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| 769 | #define pIMDMA_D1_X_COUNT ((volatile unsigned short *)IMDMA_D1_X_COUNT) |
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| 770 | #define pIMDMA_D1_Y_COUNT ((volatile unsigned short *)IMDMA_D1_Y_COUNT) |
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| 771 | #define pIMDMA_D1_X_MODIFY (volatile signed short *)IMDMA_D1_X_MODIFY |
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| 772 | #define pIMDMA_D1_Y_MODIFY (volatile signed short *)IMDMA_D1_Y_MODIFY |
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| 773 | #define pIMDMA_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_DESC_PTR) |
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| 774 | #define pIMDMA_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_ADDR) |
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| 775 | #define pIMDMA_D1_CURR_X_COUNT ((volatile unsigned short *)IMDMA_D1_CURR_X_COUNT) |
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| 776 | #define pIMDMA_D1_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_D1_CURR_Y_COUNT) |
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| 777 | #define pIMDMA_D1_IRQ_STATUS ((volatile unsigned short *)IMDMA_D1_IRQ_STATUS) |
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| 778 | #define pIMDMA_S1_CONFIG ((volatile unsigned short *)IMDMA_S1_CONFIG) |
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| 779 | #define pIMDMA_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_NEXT_DESC_PTR) |
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| 780 | #define pIMDMA_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_START_ADDR) |
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| 781 | #define pIMDMA_S1_X_COUNT ((volatile unsigned short *)IMDMA_S1_X_COUNT) |
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| 782 | #define pIMDMA_S1_Y_COUNT ((volatile unsigned short *)IMDMA_S1_Y_COUNT) |
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| 783 | #define pIMDMA_S1_X_MODIFY (volatile signed short *)IMDMA_S1_X_MODIFY |
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| 784 | #define pIMDMA_S1_Y_MODIFY (volatile signed short *)IMDMA_S1_Y_MODIFY |
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| 785 | #define pIMDMA_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_DESC_PTR) |
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| 786 | #define pIMDMA_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_ADDR) |
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| 787 | #define pIMDMA_S1_CURR_X_COUNT ((volatile unsigned short *)IMDMA_S1_CURR_X_COUNT) |
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| 788 | #define pIMDMA_S1_CURR_Y_COUNT ((volatile unsigned short *)IMDMA_S1_CURR_Y_COUNT) |
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| 789 | #define pIMDMA_S1_IRQ_STATUS ((volatile unsigned short *)IMDMA_S1_IRQ_STATUS) |
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| 790 | |
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| 791 | #ifdef _MISRA_RULES |
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| 792 | #pragma diag(pop) |
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| 793 | #endif /* _MISRA_RULES */ |
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| 794 | |
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| 795 | #endif /* _CDEF_BF561_H */ |
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