source: trunk/libs/newlib/src/libgloss/bfin/include/cdefBF59x_base.h @ 503

Last change on this file since 503 was 444, checked in by satin@…, 6 years ago

add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc

File size: 24.2 KB
Line 
1/*
2 * The authors hereby grant permission to use, copy, modify, distribute,
3 * and license this software and its documentation for any purpose, provided
4 * that existing copyright notices are retained in all copies and that this
5 * notice is included verbatim in any distributions. No written agreement,
6 * license, or royalty fee is required for any of the authorized uses.
7 * Modifications to this software may be copyrighted by their authors
8 * and need not follow the licensing terms described here, provided that
9 * the new terms are clearly indicated on the first page of each file where
10 * they apply.
11 */
12
13/*
14** cdefBF59x_base.h
15**
16** Copyright (C) 2009 Analog Devices Inc., All Rights Reserved.
17**
18************************************************************************************
19**
20** This include file contains a list of macro "defines" to enable the programmer
21** to use symbolic names for the registers common to the ADSP-BF59x peripherals.
22**
23***************************************************************/
24
25#ifndef _CDEF_BF59x_H
26#define _CDEF_BF59x_H
27
28#include <defBF59x_base.h>
29#include <stdint.h>
30
31#ifdef _MISRA_RULES
32#pragma diag(push)
33#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
34#endif /* _MISRA_RULES */
35
36#ifndef _PTR_TO_VOL_VOID_PTR
37#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
38#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
39#else
40#define _PTR_TO_VOL_VOID_PTR (volatile void **)
41#endif
42#endif
43
44
45/* Clock and System Control     (0xFFC00000 - 0xFFC000FF) */
46#define pPLL_CTL                        ((volatile uint16_t *)PLL_CTL)
47#define pPLL_DIV                        ((volatile uint16_t *)PLL_DIV)
48#define pVR_CTL                         ((volatile uint16_t *)VR_CTL)
49#define pPLL_STAT               ((volatile uint16_t *)PLL_STAT)
50#define pPLL_LOCKCNT            ((volatile uint16_t *)PLL_LOCKCNT)
51#define pCHIPID                 ((volatile uint32_t *)CHIPID)
52#define pAUX_REVID                      ((volatile uint32_t *)AUX_REVID)
53
54
55/* System Interrupt Controller(0xFFC00100 - 0xFFC001FF) */
56#define pSWRST                  ((volatile uint16_t *)SWRST)
57#define pSYSCR                  ((volatile uint16_t *)SYSCR)
58
59#define pSIC_IMASK0     ((volatile uint32_t *)SIC_IMASK0)
60#define pSIC_IAR0               ((volatile uint32_t *)SIC_IAR0)
61#define pSIC_IAR1               ((volatile uint32_t *)SIC_IAR1)
62#define pSIC_IAR2               ((volatile uint32_t *)SIC_IAR2)
63#define pSIC_IAR3               ((volatile uint32_t *)SIC_IAR3)
64#define pSIC_ISR0               ((volatile uint32_t *)SIC_ISR0)
65#define pSIC_IWR0               ((volatile uint32_t *)SIC_IWR0)
66
67/* legacy register name (below) provided for backwards code compatibility */
68#define pSIC_IMASK              ((volatile uint32_t *)SIC_IMASK0)
69/* legacy register name (below) provided for backwards code compatibility */
70#define pSIC_ISR                ((volatile uint32_t *)SIC_ISR0)
71/* legacy register name (below) provided for backwards code compatibility */
72#define pSIC_IWR                ((volatile uint32_t *)SIC_IWR0)
73
74
75/* Watchdog Timer               (0xFFC00200 - 0xFFC002FF) */
76#define pWDOG_CTL               ((volatile uint16_t *)WDOG_CTL)
77#define pWDOG_CNT               ((volatile uint32_t *)WDOG_CNT)
78#define pWDOG_STAT              ((volatile uint32_t *)WDOG_STAT)
79
80
81/* UART0 Controller             (0xFFC00400 - 0xFFC004FF) */
82#define pUART0_THR              ((volatile uint16_t *)UART0_THR)
83#define pUART0_RBR              ((volatile uint16_t *)UART0_RBR)
84#define pUART0_DLL              ((volatile uint16_t *)UART0_DLL)
85#define pUART0_IER              ((volatile uint16_t *)UART0_IER)
86#define pUART0_DLH              ((volatile uint16_t *)UART0_DLH)
87#define pUART0_IIR              ((volatile uint16_t *)UART0_IIR)
88#define pUART0_LCR              ((volatile uint16_t *)UART0_LCR)
89#define pUART0_MCR              ((volatile uint16_t *)UART0_MCR)
90#define pUART0_LSR              ((volatile uint16_t *)UART0_LSR)
91#define pUART0_SCR              ((volatile uint16_t *)UART0_SCR)
92#define pUART0_GCTL     ((volatile uint16_t *)UART0_GCTL)
93
94
95/* SPI0 Controller              (0xFFC00500 - 0xFFC005FF)*/
96#define pSPI0_CTL               ((volatile uint16_t *)SPI0_CTL)
97#define pSPI0_FLG               ((volatile uint16_t *)SPI0_FLG)
98#define pSPI0_STAT              ((volatile uint16_t *)SPI0_STAT)
99#define pSPI0_TDBR              ((volatile uint16_t *)SPI0_TDBR)
100#define pSPI0_RDBR              ((volatile uint16_t *)SPI0_RDBR)
101#define pSPI0_BAUD              ((volatile uint16_t *)SPI0_BAUD)
102#define pSPI0_SHADOW    ((volatile uint16_t *)SPI0_SHADOW)
103
104
105/* SPI1 Controller              (0xFFC01300 - 0xFFC013FF)*/
106#define pSPI1_CTL               ((volatile uint16_t *)SPI1_CTL)
107#define pSPI1_FLG               ((volatile uint16_t *)SPI1_FLG)
108#define pSPI1_STAT              ((volatile uint16_t *)SPI1_STAT)
109#define pSPI1_TDBR              ((volatile uint16_t *)SPI1_TDBR)
110#define pSPI1_RDBR              ((volatile uint16_t *)SPI1_RDBR)
111#define pSPI1_BAUD              ((volatile uint16_t *)SPI1_BAUD)
112#define pSPI1_SHADOW    ((volatile uint16_t *)SPI1_SHADOW)
113
114
115/* TIMER0-2 Registers           (0xFFC00600 - 0xFFC006FF) */
116#define pTIMER0_CONFIG          ((volatile uint16_t *)TIMER0_CONFIG)
117#define pTIMER0_COUNTER         ((volatile uint32_t *)TIMER0_COUNTER)
118#define pTIMER0_PERIOD          ((volatile uint32_t *)TIMER0_PERIOD)
119#define pTIMER0_WIDTH           ((volatile uint32_t *)TIMER0_WIDTH)
120
121#define pTIMER1_CONFIG          ((volatile uint16_t *)TIMER1_CONFIG)
122#define pTIMER1_COUNTER         ((volatile uint32_t *)TIMER1_COUNTER)
123#define pTIMER1_PERIOD          ((volatile uint32_t *)TIMER1_PERIOD)
124#define pTIMER1_WIDTH           ((volatile uint32_t *)TIMER1_WIDTH)
125
126#define pTIMER2_CONFIG          ((volatile uint16_t *)TIMER2_CONFIG)
127#define pTIMER2_COUNTER         ((volatile uint32_t *)TIMER2_COUNTER)
128#define pTIMER2_PERIOD          ((volatile uint32_t *)TIMER2_PERIOD)
129#define pTIMER2_WIDTH           ((volatile uint32_t *)TIMER2_WIDTH)
130
131#define pTIMER_ENABLE           ((volatile uint16_t *)TIMER_ENABLE)
132#define pTIMER_DISABLE          ((volatile uint16_t *)TIMER_DISABLE)
133#define pTIMER_STATUS           ((volatile uint16_t *)TIMER_STATUS)
134
135
136/* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF) */
137#define pPORTFIO                        ((volatile uint16_t *)PORTFIO)
138#define pPORTFIO_CLEAR          ((volatile uint16_t *)PORTFIO_CLEAR)
139#define pPORTFIO_SET            ((volatile uint16_t *)PORTFIO_SET)
140#define pPORTFIO_TOGGLE         ((volatile uint16_t *)PORTFIO_TOGGLE)
141#define pPORTFIO_MASKA          ((volatile uint16_t *)PORTFIO_MASKA)
142#define pPORTFIO_MASKA_CLEAR    ((volatile uint16_t *)PORTFIO_MASKA_CLEAR)
143#define pPORTFIO_MASKA_SET      ((volatile uint16_t *)PORTFIO_MASKA_SET)
144#define pPORTFIO_MASKA_TOGGLE ((volatile uint16_t *)PORTFIO_MASKA_TOGGLE)
145#define pPORTFIO_MASKB          ((volatile uint16_t *)PORTFIO_MASKB)
146#define pPORTFIO_MASKB_CLEAR    ((volatile uint16_t *)PORTFIO_MASKB_CLEAR)
147#define pPORTFIO_MASKB_SET      ((volatile uint16_t *)PORTFIO_MASKB_SET)
148#define pPORTFIO_MASKB_TOGGLE ((volatile uint16_t *)PORTFIO_MASKB_TOGGLE)
149#define pPORTFIO_DIR            ((volatile uint16_t *)PORTFIO_DIR)
150#define pPORTFIO_POLAR          ((volatile uint16_t *)PORTFIO_POLAR)
151#define pPORTFIO_EDGE           ((volatile uint16_t *)PORTFIO_EDGE)
152#define pPORTFIO_BOTH           ((volatile uint16_t *)PORTFIO_BOTH)
153#define pPORTFIO_INEN           ((volatile uint16_t *)PORTFIO_INEN)
154
155/* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */
156#define pPORTGIO                        ((volatile uint16_t *)PORTGIO)
157#define pPORTGIO_CLEAR          ((volatile uint16_t *)PORTGIO_CLEAR)
158#define pPORTGIO_SET            ((volatile uint16_t *)PORTGIO_SET)
159#define pPORTGIO_TOGGLE         ((volatile uint16_t *)PORTGIO_TOGGLE)
160#define pPORTGIO_MASKA          ((volatile uint16_t *)PORTGIO_MASKA)
161#define pPORTGIO_MASKA_CLEAR    ((volatile uint16_t *)PORTGIO_MASKA_CLEAR)
162#define pPORTGIO_MASKA_SET      ((volatile uint16_t *)PORTGIO_MASKA_SET)
163#define pPORTGIO_MASKA_TOGGLE   ((volatile uint16_t *)PORTGIO_MASKA_TOGGLE)
164#define pPORTGIO_MASKB          ((volatile uint16_t *)PORTGIO_MASKB)
165#define pPORTGIO_MASKB_CLEAR    ((volatile uint16_t *)PORTGIO_MASKB_CLEAR)
166#define pPORTGIO_MASKB_SET      ((volatile uint16_t *)PORTGIO_MASKB_SET)
167#define pPORTGIO_MASKB_TOGGLE   ((volatile uint16_t *)PORTGIO_MASKB_TOGGLE)
168#define pPORTGIO_DIR            ((volatile uint16_t *)PORTGIO_DIR)
169#define pPORTGIO_POLAR          ((volatile uint16_t *)PORTGIO_POLAR)
170#define pPORTGIO_EDGE           ((volatile uint16_t *)PORTGIO_EDGE)
171#define pPORTGIO_BOTH           ((volatile uint16_t *)PORTGIO_BOTH)
172#define pPORTGIO_INEN           ((volatile uint16_t *)PORTGIO_INEN)
173
174
175/* Pin Control Registers        (0xFFC01100 - 0xFFC012FF) */
176#define pPORTF_FER                      ((volatile uint16_t *)PORTF_FER)
177#define pPORTF_MUX                      ((volatile uint16_t *)PORTF_MUX)
178#define pPORTF_PADCTL           ((volatile uint16_t *)PORTF_PADCTL)
179#define pPORTG_FER                      ((volatile uint16_t *)PORTG_FER)
180#define pPORTG_MUX                      ((volatile uint16_t *)PORTG_MUX)
181#define pPORTG_PADCTL           ((volatile uint16_t *)PORTG_PADCTL)
182
183/* SPORT Clock Gating                   (0xFFC0120C) */
184#define pSPORT_GATECLK          ((volatile uint16_t *)SPORT_GATECLK)
185
186/* SPORT0 Controller            (0xFFC00800 - 0xFFC008FF) */
187#define pSPORT0_TCR1            ((volatile uint16_t *)SPORT0_TCR1)
188#define pSPORT0_TCR2            ((volatile uint16_t *)SPORT0_TCR2)
189#define pSPORT0_TCLKDIV         ((volatile uint16_t *)SPORT0_TCLKDIV)
190#define pSPORT0_TFSDIV          ((volatile uint16_t *)SPORT0_TFSDIV)
191#define pSPORT0_TX                      ((volatile uint32_t *)SPORT0_TX)
192#define pSPORT0_RX                      ((volatile uint32_t *)SPORT0_RX)
193#define pSPORT0_TX32            ((volatile uint32_t *)SPORT0_TX)
194#define pSPORT0_RX32            ((volatile uint32_t *)SPORT0_RX)
195#define pSPORT0_TX16            ((volatile uint16_t *)SPORT0_TX)
196#define pSPORT0_RX16            ((volatile uint16_t *)SPORT0_RX)
197#define pSPORT0_RCR1            ((volatile uint16_t *)SPORT0_RCR1)
198#define pSPORT0_RCR2            ((volatile uint16_t *)SPORT0_RCR2)
199#define pSPORT0_RCLKDIV         ((volatile uint16_t *)SPORT0_RCLKDIV)
200#define pSPORT0_RFSDIV          ((volatile uint16_t *)SPORT0_RFSDIV)
201#define pSPORT0_STAT            ((volatile uint16_t *)SPORT0_STAT)
202#define pSPORT0_CHNL            ((volatile uint16_t *)SPORT0_CHNL)
203#define pSPORT0_MCMC1           ((volatile uint16_t *)SPORT0_MCMC1)
204#define pSPORT0_MCMC2           ((volatile uint16_t *)SPORT0_MCMC2)
205#define pSPORT0_MTCS0           ((volatile uint32_t *)SPORT0_MTCS0)
206#define pSPORT0_MTCS1           ((volatile uint32_t *)SPORT0_MTCS1)
207#define pSPORT0_MTCS2           ((volatile uint32_t *)SPORT0_MTCS2)
208#define pSPORT0_MTCS3           ((volatile uint32_t *)SPORT0_MTCS3)
209#define pSPORT0_MRCS0           ((volatile uint32_t *)SPORT0_MRCS0)
210#define pSPORT0_MRCS1           ((volatile uint32_t *)SPORT0_MRCS1)
211#define pSPORT0_MRCS2           ((volatile uint32_t *)SPORT0_MRCS2)
212#define pSPORT0_MRCS3           ((volatile uint32_t *)SPORT0_MRCS3)
213
214
215/* SPORT1 Controller            (0xFFC00900 - 0xFFC009FF) */
216#define pSPORT1_TCR1            ((volatile uint16_t *)SPORT1_TCR1)
217#define pSPORT1_TCR2            ((volatile uint16_t *)SPORT1_TCR2)
218#define pSPORT1_TCLKDIV         ((volatile uint16_t *)SPORT1_TCLKDIV)
219#define pSPORT1_TFSDIV          ((volatile uint16_t *)SPORT1_TFSDIV)
220#define pSPORT1_TX              ((volatile uint32_t *)SPORT1_TX)
221#define pSPORT1_RX              ((volatile uint32_t *)SPORT1_RX)
222#define pSPORT1_TX32            ((volatile uint32_t *)SPORT1_TX)
223#define pSPORT1_RX32            ((volatile uint32_t *)SPORT1_RX)
224#define pSPORT1_TX16            ((volatile uint16_t *)SPORT1_TX)
225#define pSPORT1_RX16            ((volatile uint16_t *)SPORT1_RX)
226#define pSPORT1_RCR1            ((volatile uint16_t *)SPORT1_RCR1)
227#define pSPORT1_RCR2            ((volatile uint16_t *)SPORT1_RCR2)
228#define pSPORT1_RCLKDIV         ((volatile uint16_t *)SPORT1_RCLKDIV)
229#define pSPORT1_RFSDIV          ((volatile uint16_t *)SPORT1_RFSDIV)
230#define pSPORT1_STAT            ((volatile uint16_t *)SPORT1_STAT)
231#define pSPORT1_CHNL            ((volatile uint16_t *)SPORT1_CHNL)
232#define pSPORT1_MCMC1           ((volatile uint16_t *)SPORT1_MCMC1)
233#define pSPORT1_MCMC2           ((volatile uint16_t *)SPORT1_MCMC2)
234#define pSPORT1_MTCS0           ((volatile uint32_t *)SPORT1_MTCS0)
235#define pSPORT1_MTCS1           ((volatile uint32_t *)SPORT1_MTCS1)
236#define pSPORT1_MTCS2           ((volatile uint32_t *)SPORT1_MTCS2)
237#define pSPORT1_MTCS3           ((volatile uint32_t *)SPORT1_MTCS3)
238#define pSPORT1_MRCS0           ((volatile uint32_t *)SPORT1_MRCS0)
239#define pSPORT1_MRCS1           ((volatile uint32_t *)SPORT1_MRCS1)
240#define pSPORT1_MRCS2           ((volatile uint32_t *)SPORT1_MRCS2)
241#define pSPORT1_MRCS3           ((volatile uint32_t *)SPORT1_MRCS3)
242
243
244/* DMA Traffic Control Registers        (0xFFC00B00 - 0xFFC00BFF) */
245#define pDMA_TC_PER             ((volatile uint16_t *)DMA_TC_PER)
246#define pDMA_TC_CNT             ((volatile uint16_t *)DMA_TC_CNT)
247
248/* Alternate deprecated register names (below) provided for backwards code compatibility */
249#define pDMA_TCPER              ((volatile uint16_t *)DMA_TCPER)
250#define pDMA_TCCNT              ((volatile uint16_t *)DMA_TCCNT)
251
252/* DMA Controller                       (0xFFC00C00 - FFC00FFF)*/
253#define pDMA0_CONFIG            ((volatile uint16_t *)DMA0_CONFIG)
254#define pDMA0_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR)
255#define pDMA0_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA0_START_ADDR)
256#define pDMA0_X_COUNT           ((volatile uint16_t *)DMA0_X_COUNT)
257#define pDMA0_Y_COUNT           ((volatile uint16_t *)DMA0_Y_COUNT)
258#define pDMA0_X_MODIFY          ((volatile signed   short *)DMA0_X_MODIFY)
259#define pDMA0_Y_MODIFY          ((volatile signed   short *)DMA0_Y_MODIFY)
260#define pDMA0_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA0_CURR_DESC_PTR)
261#define pDMA0_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA0_CURR_ADDR)
262#define pDMA0_CURR_X_COUNT      ((volatile uint16_t *)DMA0_CURR_X_COUNT)
263#define pDMA0_CURR_Y_COUNT      ((volatile uint16_t *)DMA0_CURR_Y_COUNT)
264#define pDMA0_IRQ_STATUS        ((volatile uint16_t *)DMA0_IRQ_STATUS)
265#define pDMA0_PERIPHERAL_MAP    ((volatile uint16_t *)DMA0_PERIPHERAL_MAP)
266
267#define pDMA1_CONFIG            ((volatile uint16_t *)DMA1_CONFIG)
268#define pDMA1_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA1_NEXT_DESC_PTR)
269#define pDMA1_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA1_START_ADDR)
270#define pDMA1_X_COUNT           ((volatile uint16_t *)DMA1_X_COUNT)
271#define pDMA1_Y_COUNT           ((volatile uint16_t *)DMA1_Y_COUNT)
272#define pDMA1_X_MODIFY          ((volatile signed   short *)DMA1_X_MODIFY)
273#define pDMA1_Y_MODIFY          ((volatile signed   short *)DMA1_Y_MODIFY)
274#define pDMA1_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA1_CURR_DESC_PTR)
275#define pDMA1_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA1_CURR_ADDR)
276#define pDMA1_CURR_X_COUNT      ((volatile uint16_t *)DMA1_CURR_X_COUNT)
277#define pDMA1_CURR_Y_COUNT      ((volatile uint16_t *)DMA1_CURR_Y_COUNT)
278#define pDMA1_IRQ_STATUS        ((volatile uint16_t *)DMA1_IRQ_STATUS)
279#define pDMA1_PERIPHERAL_MAP    ((volatile uint16_t *)DMA1_PERIPHERAL_MAP)
280
281#define pDMA2_CONFIG            ((volatile uint16_t *)DMA2_CONFIG)
282#define pDMA2_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA2_NEXT_DESC_PTR)
283#define pDMA2_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA2_START_ADDR)
284#define pDMA2_X_COUNT           ((volatile uint16_t *)DMA2_X_COUNT)
285#define pDMA2_Y_COUNT           ((volatile uint16_t *)DMA2_Y_COUNT)
286#define pDMA2_X_MODIFY          ((volatile signed   short *)DMA2_X_MODIFY)
287#define pDMA2_Y_MODIFY          ((volatile signed   short *)DMA2_Y_MODIFY)
288#define pDMA2_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA2_CURR_DESC_PTR)
289#define pDMA2_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA2_CURR_ADDR)
290#define pDMA2_CURR_X_COUNT      ((volatile uint16_t *)DMA2_CURR_X_COUNT)
291#define pDMA2_CURR_Y_COUNT      ((volatile uint16_t *)DMA2_CURR_Y_COUNT)
292#define pDMA2_IRQ_STATUS        ((volatile uint16_t *)DMA2_IRQ_STATUS)
293#define pDMA2_PERIPHERAL_MAP    ((volatile uint16_t *)DMA2_PERIPHERAL_MAP)
294
295#define pDMA3_CONFIG            ((volatile uint16_t *)DMA3_CONFIG)
296#define pDMA3_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA3_NEXT_DESC_PTR)
297#define pDMA3_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA3_START_ADDR)
298#define pDMA3_X_COUNT           ((volatile uint16_t *)DMA3_X_COUNT)
299#define pDMA3_Y_COUNT           ((volatile uint16_t *)DMA3_Y_COUNT)
300#define pDMA3_X_MODIFY          ((volatile signed   short *)DMA3_X_MODIFY)
301#define pDMA3_Y_MODIFY          ((volatile signed   short *)DMA3_Y_MODIFY)
302#define pDMA3_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA3_CURR_DESC_PTR)
303#define pDMA3_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA3_CURR_ADDR)
304#define pDMA3_CURR_X_COUNT      ((volatile uint16_t *)DMA3_CURR_X_COUNT)
305#define pDMA3_CURR_Y_COUNT      ((volatile uint16_t *)DMA3_CURR_Y_COUNT)
306#define pDMA3_IRQ_STATUS        ((volatile uint16_t *)DMA3_IRQ_STATUS)
307#define pDMA3_PERIPHERAL_MAP    ((volatile uint16_t *)DMA3_PERIPHERAL_MAP)
308
309#define pDMA4_CONFIG            ((volatile uint16_t *)DMA4_CONFIG)
310#define pDMA4_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA4_NEXT_DESC_PTR)
311#define pDMA4_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA4_START_ADDR)
312#define pDMA4_X_COUNT           ((volatile uint16_t *)DMA4_X_COUNT)
313#define pDMA4_Y_COUNT           ((volatile uint16_t *)DMA4_Y_COUNT)
314#define pDMA4_X_MODIFY          ((volatile signed   short *)DMA4_X_MODIFY)
315#define pDMA4_Y_MODIFY          ((volatile signed   short *)DMA4_Y_MODIFY)
316#define pDMA4_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA4_CURR_DESC_PTR)
317#define pDMA4_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA4_CURR_ADDR)
318#define pDMA4_CURR_X_COUNT      ((volatile uint16_t *)DMA4_CURR_X_COUNT)
319#define pDMA4_CURR_Y_COUNT      ((volatile uint16_t *)DMA4_CURR_Y_COUNT)
320#define pDMA4_IRQ_STATUS        ((volatile uint16_t *)DMA4_IRQ_STATUS)
321#define pDMA4_PERIPHERAL_MAP    ((volatile uint16_t *)DMA4_PERIPHERAL_MAP)
322
323#define pDMA5_CONFIG            ((volatile uint16_t *)DMA5_CONFIG)
324#define pDMA5_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA5_NEXT_DESC_PTR)
325#define pDMA5_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA5_START_ADDR)
326#define pDMA5_X_COUNT           ((volatile uint16_t *)DMA5_X_COUNT)
327#define pDMA5_Y_COUNT           ((volatile uint16_t *)DMA5_Y_COUNT)
328#define pDMA5_X_MODIFY          ((volatile signed   short *)DMA5_X_MODIFY)
329#define pDMA5_Y_MODIFY          ((volatile signed   short *)DMA5_Y_MODIFY)
330#define pDMA5_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA5_CURR_DESC_PTR)
331#define pDMA5_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA5_CURR_ADDR)
332#define pDMA5_CURR_X_COUNT      ((volatile uint16_t *)DMA5_CURR_X_COUNT)
333#define pDMA5_CURR_Y_COUNT      ((volatile uint16_t *)DMA5_CURR_Y_COUNT)
334#define pDMA5_IRQ_STATUS        ((volatile uint16_t *)DMA5_IRQ_STATUS)
335#define pDMA5_PERIPHERAL_MAP    ((volatile uint16_t *)DMA5_PERIPHERAL_MAP)
336
337#define pDMA6_CONFIG            ((volatile uint16_t *)DMA6_CONFIG)
338#define pDMA6_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA6_NEXT_DESC_PTR)
339#define pDMA6_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA6_START_ADDR)
340#define pDMA6_X_COUNT           ((volatile uint16_t *)DMA6_X_COUNT)
341#define pDMA6_Y_COUNT           ((volatile uint16_t *)DMA6_Y_COUNT)
342#define pDMA6_X_MODIFY          ((volatile signed   short *)DMA6_X_MODIFY)
343#define pDMA6_Y_MODIFY          ((volatile signed   short *)DMA6_Y_MODIFY)
344#define pDMA6_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA6_CURR_DESC_PTR)
345#define pDMA6_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA6_CURR_ADDR)
346#define pDMA6_CURR_X_COUNT      ((volatile uint16_t *)DMA6_CURR_X_COUNT)
347#define pDMA6_CURR_Y_COUNT      ((volatile uint16_t *)DMA6_CURR_Y_COUNT)
348#define pDMA6_IRQ_STATUS        ((volatile uint16_t *)DMA6_IRQ_STATUS)
349#define pDMA6_PERIPHERAL_MAP    ((volatile uint16_t *)DMA6_PERIPHERAL_MAP)
350
351#define pDMA7_CONFIG            ((volatile uint16_t *)DMA7_CONFIG)
352#define pDMA7_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA7_NEXT_DESC_PTR)
353#define pDMA7_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA7_START_ADDR)
354#define pDMA7_X_COUNT           ((volatile uint16_t *)DMA7_X_COUNT)
355#define pDMA7_Y_COUNT           ((volatile uint16_t *)DMA7_Y_COUNT)
356#define pDMA7_X_MODIFY          ((volatile signed   short *)DMA7_X_MODIFY)
357#define pDMA7_Y_MODIFY          ((volatile signed   short *)DMA7_Y_MODIFY)
358#define pDMA7_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA7_CURR_DESC_PTR)
359#define pDMA7_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA7_CURR_ADDR)
360#define pDMA7_CURR_X_COUNT      ((volatile uint16_t *)DMA7_CURR_X_COUNT)
361#define pDMA7_CURR_Y_COUNT      ((volatile uint16_t *)DMA7_CURR_Y_COUNT)
362#define pDMA7_IRQ_STATUS        ((volatile uint16_t *)DMA7_IRQ_STATUS)
363#define pDMA7_PERIPHERAL_MAP    ((volatile uint16_t *)DMA7_PERIPHERAL_MAP)
364
365#define pDMA8_CONFIG            ((volatile uint16_t *)DMA8_CONFIG)
366#define pDMA8_NEXT_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA8_NEXT_DESC_PTR)
367#define pDMA8_START_ADDR        (_PTR_TO_VOL_VOID_PTR DMA8_START_ADDR)
368#define pDMA8_X_COUNT           ((volatile uint16_t *)DMA8_X_COUNT)
369#define pDMA8_Y_COUNT           ((volatile uint16_t *)DMA8_Y_COUNT)
370#define pDMA8_X_MODIFY          ((volatile signed   short *)DMA8_X_MODIFY)
371#define pDMA8_Y_MODIFY          ((volatile signed   short *)DMA8_Y_MODIFY)
372#define pDMA8_CURR_DESC_PTR     (_PTR_TO_VOL_VOID_PTR DMA8_CURR_DESC_PTR)
373#define pDMA8_CURR_ADDR         (_PTR_TO_VOL_VOID_PTR DMA8_CURR_ADDR)
374#define pDMA8_CURR_X_COUNT      ((volatile uint16_t *)DMA8_CURR_X_COUNT)
375#define pDMA8_CURR_Y_COUNT      ((volatile uint16_t *)DMA8_CURR_Y_COUNT)
376#define pDMA8_IRQ_STATUS        ((volatile uint16_t *)DMA8_IRQ_STATUS)
377#define pDMA8_PERIPHERAL_MAP    ((volatile uint16_t *)DMA8_PERIPHERAL_MAP)
378
379#define pMDMA_D0_CONFIG         ((volatile uint16_t *)MDMA_D0_CONFIG)
380#define pMDMA_D0_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_D0_NEXT_DESC_PTR)
381#define pMDMA_D0_START_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA_D0_START_ADDR)
382#define pMDMA_D0_X_COUNT        ((volatile uint16_t *)MDMA_D0_X_COUNT)
383#define pMDMA_D0_Y_COUNT        ((volatile uint16_t *)MDMA_D0_Y_COUNT)
384#define pMDMA_D0_X_MODIFY       ((volatile signed   short *)MDMA_D0_X_MODIFY)
385#define pMDMA_D0_Y_MODIFY       ((volatile signed   short *)MDMA_D0_Y_MODIFY)
386#define pMDMA_D0_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_DESC_PTR)
387#define pMDMA_D0_CURR_ADDR        (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_ADDR)
388#define pMDMA_D0_CURR_X_COUNT ((volatile uint16_t *)MDMA_D0_CURR_X_COUNT)
389#define pMDMA_D0_CURR_Y_COUNT ((volatile uint16_t *)MDMA_D0_CURR_Y_COUNT)
390#define pMDMA_D0_IRQ_STATUS     ((volatile uint16_t *)MDMA_D0_IRQ_STATUS)
391#define pMDMA_D0_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_D0_PERIPHERAL_MAP)
392
393#define pMDMA_S0_CONFIG         ((volatile uint16_t *)MDMA_S0_CONFIG)
394#define pMDMA_S0_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_S0_NEXT_DESC_PTR)
395#define pMDMA_S0_START_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA_S0_START_ADDR)
396#define pMDMA_S0_X_COUNT        ((volatile uint16_t *)MDMA_S0_X_COUNT)
397#define pMDMA_S0_Y_COUNT        ((volatile uint16_t *)MDMA_S0_Y_COUNT)
398#define pMDMA_S0_X_MODIFY       ((volatile signed   short *)MDMA_S0_X_MODIFY)
399#define pMDMA_S0_Y_MODIFY       ((volatile signed   short *)MDMA_S0_Y_MODIFY)
400#define pMDMA_S0_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_DESC_PTR)
401#define pMDMA_S0_CURR_ADDR      (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_ADDR)
402#define pMDMA_S0_CURR_X_COUNT ((volatile uint16_t *)MDMA_S0_CURR_X_COUNT)
403#define pMDMA_S0_CURR_Y_COUNT ((volatile uint16_t *)MDMA_S0_CURR_Y_COUNT)
404#define pMDMA_S0_IRQ_STATUS     ((volatile uint16_t *)MDMA_S0_IRQ_STATUS)
405#define pMDMA_S0_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_S0_PERIPHERAL_MAP)
406
407#define pMDMA_D1_CONFIG         ((volatile uint16_t *)MDMA_D1_CONFIG)
408#define pMDMA_D1_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_D1_NEXT_DESC_PTR)
409#define pMDMA_D1_START_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA_D1_START_ADDR)
410#define pMDMA_D1_X_COUNT        ((volatile uint16_t *)MDMA_D1_X_COUNT)
411#define pMDMA_D1_Y_COUNT        ((volatile uint16_t *)MDMA_D1_Y_COUNT)
412#define pMDMA_D1_X_MODIFY       ((volatile signed   short *)MDMA_D1_X_MODIFY)
413#define pMDMA_D1_Y_MODIFY       ((volatile signed   short *)MDMA_D1_Y_MODIFY)
414#define pMDMA_D1_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_DESC_PTR)
415#define pMDMA_D1_CURR_ADDR      (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_ADDR)
416#define pMDMA_D1_CURR_X_COUNT ((volatile uint16_t *)MDMA_D1_CURR_X_COUNT)
417#define pMDMA_D1_CURR_Y_COUNT ((volatile uint16_t *)MDMA_D1_CURR_Y_COUNT)
418#define pMDMA_D1_IRQ_STATUS     ((volatile uint16_t *)MDMA_D1_IRQ_STATUS)
419#define pMDMA_D1_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_D1_PERIPHERAL_MAP)
420
421#define pMDMA_S1_CONFIG         ((volatile uint16_t *)MDMA_S1_CONFIG)
422#define pMDMA_S1_NEXT_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_S1_NEXT_DESC_PTR)
423#define pMDMA_S1_START_ADDR     (_PTR_TO_VOL_VOID_PTR MDMA_S1_START_ADDR)
424#define pMDMA_S1_X_COUNT        ((volatile uint16_t *)MDMA_S1_X_COUNT)
425#define pMDMA_S1_Y_COUNT        ((volatile uint16_t *)MDMA_S1_Y_COUNT)
426#define pMDMA_S1_X_MODIFY       ((volatile signed   short *)MDMA_S1_X_MODIFY)
427#define pMDMA_S1_Y_MODIFY       ((volatile signed   short *)MDMA_S1_Y_MODIFY)
428#define pMDMA_S1_CURR_DESC_PTR  (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_DESC_PTR)
429#define pMDMA_S1_CURR_ADDR      (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_ADDR)
430#define pMDMA_S1_CURR_X_COUNT ((volatile uint16_t *)MDMA_S1_CURR_X_COUNT)
431#define pMDMA_S1_CURR_Y_COUNT ((volatile uint16_t *)MDMA_S1_CURR_Y_COUNT)
432#define pMDMA_S1_IRQ_STATUS     ((volatile uint16_t *)MDMA_S1_IRQ_STATUS)
433#define pMDMA_S1_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_S1_PERIPHERAL_MAP)
434
435
436/* Parallel Peripheral Interface (0xFFC01000 - 0xFFC010FF) */
437#define pPPI_CONTROL            ((volatile uint16_t *)PPI_CONTROL)
438#define pPPI_STATUS             ((volatile uint16_t *)PPI_STATUS)
439#define pPPI_DELAY              ((volatile uint16_t *)PPI_DELAY)
440#define pPPI_COUNT              ((volatile uint16_t *)PPI_COUNT)
441#define pPPI_FRAME              ((volatile uint16_t *)PPI_FRAME)
442
443
444/* Two-Wire Interface           (0xFFC01400 - 0xFFC014FF) */
445#define pTWI_CLKDIV             ((volatile uint16_t *)TWI_CLKDIV)
446#define pTWI_CONTROL            ((volatile uint16_t *)TWI_CONTROL)
447#define pTWI_SLAVE_CTL          ((volatile uint16_t *)TWI_SLAVE_CTL)
448#define pTWI_SLAVE_STAT         ((volatile uint16_t *)TWI_SLAVE_STAT)
449#define pTWI_SLAVE_ADDR         ((volatile uint16_t *)TWI_SLAVE_ADDR)
450#define pTWI_MASTER_CTL         ((volatile uint16_t *)TWI_MASTER_CTL)
451#define pTWI_MASTER_STAT        ((volatile uint16_t *)TWI_MASTER_STAT)
452#define pTWI_MASTER_ADDR        ((volatile uint16_t *)TWI_MASTER_ADDR)
453#define pTWI_INT_STAT           ((volatile uint16_t *)TWI_INT_STAT)
454#define pTWI_INT_MASK           ((volatile uint16_t *)TWI_INT_MASK)
455#define pTWI_FIFO_CTL           ((volatile uint16_t *)TWI_FIFO_CTL)
456#define pTWI_FIFO_STAT          ((volatile uint16_t *)TWI_FIFO_STAT)
457#define pTWI_XMT_DATA8          ((volatile uint16_t *)TWI_XMT_DATA8)
458#define pTWI_XMT_DATA16         ((volatile uint16_t *)TWI_XMT_DATA16)
459#define pTWI_RCV_DATA8          ((volatile uint16_t *)TWI_RCV_DATA8)
460#define pTWI_RCV_DATA16         ((volatile uint16_t *)TWI_RCV_DATA16)
461
462
463#ifdef _MISRA_RULES
464#pragma diag(pop)
465#endif /* _MISRA_RULES */
466
467
468#endif  /*_CDEF_BF59x_H*/
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