| 1 | /* |
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| 2 | * The authors hereby grant permission to use, copy, modify, distribute, |
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| 3 | * and license this software and its documentation for any purpose, provided |
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| 4 | * that existing copyright notices are retained in all copies and that this |
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| 5 | * notice is included verbatim in any distributions. No written agreement, |
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| 6 | * license, or royalty fee is required for any of the authorized uses. |
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| 7 | * Modifications to this software may be copyrighted by their authors |
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| 8 | * and need not follow the licensing terms described here, provided that |
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| 9 | * the new terms are clearly indicated on the first page of each file where |
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| 10 | * they apply. |
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| 11 | */ |
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| 12 | |
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| 13 | /* |
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| 14 | ** cdefBF59x_base.h |
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| 15 | ** |
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| 16 | ** Copyright (C) 2009 Analog Devices Inc., All Rights Reserved. |
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| 17 | ** |
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| 18 | ************************************************************************************ |
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| 19 | ** |
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| 20 | ** This include file contains a list of macro "defines" to enable the programmer |
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| 21 | ** to use symbolic names for the registers common to the ADSP-BF59x peripherals. |
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| 22 | ** |
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| 23 | ***************************************************************/ |
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| 24 | |
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| 25 | #ifndef _CDEF_BF59x_H |
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| 26 | #define _CDEF_BF59x_H |
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| 27 | |
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| 28 | #include <defBF59x_base.h> |
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| 29 | #include <stdint.h> |
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| 30 | |
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| 31 | #ifdef _MISRA_RULES |
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| 32 | #pragma diag(push) |
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| 33 | #pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant") |
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| 34 | #endif /* _MISRA_RULES */ |
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| 35 | |
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| 36 | #ifndef _PTR_TO_VOL_VOID_PTR |
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| 37 | #ifndef _USE_LEGACY_CDEF_BEHAVIOUR |
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| 38 | #define _PTR_TO_VOL_VOID_PTR (void * volatile *) |
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| 39 | #else |
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| 40 | #define _PTR_TO_VOL_VOID_PTR (volatile void **) |
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| 41 | #endif |
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| 42 | #endif |
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| 43 | |
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| 44 | |
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| 45 | /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */ |
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| 46 | #define pPLL_CTL ((volatile uint16_t *)PLL_CTL) |
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| 47 | #define pPLL_DIV ((volatile uint16_t *)PLL_DIV) |
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| 48 | #define pVR_CTL ((volatile uint16_t *)VR_CTL) |
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| 49 | #define pPLL_STAT ((volatile uint16_t *)PLL_STAT) |
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| 50 | #define pPLL_LOCKCNT ((volatile uint16_t *)PLL_LOCKCNT) |
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| 51 | #define pCHIPID ((volatile uint32_t *)CHIPID) |
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| 52 | #define pAUX_REVID ((volatile uint32_t *)AUX_REVID) |
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| 53 | |
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| 54 | |
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| 55 | /* System Interrupt Controller(0xFFC00100 - 0xFFC001FF) */ |
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| 56 | #define pSWRST ((volatile uint16_t *)SWRST) |
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| 57 | #define pSYSCR ((volatile uint16_t *)SYSCR) |
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| 58 | |
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| 59 | #define pSIC_IMASK0 ((volatile uint32_t *)SIC_IMASK0) |
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| 60 | #define pSIC_IAR0 ((volatile uint32_t *)SIC_IAR0) |
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| 61 | #define pSIC_IAR1 ((volatile uint32_t *)SIC_IAR1) |
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| 62 | #define pSIC_IAR2 ((volatile uint32_t *)SIC_IAR2) |
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| 63 | #define pSIC_IAR3 ((volatile uint32_t *)SIC_IAR3) |
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| 64 | #define pSIC_ISR0 ((volatile uint32_t *)SIC_ISR0) |
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| 65 | #define pSIC_IWR0 ((volatile uint32_t *)SIC_IWR0) |
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| 66 | |
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| 67 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 68 | #define pSIC_IMASK ((volatile uint32_t *)SIC_IMASK0) |
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| 69 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 70 | #define pSIC_ISR ((volatile uint32_t *)SIC_ISR0) |
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| 71 | /* legacy register name (below) provided for backwards code compatibility */ |
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| 72 | #define pSIC_IWR ((volatile uint32_t *)SIC_IWR0) |
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| 73 | |
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| 74 | |
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| 75 | /* Watchdog Timer (0xFFC00200 - 0xFFC002FF) */ |
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| 76 | #define pWDOG_CTL ((volatile uint16_t *)WDOG_CTL) |
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| 77 | #define pWDOG_CNT ((volatile uint32_t *)WDOG_CNT) |
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| 78 | #define pWDOG_STAT ((volatile uint32_t *)WDOG_STAT) |
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| 79 | |
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| 80 | |
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| 81 | /* UART0 Controller (0xFFC00400 - 0xFFC004FF) */ |
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| 82 | #define pUART0_THR ((volatile uint16_t *)UART0_THR) |
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| 83 | #define pUART0_RBR ((volatile uint16_t *)UART0_RBR) |
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| 84 | #define pUART0_DLL ((volatile uint16_t *)UART0_DLL) |
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| 85 | #define pUART0_IER ((volatile uint16_t *)UART0_IER) |
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| 86 | #define pUART0_DLH ((volatile uint16_t *)UART0_DLH) |
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| 87 | #define pUART0_IIR ((volatile uint16_t *)UART0_IIR) |
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| 88 | #define pUART0_LCR ((volatile uint16_t *)UART0_LCR) |
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| 89 | #define pUART0_MCR ((volatile uint16_t *)UART0_MCR) |
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| 90 | #define pUART0_LSR ((volatile uint16_t *)UART0_LSR) |
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| 91 | #define pUART0_SCR ((volatile uint16_t *)UART0_SCR) |
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| 92 | #define pUART0_GCTL ((volatile uint16_t *)UART0_GCTL) |
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| 93 | |
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| 94 | |
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| 95 | /* SPI0 Controller (0xFFC00500 - 0xFFC005FF)*/ |
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| 96 | #define pSPI0_CTL ((volatile uint16_t *)SPI0_CTL) |
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| 97 | #define pSPI0_FLG ((volatile uint16_t *)SPI0_FLG) |
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| 98 | #define pSPI0_STAT ((volatile uint16_t *)SPI0_STAT) |
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| 99 | #define pSPI0_TDBR ((volatile uint16_t *)SPI0_TDBR) |
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| 100 | #define pSPI0_RDBR ((volatile uint16_t *)SPI0_RDBR) |
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| 101 | #define pSPI0_BAUD ((volatile uint16_t *)SPI0_BAUD) |
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| 102 | #define pSPI0_SHADOW ((volatile uint16_t *)SPI0_SHADOW) |
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| 103 | |
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| 104 | |
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| 105 | /* SPI1 Controller (0xFFC01300 - 0xFFC013FF)*/ |
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| 106 | #define pSPI1_CTL ((volatile uint16_t *)SPI1_CTL) |
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| 107 | #define pSPI1_FLG ((volatile uint16_t *)SPI1_FLG) |
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| 108 | #define pSPI1_STAT ((volatile uint16_t *)SPI1_STAT) |
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| 109 | #define pSPI1_TDBR ((volatile uint16_t *)SPI1_TDBR) |
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| 110 | #define pSPI1_RDBR ((volatile uint16_t *)SPI1_RDBR) |
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| 111 | #define pSPI1_BAUD ((volatile uint16_t *)SPI1_BAUD) |
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| 112 | #define pSPI1_SHADOW ((volatile uint16_t *)SPI1_SHADOW) |
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| 113 | |
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| 114 | |
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| 115 | /* TIMER0-2 Registers (0xFFC00600 - 0xFFC006FF) */ |
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| 116 | #define pTIMER0_CONFIG ((volatile uint16_t *)TIMER0_CONFIG) |
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| 117 | #define pTIMER0_COUNTER ((volatile uint32_t *)TIMER0_COUNTER) |
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| 118 | #define pTIMER0_PERIOD ((volatile uint32_t *)TIMER0_PERIOD) |
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| 119 | #define pTIMER0_WIDTH ((volatile uint32_t *)TIMER0_WIDTH) |
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| 120 | |
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| 121 | #define pTIMER1_CONFIG ((volatile uint16_t *)TIMER1_CONFIG) |
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| 122 | #define pTIMER1_COUNTER ((volatile uint32_t *)TIMER1_COUNTER) |
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| 123 | #define pTIMER1_PERIOD ((volatile uint32_t *)TIMER1_PERIOD) |
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| 124 | #define pTIMER1_WIDTH ((volatile uint32_t *)TIMER1_WIDTH) |
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| 125 | |
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| 126 | #define pTIMER2_CONFIG ((volatile uint16_t *)TIMER2_CONFIG) |
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| 127 | #define pTIMER2_COUNTER ((volatile uint32_t *)TIMER2_COUNTER) |
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| 128 | #define pTIMER2_PERIOD ((volatile uint32_t *)TIMER2_PERIOD) |
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| 129 | #define pTIMER2_WIDTH ((volatile uint32_t *)TIMER2_WIDTH) |
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| 130 | |
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| 131 | #define pTIMER_ENABLE ((volatile uint16_t *)TIMER_ENABLE) |
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| 132 | #define pTIMER_DISABLE ((volatile uint16_t *)TIMER_DISABLE) |
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| 133 | #define pTIMER_STATUS ((volatile uint16_t *)TIMER_STATUS) |
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| 134 | |
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| 135 | |
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| 136 | /* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF) */ |
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| 137 | #define pPORTFIO ((volatile uint16_t *)PORTFIO) |
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| 138 | #define pPORTFIO_CLEAR ((volatile uint16_t *)PORTFIO_CLEAR) |
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| 139 | #define pPORTFIO_SET ((volatile uint16_t *)PORTFIO_SET) |
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| 140 | #define pPORTFIO_TOGGLE ((volatile uint16_t *)PORTFIO_TOGGLE) |
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| 141 | #define pPORTFIO_MASKA ((volatile uint16_t *)PORTFIO_MASKA) |
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| 142 | #define pPORTFIO_MASKA_CLEAR ((volatile uint16_t *)PORTFIO_MASKA_CLEAR) |
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| 143 | #define pPORTFIO_MASKA_SET ((volatile uint16_t *)PORTFIO_MASKA_SET) |
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| 144 | #define pPORTFIO_MASKA_TOGGLE ((volatile uint16_t *)PORTFIO_MASKA_TOGGLE) |
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| 145 | #define pPORTFIO_MASKB ((volatile uint16_t *)PORTFIO_MASKB) |
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| 146 | #define pPORTFIO_MASKB_CLEAR ((volatile uint16_t *)PORTFIO_MASKB_CLEAR) |
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| 147 | #define pPORTFIO_MASKB_SET ((volatile uint16_t *)PORTFIO_MASKB_SET) |
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| 148 | #define pPORTFIO_MASKB_TOGGLE ((volatile uint16_t *)PORTFIO_MASKB_TOGGLE) |
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| 149 | #define pPORTFIO_DIR ((volatile uint16_t *)PORTFIO_DIR) |
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| 150 | #define pPORTFIO_POLAR ((volatile uint16_t *)PORTFIO_POLAR) |
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| 151 | #define pPORTFIO_EDGE ((volatile uint16_t *)PORTFIO_EDGE) |
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| 152 | #define pPORTFIO_BOTH ((volatile uint16_t *)PORTFIO_BOTH) |
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| 153 | #define pPORTFIO_INEN ((volatile uint16_t *)PORTFIO_INEN) |
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| 154 | |
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| 155 | /* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */ |
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| 156 | #define pPORTGIO ((volatile uint16_t *)PORTGIO) |
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| 157 | #define pPORTGIO_CLEAR ((volatile uint16_t *)PORTGIO_CLEAR) |
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| 158 | #define pPORTGIO_SET ((volatile uint16_t *)PORTGIO_SET) |
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| 159 | #define pPORTGIO_TOGGLE ((volatile uint16_t *)PORTGIO_TOGGLE) |
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| 160 | #define pPORTGIO_MASKA ((volatile uint16_t *)PORTGIO_MASKA) |
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| 161 | #define pPORTGIO_MASKA_CLEAR ((volatile uint16_t *)PORTGIO_MASKA_CLEAR) |
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| 162 | #define pPORTGIO_MASKA_SET ((volatile uint16_t *)PORTGIO_MASKA_SET) |
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| 163 | #define pPORTGIO_MASKA_TOGGLE ((volatile uint16_t *)PORTGIO_MASKA_TOGGLE) |
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| 164 | #define pPORTGIO_MASKB ((volatile uint16_t *)PORTGIO_MASKB) |
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| 165 | #define pPORTGIO_MASKB_CLEAR ((volatile uint16_t *)PORTGIO_MASKB_CLEAR) |
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| 166 | #define pPORTGIO_MASKB_SET ((volatile uint16_t *)PORTGIO_MASKB_SET) |
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| 167 | #define pPORTGIO_MASKB_TOGGLE ((volatile uint16_t *)PORTGIO_MASKB_TOGGLE) |
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| 168 | #define pPORTGIO_DIR ((volatile uint16_t *)PORTGIO_DIR) |
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| 169 | #define pPORTGIO_POLAR ((volatile uint16_t *)PORTGIO_POLAR) |
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| 170 | #define pPORTGIO_EDGE ((volatile uint16_t *)PORTGIO_EDGE) |
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| 171 | #define pPORTGIO_BOTH ((volatile uint16_t *)PORTGIO_BOTH) |
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| 172 | #define pPORTGIO_INEN ((volatile uint16_t *)PORTGIO_INEN) |
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| 173 | |
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| 174 | |
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| 175 | /* Pin Control Registers (0xFFC01100 - 0xFFC012FF) */ |
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| 176 | #define pPORTF_FER ((volatile uint16_t *)PORTF_FER) |
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| 177 | #define pPORTF_MUX ((volatile uint16_t *)PORTF_MUX) |
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| 178 | #define pPORTF_PADCTL ((volatile uint16_t *)PORTF_PADCTL) |
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| 179 | #define pPORTG_FER ((volatile uint16_t *)PORTG_FER) |
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| 180 | #define pPORTG_MUX ((volatile uint16_t *)PORTG_MUX) |
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| 181 | #define pPORTG_PADCTL ((volatile uint16_t *)PORTG_PADCTL) |
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| 182 | |
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| 183 | /* SPORT Clock Gating (0xFFC0120C) */ |
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| 184 | #define pSPORT_GATECLK ((volatile uint16_t *)SPORT_GATECLK) |
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| 185 | |
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| 186 | /* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */ |
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| 187 | #define pSPORT0_TCR1 ((volatile uint16_t *)SPORT0_TCR1) |
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| 188 | #define pSPORT0_TCR2 ((volatile uint16_t *)SPORT0_TCR2) |
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| 189 | #define pSPORT0_TCLKDIV ((volatile uint16_t *)SPORT0_TCLKDIV) |
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| 190 | #define pSPORT0_TFSDIV ((volatile uint16_t *)SPORT0_TFSDIV) |
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| 191 | #define pSPORT0_TX ((volatile uint32_t *)SPORT0_TX) |
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| 192 | #define pSPORT0_RX ((volatile uint32_t *)SPORT0_RX) |
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| 193 | #define pSPORT0_TX32 ((volatile uint32_t *)SPORT0_TX) |
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| 194 | #define pSPORT0_RX32 ((volatile uint32_t *)SPORT0_RX) |
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| 195 | #define pSPORT0_TX16 ((volatile uint16_t *)SPORT0_TX) |
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| 196 | #define pSPORT0_RX16 ((volatile uint16_t *)SPORT0_RX) |
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| 197 | #define pSPORT0_RCR1 ((volatile uint16_t *)SPORT0_RCR1) |
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| 198 | #define pSPORT0_RCR2 ((volatile uint16_t *)SPORT0_RCR2) |
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| 199 | #define pSPORT0_RCLKDIV ((volatile uint16_t *)SPORT0_RCLKDIV) |
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| 200 | #define pSPORT0_RFSDIV ((volatile uint16_t *)SPORT0_RFSDIV) |
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| 201 | #define pSPORT0_STAT ((volatile uint16_t *)SPORT0_STAT) |
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| 202 | #define pSPORT0_CHNL ((volatile uint16_t *)SPORT0_CHNL) |
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| 203 | #define pSPORT0_MCMC1 ((volatile uint16_t *)SPORT0_MCMC1) |
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| 204 | #define pSPORT0_MCMC2 ((volatile uint16_t *)SPORT0_MCMC2) |
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| 205 | #define pSPORT0_MTCS0 ((volatile uint32_t *)SPORT0_MTCS0) |
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| 206 | #define pSPORT0_MTCS1 ((volatile uint32_t *)SPORT0_MTCS1) |
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| 207 | #define pSPORT0_MTCS2 ((volatile uint32_t *)SPORT0_MTCS2) |
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| 208 | #define pSPORT0_MTCS3 ((volatile uint32_t *)SPORT0_MTCS3) |
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| 209 | #define pSPORT0_MRCS0 ((volatile uint32_t *)SPORT0_MRCS0) |
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| 210 | #define pSPORT0_MRCS1 ((volatile uint32_t *)SPORT0_MRCS1) |
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| 211 | #define pSPORT0_MRCS2 ((volatile uint32_t *)SPORT0_MRCS2) |
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| 212 | #define pSPORT0_MRCS3 ((volatile uint32_t *)SPORT0_MRCS3) |
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| 213 | |
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| 214 | |
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| 215 | /* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */ |
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| 216 | #define pSPORT1_TCR1 ((volatile uint16_t *)SPORT1_TCR1) |
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| 217 | #define pSPORT1_TCR2 ((volatile uint16_t *)SPORT1_TCR2) |
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| 218 | #define pSPORT1_TCLKDIV ((volatile uint16_t *)SPORT1_TCLKDIV) |
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| 219 | #define pSPORT1_TFSDIV ((volatile uint16_t *)SPORT1_TFSDIV) |
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| 220 | #define pSPORT1_TX ((volatile uint32_t *)SPORT1_TX) |
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| 221 | #define pSPORT1_RX ((volatile uint32_t *)SPORT1_RX) |
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| 222 | #define pSPORT1_TX32 ((volatile uint32_t *)SPORT1_TX) |
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| 223 | #define pSPORT1_RX32 ((volatile uint32_t *)SPORT1_RX) |
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| 224 | #define pSPORT1_TX16 ((volatile uint16_t *)SPORT1_TX) |
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| 225 | #define pSPORT1_RX16 ((volatile uint16_t *)SPORT1_RX) |
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| 226 | #define pSPORT1_RCR1 ((volatile uint16_t *)SPORT1_RCR1) |
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| 227 | #define pSPORT1_RCR2 ((volatile uint16_t *)SPORT1_RCR2) |
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| 228 | #define pSPORT1_RCLKDIV ((volatile uint16_t *)SPORT1_RCLKDIV) |
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| 229 | #define pSPORT1_RFSDIV ((volatile uint16_t *)SPORT1_RFSDIV) |
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| 230 | #define pSPORT1_STAT ((volatile uint16_t *)SPORT1_STAT) |
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| 231 | #define pSPORT1_CHNL ((volatile uint16_t *)SPORT1_CHNL) |
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| 232 | #define pSPORT1_MCMC1 ((volatile uint16_t *)SPORT1_MCMC1) |
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| 233 | #define pSPORT1_MCMC2 ((volatile uint16_t *)SPORT1_MCMC2) |
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| 234 | #define pSPORT1_MTCS0 ((volatile uint32_t *)SPORT1_MTCS0) |
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| 235 | #define pSPORT1_MTCS1 ((volatile uint32_t *)SPORT1_MTCS1) |
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| 236 | #define pSPORT1_MTCS2 ((volatile uint32_t *)SPORT1_MTCS2) |
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| 237 | #define pSPORT1_MTCS3 ((volatile uint32_t *)SPORT1_MTCS3) |
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| 238 | #define pSPORT1_MRCS0 ((volatile uint32_t *)SPORT1_MRCS0) |
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| 239 | #define pSPORT1_MRCS1 ((volatile uint32_t *)SPORT1_MRCS1) |
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| 240 | #define pSPORT1_MRCS2 ((volatile uint32_t *)SPORT1_MRCS2) |
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| 241 | #define pSPORT1_MRCS3 ((volatile uint32_t *)SPORT1_MRCS3) |
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| 242 | |
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| 243 | |
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| 244 | /* DMA Traffic Control Registers (0xFFC00B00 - 0xFFC00BFF) */ |
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| 245 | #define pDMA_TC_PER ((volatile uint16_t *)DMA_TC_PER) |
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| 246 | #define pDMA_TC_CNT ((volatile uint16_t *)DMA_TC_CNT) |
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| 247 | |
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| 248 | /* Alternate deprecated register names (below) provided for backwards code compatibility */ |
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| 249 | #define pDMA_TCPER ((volatile uint16_t *)DMA_TCPER) |
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| 250 | #define pDMA_TCCNT ((volatile uint16_t *)DMA_TCCNT) |
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| 251 | |
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| 252 | /* DMA Controller (0xFFC00C00 - FFC00FFF)*/ |
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| 253 | #define pDMA0_CONFIG ((volatile uint16_t *)DMA0_CONFIG) |
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| 254 | #define pDMA0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR) |
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| 255 | #define pDMA0_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_START_ADDR) |
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| 256 | #define pDMA0_X_COUNT ((volatile uint16_t *)DMA0_X_COUNT) |
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| 257 | #define pDMA0_Y_COUNT ((volatile uint16_t *)DMA0_Y_COUNT) |
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| 258 | #define pDMA0_X_MODIFY ((volatile signed short *)DMA0_X_MODIFY) |
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| 259 | #define pDMA0_Y_MODIFY ((volatile signed short *)DMA0_Y_MODIFY) |
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| 260 | #define pDMA0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_DESC_PTR) |
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| 261 | #define pDMA0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA0_CURR_ADDR) |
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| 262 | #define pDMA0_CURR_X_COUNT ((volatile uint16_t *)DMA0_CURR_X_COUNT) |
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| 263 | #define pDMA0_CURR_Y_COUNT ((volatile uint16_t *)DMA0_CURR_Y_COUNT) |
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| 264 | #define pDMA0_IRQ_STATUS ((volatile uint16_t *)DMA0_IRQ_STATUS) |
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| 265 | #define pDMA0_PERIPHERAL_MAP ((volatile uint16_t *)DMA0_PERIPHERAL_MAP) |
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| 266 | |
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| 267 | #define pDMA1_CONFIG ((volatile uint16_t *)DMA1_CONFIG) |
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| 268 | #define pDMA1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_NEXT_DESC_PTR) |
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| 269 | #define pDMA1_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_START_ADDR) |
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| 270 | #define pDMA1_X_COUNT ((volatile uint16_t *)DMA1_X_COUNT) |
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| 271 | #define pDMA1_Y_COUNT ((volatile uint16_t *)DMA1_Y_COUNT) |
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| 272 | #define pDMA1_X_MODIFY ((volatile signed short *)DMA1_X_MODIFY) |
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| 273 | #define pDMA1_Y_MODIFY ((volatile signed short *)DMA1_Y_MODIFY) |
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| 274 | #define pDMA1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_DESC_PTR) |
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| 275 | #define pDMA1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA1_CURR_ADDR) |
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| 276 | #define pDMA1_CURR_X_COUNT ((volatile uint16_t *)DMA1_CURR_X_COUNT) |
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| 277 | #define pDMA1_CURR_Y_COUNT ((volatile uint16_t *)DMA1_CURR_Y_COUNT) |
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| 278 | #define pDMA1_IRQ_STATUS ((volatile uint16_t *)DMA1_IRQ_STATUS) |
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| 279 | #define pDMA1_PERIPHERAL_MAP ((volatile uint16_t *)DMA1_PERIPHERAL_MAP) |
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| 280 | |
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| 281 | #define pDMA2_CONFIG ((volatile uint16_t *)DMA2_CONFIG) |
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| 282 | #define pDMA2_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_NEXT_DESC_PTR) |
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| 283 | #define pDMA2_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_START_ADDR) |
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| 284 | #define pDMA2_X_COUNT ((volatile uint16_t *)DMA2_X_COUNT) |
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| 285 | #define pDMA2_Y_COUNT ((volatile uint16_t *)DMA2_Y_COUNT) |
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| 286 | #define pDMA2_X_MODIFY ((volatile signed short *)DMA2_X_MODIFY) |
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| 287 | #define pDMA2_Y_MODIFY ((volatile signed short *)DMA2_Y_MODIFY) |
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| 288 | #define pDMA2_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_DESC_PTR) |
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| 289 | #define pDMA2_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA2_CURR_ADDR) |
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| 290 | #define pDMA2_CURR_X_COUNT ((volatile uint16_t *)DMA2_CURR_X_COUNT) |
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| 291 | #define pDMA2_CURR_Y_COUNT ((volatile uint16_t *)DMA2_CURR_Y_COUNT) |
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| 292 | #define pDMA2_IRQ_STATUS ((volatile uint16_t *)DMA2_IRQ_STATUS) |
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| 293 | #define pDMA2_PERIPHERAL_MAP ((volatile uint16_t *)DMA2_PERIPHERAL_MAP) |
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| 294 | |
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| 295 | #define pDMA3_CONFIG ((volatile uint16_t *)DMA3_CONFIG) |
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| 296 | #define pDMA3_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_NEXT_DESC_PTR) |
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| 297 | #define pDMA3_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_START_ADDR) |
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| 298 | #define pDMA3_X_COUNT ((volatile uint16_t *)DMA3_X_COUNT) |
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| 299 | #define pDMA3_Y_COUNT ((volatile uint16_t *)DMA3_Y_COUNT) |
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| 300 | #define pDMA3_X_MODIFY ((volatile signed short *)DMA3_X_MODIFY) |
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| 301 | #define pDMA3_Y_MODIFY ((volatile signed short *)DMA3_Y_MODIFY) |
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| 302 | #define pDMA3_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_DESC_PTR) |
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| 303 | #define pDMA3_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA3_CURR_ADDR) |
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| 304 | #define pDMA3_CURR_X_COUNT ((volatile uint16_t *)DMA3_CURR_X_COUNT) |
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| 305 | #define pDMA3_CURR_Y_COUNT ((volatile uint16_t *)DMA3_CURR_Y_COUNT) |
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| 306 | #define pDMA3_IRQ_STATUS ((volatile uint16_t *)DMA3_IRQ_STATUS) |
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| 307 | #define pDMA3_PERIPHERAL_MAP ((volatile uint16_t *)DMA3_PERIPHERAL_MAP) |
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| 308 | |
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| 309 | #define pDMA4_CONFIG ((volatile uint16_t *)DMA4_CONFIG) |
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| 310 | #define pDMA4_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_NEXT_DESC_PTR) |
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| 311 | #define pDMA4_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_START_ADDR) |
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| 312 | #define pDMA4_X_COUNT ((volatile uint16_t *)DMA4_X_COUNT) |
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| 313 | #define pDMA4_Y_COUNT ((volatile uint16_t *)DMA4_Y_COUNT) |
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| 314 | #define pDMA4_X_MODIFY ((volatile signed short *)DMA4_X_MODIFY) |
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| 315 | #define pDMA4_Y_MODIFY ((volatile signed short *)DMA4_Y_MODIFY) |
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| 316 | #define pDMA4_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_DESC_PTR) |
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| 317 | #define pDMA4_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA4_CURR_ADDR) |
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| 318 | #define pDMA4_CURR_X_COUNT ((volatile uint16_t *)DMA4_CURR_X_COUNT) |
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| 319 | #define pDMA4_CURR_Y_COUNT ((volatile uint16_t *)DMA4_CURR_Y_COUNT) |
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| 320 | #define pDMA4_IRQ_STATUS ((volatile uint16_t *)DMA4_IRQ_STATUS) |
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| 321 | #define pDMA4_PERIPHERAL_MAP ((volatile uint16_t *)DMA4_PERIPHERAL_MAP) |
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| 322 | |
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| 323 | #define pDMA5_CONFIG ((volatile uint16_t *)DMA5_CONFIG) |
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| 324 | #define pDMA5_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_NEXT_DESC_PTR) |
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| 325 | #define pDMA5_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_START_ADDR) |
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| 326 | #define pDMA5_X_COUNT ((volatile uint16_t *)DMA5_X_COUNT) |
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| 327 | #define pDMA5_Y_COUNT ((volatile uint16_t *)DMA5_Y_COUNT) |
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| 328 | #define pDMA5_X_MODIFY ((volatile signed short *)DMA5_X_MODIFY) |
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| 329 | #define pDMA5_Y_MODIFY ((volatile signed short *)DMA5_Y_MODIFY) |
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| 330 | #define pDMA5_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_DESC_PTR) |
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| 331 | #define pDMA5_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA5_CURR_ADDR) |
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| 332 | #define pDMA5_CURR_X_COUNT ((volatile uint16_t *)DMA5_CURR_X_COUNT) |
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| 333 | #define pDMA5_CURR_Y_COUNT ((volatile uint16_t *)DMA5_CURR_Y_COUNT) |
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| 334 | #define pDMA5_IRQ_STATUS ((volatile uint16_t *)DMA5_IRQ_STATUS) |
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| 335 | #define pDMA5_PERIPHERAL_MAP ((volatile uint16_t *)DMA5_PERIPHERAL_MAP) |
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| 336 | |
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| 337 | #define pDMA6_CONFIG ((volatile uint16_t *)DMA6_CONFIG) |
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| 338 | #define pDMA6_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_NEXT_DESC_PTR) |
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| 339 | #define pDMA6_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_START_ADDR) |
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| 340 | #define pDMA6_X_COUNT ((volatile uint16_t *)DMA6_X_COUNT) |
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| 341 | #define pDMA6_Y_COUNT ((volatile uint16_t *)DMA6_Y_COUNT) |
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| 342 | #define pDMA6_X_MODIFY ((volatile signed short *)DMA6_X_MODIFY) |
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| 343 | #define pDMA6_Y_MODIFY ((volatile signed short *)DMA6_Y_MODIFY) |
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| 344 | #define pDMA6_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_DESC_PTR) |
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| 345 | #define pDMA6_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA6_CURR_ADDR) |
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| 346 | #define pDMA6_CURR_X_COUNT ((volatile uint16_t *)DMA6_CURR_X_COUNT) |
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| 347 | #define pDMA6_CURR_Y_COUNT ((volatile uint16_t *)DMA6_CURR_Y_COUNT) |
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| 348 | #define pDMA6_IRQ_STATUS ((volatile uint16_t *)DMA6_IRQ_STATUS) |
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| 349 | #define pDMA6_PERIPHERAL_MAP ((volatile uint16_t *)DMA6_PERIPHERAL_MAP) |
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| 350 | |
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| 351 | #define pDMA7_CONFIG ((volatile uint16_t *)DMA7_CONFIG) |
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| 352 | #define pDMA7_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_NEXT_DESC_PTR) |
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| 353 | #define pDMA7_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_START_ADDR) |
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| 354 | #define pDMA7_X_COUNT ((volatile uint16_t *)DMA7_X_COUNT) |
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| 355 | #define pDMA7_Y_COUNT ((volatile uint16_t *)DMA7_Y_COUNT) |
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| 356 | #define pDMA7_X_MODIFY ((volatile signed short *)DMA7_X_MODIFY) |
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| 357 | #define pDMA7_Y_MODIFY ((volatile signed short *)DMA7_Y_MODIFY) |
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| 358 | #define pDMA7_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_DESC_PTR) |
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| 359 | #define pDMA7_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA7_CURR_ADDR) |
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| 360 | #define pDMA7_CURR_X_COUNT ((volatile uint16_t *)DMA7_CURR_X_COUNT) |
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| 361 | #define pDMA7_CURR_Y_COUNT ((volatile uint16_t *)DMA7_CURR_Y_COUNT) |
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| 362 | #define pDMA7_IRQ_STATUS ((volatile uint16_t *)DMA7_IRQ_STATUS) |
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| 363 | #define pDMA7_PERIPHERAL_MAP ((volatile uint16_t *)DMA7_PERIPHERAL_MAP) |
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| 364 | |
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| 365 | #define pDMA8_CONFIG ((volatile uint16_t *)DMA8_CONFIG) |
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| 366 | #define pDMA8_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA8_NEXT_DESC_PTR) |
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| 367 | #define pDMA8_START_ADDR (_PTR_TO_VOL_VOID_PTR DMA8_START_ADDR) |
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| 368 | #define pDMA8_X_COUNT ((volatile uint16_t *)DMA8_X_COUNT) |
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| 369 | #define pDMA8_Y_COUNT ((volatile uint16_t *)DMA8_Y_COUNT) |
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| 370 | #define pDMA8_X_MODIFY ((volatile signed short *)DMA8_X_MODIFY) |
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| 371 | #define pDMA8_Y_MODIFY ((volatile signed short *)DMA8_Y_MODIFY) |
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| 372 | #define pDMA8_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA8_CURR_DESC_PTR) |
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| 373 | #define pDMA8_CURR_ADDR (_PTR_TO_VOL_VOID_PTR DMA8_CURR_ADDR) |
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| 374 | #define pDMA8_CURR_X_COUNT ((volatile uint16_t *)DMA8_CURR_X_COUNT) |
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| 375 | #define pDMA8_CURR_Y_COUNT ((volatile uint16_t *)DMA8_CURR_Y_COUNT) |
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| 376 | #define pDMA8_IRQ_STATUS ((volatile uint16_t *)DMA8_IRQ_STATUS) |
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| 377 | #define pDMA8_PERIPHERAL_MAP ((volatile uint16_t *)DMA8_PERIPHERAL_MAP) |
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| 378 | |
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| 379 | #define pMDMA_D0_CONFIG ((volatile uint16_t *)MDMA_D0_CONFIG) |
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| 380 | #define pMDMA_D0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_NEXT_DESC_PTR) |
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| 381 | #define pMDMA_D0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_START_ADDR) |
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| 382 | #define pMDMA_D0_X_COUNT ((volatile uint16_t *)MDMA_D0_X_COUNT) |
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| 383 | #define pMDMA_D0_Y_COUNT ((volatile uint16_t *)MDMA_D0_Y_COUNT) |
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| 384 | #define pMDMA_D0_X_MODIFY ((volatile signed short *)MDMA_D0_X_MODIFY) |
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| 385 | #define pMDMA_D0_Y_MODIFY ((volatile signed short *)MDMA_D0_Y_MODIFY) |
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| 386 | #define pMDMA_D0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_DESC_PTR) |
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| 387 | #define pMDMA_D0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D0_CURR_ADDR) |
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| 388 | #define pMDMA_D0_CURR_X_COUNT ((volatile uint16_t *)MDMA_D0_CURR_X_COUNT) |
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| 389 | #define pMDMA_D0_CURR_Y_COUNT ((volatile uint16_t *)MDMA_D0_CURR_Y_COUNT) |
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| 390 | #define pMDMA_D0_IRQ_STATUS ((volatile uint16_t *)MDMA_D0_IRQ_STATUS) |
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| 391 | #define pMDMA_D0_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_D0_PERIPHERAL_MAP) |
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| 392 | |
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| 393 | #define pMDMA_S0_CONFIG ((volatile uint16_t *)MDMA_S0_CONFIG) |
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| 394 | #define pMDMA_S0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_NEXT_DESC_PTR) |
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| 395 | #define pMDMA_S0_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_START_ADDR) |
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| 396 | #define pMDMA_S0_X_COUNT ((volatile uint16_t *)MDMA_S0_X_COUNT) |
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| 397 | #define pMDMA_S0_Y_COUNT ((volatile uint16_t *)MDMA_S0_Y_COUNT) |
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| 398 | #define pMDMA_S0_X_MODIFY ((volatile signed short *)MDMA_S0_X_MODIFY) |
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| 399 | #define pMDMA_S0_Y_MODIFY ((volatile signed short *)MDMA_S0_Y_MODIFY) |
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| 400 | #define pMDMA_S0_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_DESC_PTR) |
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| 401 | #define pMDMA_S0_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S0_CURR_ADDR) |
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| 402 | #define pMDMA_S0_CURR_X_COUNT ((volatile uint16_t *)MDMA_S0_CURR_X_COUNT) |
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| 403 | #define pMDMA_S0_CURR_Y_COUNT ((volatile uint16_t *)MDMA_S0_CURR_Y_COUNT) |
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| 404 | #define pMDMA_S0_IRQ_STATUS ((volatile uint16_t *)MDMA_S0_IRQ_STATUS) |
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| 405 | #define pMDMA_S0_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_S0_PERIPHERAL_MAP) |
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| 406 | |
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| 407 | #define pMDMA_D1_CONFIG ((volatile uint16_t *)MDMA_D1_CONFIG) |
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| 408 | #define pMDMA_D1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_NEXT_DESC_PTR) |
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| 409 | #define pMDMA_D1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_START_ADDR) |
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| 410 | #define pMDMA_D1_X_COUNT ((volatile uint16_t *)MDMA_D1_X_COUNT) |
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| 411 | #define pMDMA_D1_Y_COUNT ((volatile uint16_t *)MDMA_D1_Y_COUNT) |
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| 412 | #define pMDMA_D1_X_MODIFY ((volatile signed short *)MDMA_D1_X_MODIFY) |
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| 413 | #define pMDMA_D1_Y_MODIFY ((volatile signed short *)MDMA_D1_Y_MODIFY) |
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| 414 | #define pMDMA_D1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_DESC_PTR) |
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| 415 | #define pMDMA_D1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_D1_CURR_ADDR) |
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| 416 | #define pMDMA_D1_CURR_X_COUNT ((volatile uint16_t *)MDMA_D1_CURR_X_COUNT) |
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| 417 | #define pMDMA_D1_CURR_Y_COUNT ((volatile uint16_t *)MDMA_D1_CURR_Y_COUNT) |
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| 418 | #define pMDMA_D1_IRQ_STATUS ((volatile uint16_t *)MDMA_D1_IRQ_STATUS) |
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| 419 | #define pMDMA_D1_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_D1_PERIPHERAL_MAP) |
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| 420 | |
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| 421 | #define pMDMA_S1_CONFIG ((volatile uint16_t *)MDMA_S1_CONFIG) |
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| 422 | #define pMDMA_S1_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_NEXT_DESC_PTR) |
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| 423 | #define pMDMA_S1_START_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_START_ADDR) |
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| 424 | #define pMDMA_S1_X_COUNT ((volatile uint16_t *)MDMA_S1_X_COUNT) |
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| 425 | #define pMDMA_S1_Y_COUNT ((volatile uint16_t *)MDMA_S1_Y_COUNT) |
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| 426 | #define pMDMA_S1_X_MODIFY ((volatile signed short *)MDMA_S1_X_MODIFY) |
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| 427 | #define pMDMA_S1_Y_MODIFY ((volatile signed short *)MDMA_S1_Y_MODIFY) |
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| 428 | #define pMDMA_S1_CURR_DESC_PTR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_DESC_PTR) |
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| 429 | #define pMDMA_S1_CURR_ADDR (_PTR_TO_VOL_VOID_PTR MDMA_S1_CURR_ADDR) |
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| 430 | #define pMDMA_S1_CURR_X_COUNT ((volatile uint16_t *)MDMA_S1_CURR_X_COUNT) |
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| 431 | #define pMDMA_S1_CURR_Y_COUNT ((volatile uint16_t *)MDMA_S1_CURR_Y_COUNT) |
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| 432 | #define pMDMA_S1_IRQ_STATUS ((volatile uint16_t *)MDMA_S1_IRQ_STATUS) |
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| 433 | #define pMDMA_S1_PERIPHERAL_MAP ((volatile uint16_t *)MDMA_S1_PERIPHERAL_MAP) |
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| 434 | |
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| 435 | |
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| 436 | /* Parallel Peripheral Interface (0xFFC01000 - 0xFFC010FF) */ |
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| 437 | #define pPPI_CONTROL ((volatile uint16_t *)PPI_CONTROL) |
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| 438 | #define pPPI_STATUS ((volatile uint16_t *)PPI_STATUS) |
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| 439 | #define pPPI_DELAY ((volatile uint16_t *)PPI_DELAY) |
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| 440 | #define pPPI_COUNT ((volatile uint16_t *)PPI_COUNT) |
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| 441 | #define pPPI_FRAME ((volatile uint16_t *)PPI_FRAME) |
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| 442 | |
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| 443 | |
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| 444 | /* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ |
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| 445 | #define pTWI_CLKDIV ((volatile uint16_t *)TWI_CLKDIV) |
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| 446 | #define pTWI_CONTROL ((volatile uint16_t *)TWI_CONTROL) |
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| 447 | #define pTWI_SLAVE_CTL ((volatile uint16_t *)TWI_SLAVE_CTL) |
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| 448 | #define pTWI_SLAVE_STAT ((volatile uint16_t *)TWI_SLAVE_STAT) |
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| 449 | #define pTWI_SLAVE_ADDR ((volatile uint16_t *)TWI_SLAVE_ADDR) |
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| 450 | #define pTWI_MASTER_CTL ((volatile uint16_t *)TWI_MASTER_CTL) |
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| 451 | #define pTWI_MASTER_STAT ((volatile uint16_t *)TWI_MASTER_STAT) |
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| 452 | #define pTWI_MASTER_ADDR ((volatile uint16_t *)TWI_MASTER_ADDR) |
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| 453 | #define pTWI_INT_STAT ((volatile uint16_t *)TWI_INT_STAT) |
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| 454 | #define pTWI_INT_MASK ((volatile uint16_t *)TWI_INT_MASK) |
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| 455 | #define pTWI_FIFO_CTL ((volatile uint16_t *)TWI_FIFO_CTL) |
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| 456 | #define pTWI_FIFO_STAT ((volatile uint16_t *)TWI_FIFO_STAT) |
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| 457 | #define pTWI_XMT_DATA8 ((volatile uint16_t *)TWI_XMT_DATA8) |
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| 458 | #define pTWI_XMT_DATA16 ((volatile uint16_t *)TWI_XMT_DATA16) |
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| 459 | #define pTWI_RCV_DATA8 ((volatile uint16_t *)TWI_RCV_DATA8) |
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| 460 | #define pTWI_RCV_DATA16 ((volatile uint16_t *)TWI_RCV_DATA16) |
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| 461 | |
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| 462 | |
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| 463 | #ifdef _MISRA_RULES |
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| 464 | #pragma diag(pop) |
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| 465 | #endif /* _MISRA_RULES */ |
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| 466 | |
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| 467 | |
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| 468 | #endif /*_CDEF_BF59x_H*/ |
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