source: trunk/libs/newlib/src/libgloss/bfin/include/cdef_LPBlackfin.h @ 656

Last change on this file since 656 was 444, checked in by satin@…, 6 years ago

add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc

File size: 8.6 KB
Line 
1/*
2 * The authors hereby grant permission to use, copy, modify, distribute,
3 * and license this software and its documentation for any purpose, provided
4 * that existing copyright notices are retained in all copies and that this
5 * notice is included verbatim in any distributions. No written agreement,
6 * license, or royalty fee is required for any of the authorized uses.
7 * Modifications to this software may be copyrighted by their authors
8 * and need not follow the licensing terms described here, provided that
9 * the new terms are clearly indicated on the first page of each file where
10 * they apply.
11 */
12
13/************************************************************************
14 *
15 * cdef_LPBlackfin.h
16 *
17 * (c) Copyright 2002-2005 Analog Devices, Inc.  All rights reserved.
18 *
19 ************************************************************************/
20
21#ifndef _CDEF_LPBLACKFIN_H
22#define _CDEF_LPBLACKFIN_H
23
24#if !defined(__ADSPLPBLACKFIN__)
25#warning cdef_LPBlackfin.h should only be included for 532 compatible chips.
26#endif
27#include <def_LPBlackfin.h>
28
29#ifdef _MISRA_RULES
30#pragma diag(push)
31#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
32#endif /* _MISRA_RULES */
33
34#ifndef _PTR_TO_VOL_VOID_PTR
35#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
36#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
37#else
38#define _PTR_TO_VOL_VOID_PTR (volatile void **)
39#endif
40#endif
41
42/* Cache & SRAM Memory */
43#define pSRAM_BASE_ADDRESS (_PTR_TO_VOL_VOID_PTR SRAM_BASE_ADDRESS)
44#define pDMEM_CONTROL ((volatile unsigned long *)DMEM_CONTROL)
45#define pDCPLB_STATUS ((volatile unsigned long *)DCPLB_STATUS)
46#define pDCPLB_FAULT_ADDR (_PTR_TO_VOL_VOID_PTR DCPLB_FAULT_ADDR)
47#define pDCPLB_ADDR0 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR0)
48#define pDCPLB_ADDR1 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR1)
49#define pDCPLB_ADDR2 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR2)
50#define pDCPLB_ADDR3 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR3)
51#define pDCPLB_ADDR4 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR4)
52#define pDCPLB_ADDR5 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR5)
53#define pDCPLB_ADDR6 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR6)
54#define pDCPLB_ADDR7 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR7)
55#define pDCPLB_ADDR8 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR8)
56#define pDCPLB_ADDR9 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR9)
57#define pDCPLB_ADDR10 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR10)
58#define pDCPLB_ADDR11 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR11)
59#define pDCPLB_ADDR12 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR12)
60#define pDCPLB_ADDR13 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR13)
61#define pDCPLB_ADDR14 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR14)
62#define pDCPLB_ADDR15 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR15)
63#define pDCPLB_DATA0 ((volatile unsigned long *)DCPLB_DATA0)
64#define pDCPLB_DATA1 ((volatile unsigned long *)DCPLB_DATA1)
65#define pDCPLB_DATA2 ((volatile unsigned long *)DCPLB_DATA2)
66#define pDCPLB_DATA3 ((volatile unsigned long *)DCPLB_DATA3)
67#define pDCPLB_DATA4 ((volatile unsigned long *)DCPLB_DATA4)
68#define pDCPLB_DATA5 ((volatile unsigned long *)DCPLB_DATA5)
69#define pDCPLB_DATA6 ((volatile unsigned long *)DCPLB_DATA6)
70#define pDCPLB_DATA7 ((volatile unsigned long *)DCPLB_DATA7)
71#define pDCPLB_DATA8 ((volatile unsigned long *)DCPLB_DATA8)
72#define pDCPLB_DATA9 ((volatile unsigned long *)DCPLB_DATA9)
73#define pDCPLB_DATA10 ((volatile unsigned long *)DCPLB_DATA10)
74#define pDCPLB_DATA11 ((volatile unsigned long *)DCPLB_DATA11)
75#define pDCPLB_DATA12 ((volatile unsigned long *)DCPLB_DATA12)
76#define pDCPLB_DATA13 ((volatile unsigned long *)DCPLB_DATA13)
77#define pDCPLB_DATA14 ((volatile unsigned long *)DCPLB_DATA14)
78#define pDCPLB_DATA15 ((volatile unsigned long *)DCPLB_DATA15)
79#define pDTEST_COMMAND ((volatile unsigned long *)DTEST_COMMAND)
80#define pDTEST_DATA0 ((volatile unsigned long *)DTEST_DATA0)
81#define pDTEST_DATA1 ((volatile unsigned long *)DTEST_DATA1)
82#define pIMEM_CONTROL ((volatile unsigned long *)IMEM_CONTROL)
83#define pICPLB_STATUS ((volatile unsigned long *)ICPLB_STATUS)
84#define pICPLB_FAULT_ADDR (_PTR_TO_VOL_VOID_PTR ICPLB_FAULT_ADDR)
85#define pICPLB_ADDR0 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR0)
86#define pICPLB_ADDR1 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR1)
87#define pICPLB_ADDR2 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR2)
88#define pICPLB_ADDR3 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR3)
89#define pICPLB_ADDR4 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR4)
90#define pICPLB_ADDR5 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR5)
91#define pICPLB_ADDR6 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR6)
92#define pICPLB_ADDR7 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR7)
93#define pICPLB_ADDR8 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR8)
94#define pICPLB_ADDR9 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR9)
95#define pICPLB_ADDR10 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR10)
96#define pICPLB_ADDR11 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR11)
97#define pICPLB_ADDR12 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR12)
98#define pICPLB_ADDR13 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR13)
99#define pICPLB_ADDR14 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR14)
100#define pICPLB_ADDR15 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR15)
101#define pICPLB_DATA0 ((volatile unsigned long *)ICPLB_DATA0)
102#define pICPLB_DATA1 ((volatile unsigned long *)ICPLB_DATA1)
103#define pICPLB_DATA2 ((volatile unsigned long *)ICPLB_DATA2)
104#define pICPLB_DATA3 ((volatile unsigned long *)ICPLB_DATA3)
105#define pICPLB_DATA4 ((volatile unsigned long *)ICPLB_DATA4)
106#define pICPLB_DATA5 ((volatile unsigned long *)ICPLB_DATA5)
107#define pICPLB_DATA6 ((volatile unsigned long *)ICPLB_DATA6)
108#define pICPLB_DATA7 ((volatile unsigned long *)ICPLB_DATA7)
109#define pICPLB_DATA8 ((volatile unsigned long *)ICPLB_DATA8)
110#define pICPLB_DATA9 ((volatile unsigned long *)ICPLB_DATA9)
111#define pICPLB_DATA10 ((volatile unsigned long *)ICPLB_DATA10)
112#define pICPLB_DATA11 ((volatile unsigned long *)ICPLB_DATA11)
113#define pICPLB_DATA12 ((volatile unsigned long *)ICPLB_DATA12)
114#define pICPLB_DATA13 ((volatile unsigned long *)ICPLB_DATA13)
115#define pICPLB_DATA14 ((volatile unsigned long *)ICPLB_DATA14)
116#define pICPLB_DATA15 ((volatile unsigned long *)ICPLB_DATA15)
117#define pITEST_COMMAND ((volatile unsigned long *)ITEST_COMMAND)
118#define pITEST_DATA0 ((volatile unsigned long *)ITEST_DATA0)
119#define pITEST_DATA1 ((volatile unsigned long *)ITEST_DATA1)
120
121/* Event/Interrupt Registers */
122#define pEVT0 (_PTR_TO_VOL_VOID_PTR EVT0)
123#define pEVT1 (_PTR_TO_VOL_VOID_PTR EVT1)
124#define pEVT2 (_PTR_TO_VOL_VOID_PTR EVT2)
125#define pEVT3 (_PTR_TO_VOL_VOID_PTR EVT3)
126#define pEVT4 (_PTR_TO_VOL_VOID_PTR EVT4)
127#define pEVT5 (_PTR_TO_VOL_VOID_PTR EVT5)
128#define pEVT6 (_PTR_TO_VOL_VOID_PTR EVT6)
129#define pEVT7 (_PTR_TO_VOL_VOID_PTR EVT7)
130#define pEVT8 (_PTR_TO_VOL_VOID_PTR EVT8)
131#define pEVT9 (_PTR_TO_VOL_VOID_PTR EVT9)
132#define pEVT10 (_PTR_TO_VOL_VOID_PTR EVT10)
133#define pEVT11 (_PTR_TO_VOL_VOID_PTR EVT11)
134#define pEVT12 (_PTR_TO_VOL_VOID_PTR EVT12)
135#define pEVT13 (_PTR_TO_VOL_VOID_PTR EVT13)
136#define pEVT14 (_PTR_TO_VOL_VOID_PTR EVT14)
137#define pEVT15 (_PTR_TO_VOL_VOID_PTR EVT15)
138#define pIMASK ((volatile unsigned long *)IMASK)
139#define pIPEND ((volatile unsigned long *)IPEND)
140#define pILAT ((volatile unsigned long *)ILAT)
141
142/* Core Timer Registers */
143#define pTCNTL ((volatile unsigned long *)TCNTL)
144#define pTPERIOD ((volatile unsigned long *)TPERIOD)
145#define pTSCALE ((volatile unsigned long *)TSCALE)
146#define pTCOUNT ((volatile unsigned long *)TCOUNT)
147
148/* Debug/MP/Emulation Registers */
149#define pDSPID ((volatile unsigned long *)DSPID)
150#define pDBGCTL ((volatile unsigned long *)DBGCTL)
151#define pDBGSTAT ((volatile unsigned long *)DBGSTAT)
152#define pEMUDAT ((volatile unsigned long *)EMUDAT)
153
154/* Trace Buffer Registers */
155#define pTBUFCTL ((volatile unsigned long *)TBUFCTL)
156#define pTBUFSTAT ((volatile unsigned long *)TBUFSTAT)
157#define pTBUF (_PTR_TO_VOL_VOID_PTR TBUF)
158
159/* Watch Point Control Registers */
160#define pWPIACTL ((volatile unsigned long *)WPIACTL)
161#define pWPIA0 (_PTR_TO_VOL_VOID_PTR WPIA0)
162#define pWPIA1 (_PTR_TO_VOL_VOID_PTR WPIA1)
163#define pWPIA2 (_PTR_TO_VOL_VOID_PTR WPIA2)
164#define pWPIA3 (_PTR_TO_VOL_VOID_PTR WPIA3)
165#define pWPIA4 (_PTR_TO_VOL_VOID_PTR WPIA4)
166#define pWPIA5 (_PTR_TO_VOL_VOID_PTR WPIA5)
167#define pWPIACNT0 ((volatile unsigned long *)WPIACNT0)
168#define pWPIACNT1 ((volatile unsigned long *)WPIACNT1)
169#define pWPIACNT2 ((volatile unsigned long *)WPIACNT2)
170#define pWPIACNT3 ((volatile unsigned long *)WPIACNT3)
171#define pWPIACNT4 ((volatile unsigned long *)WPIACNT4)
172#define pWPIACNT5 ((volatile unsigned long *)WPIACNT5)
173#define pWPDACTL ((volatile unsigned long *)WPDACTL)
174#define pWPDA0 (_PTR_TO_VOL_VOID_PTR WPDA0)
175#define pWPDA1 (_PTR_TO_VOL_VOID_PTR WPDA1)
176#define pWPDACNT0 ((volatile unsigned long *)WPDACNT0)
177#define pWPDACNT1 ((volatile unsigned long *)WPDACNT1)
178#define pWPSTAT ((volatile unsigned long *)WPSTAT)
179
180/* Performance Monitor Registers */
181#define pPFCTL ((volatile unsigned long *)PFCTL)
182#define pPFCNTR0 ((volatile unsigned long *)PFCNTR0)
183#define pPFCNTR1 ((volatile unsigned long *)PFCNTR1)
184
185#ifdef _MISRA_RULES
186#pragma diag(pop)
187#endif /* _MISRA_RULES */
188
189#endif /* _CDEF_LPBLACKFIN_H */
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