1 | /* |
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2 | * The authors hereby grant permission to use, copy, modify, distribute, |
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3 | * and license this software and its documentation for any purpose, provided |
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4 | * that existing copyright notices are retained in all copies and that this |
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5 | * notice is included verbatim in any distributions. No written agreement, |
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6 | * license, or royalty fee is required for any of the authorized uses. |
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7 | * Modifications to this software may be copyrighted by their authors |
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8 | * and need not follow the licensing terms described here, provided that |
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9 | * the new terms are clearly indicated on the first page of each file where |
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10 | * they apply. |
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11 | */ |
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12 | |
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13 | /************************************************************************ |
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14 | * |
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15 | * cdef_LPBlackfin.h |
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16 | * |
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17 | * (c) Copyright 2002-2005 Analog Devices, Inc. All rights reserved. |
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18 | * |
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19 | ************************************************************************/ |
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20 | |
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21 | #ifndef _CDEF_LPBLACKFIN_H |
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22 | #define _CDEF_LPBLACKFIN_H |
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23 | |
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24 | #if !defined(__ADSPLPBLACKFIN__) |
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25 | #warning cdef_LPBlackfin.h should only be included for 532 compatible chips. |
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26 | #endif |
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27 | #include <def_LPBlackfin.h> |
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28 | |
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29 | #ifdef _MISRA_RULES |
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30 | #pragma diag(push) |
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31 | #pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant") |
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32 | #endif /* _MISRA_RULES */ |
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33 | |
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34 | #ifndef _PTR_TO_VOL_VOID_PTR |
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35 | #ifndef _USE_LEGACY_CDEF_BEHAVIOUR |
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36 | #define _PTR_TO_VOL_VOID_PTR (void * volatile *) |
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37 | #else |
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38 | #define _PTR_TO_VOL_VOID_PTR (volatile void **) |
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39 | #endif |
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40 | #endif |
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41 | |
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42 | /* Cache & SRAM Memory */ |
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43 | #define pSRAM_BASE_ADDRESS (_PTR_TO_VOL_VOID_PTR SRAM_BASE_ADDRESS) |
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44 | #define pDMEM_CONTROL ((volatile unsigned long *)DMEM_CONTROL) |
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45 | #define pDCPLB_STATUS ((volatile unsigned long *)DCPLB_STATUS) |
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46 | #define pDCPLB_FAULT_ADDR (_PTR_TO_VOL_VOID_PTR DCPLB_FAULT_ADDR) |
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47 | #define pDCPLB_ADDR0 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR0) |
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48 | #define pDCPLB_ADDR1 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR1) |
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49 | #define pDCPLB_ADDR2 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR2) |
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50 | #define pDCPLB_ADDR3 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR3) |
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51 | #define pDCPLB_ADDR4 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR4) |
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52 | #define pDCPLB_ADDR5 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR5) |
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53 | #define pDCPLB_ADDR6 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR6) |
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54 | #define pDCPLB_ADDR7 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR7) |
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55 | #define pDCPLB_ADDR8 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR8) |
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56 | #define pDCPLB_ADDR9 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR9) |
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57 | #define pDCPLB_ADDR10 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR10) |
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58 | #define pDCPLB_ADDR11 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR11) |
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59 | #define pDCPLB_ADDR12 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR12) |
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60 | #define pDCPLB_ADDR13 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR13) |
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61 | #define pDCPLB_ADDR14 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR14) |
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62 | #define pDCPLB_ADDR15 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR15) |
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63 | #define pDCPLB_DATA0 ((volatile unsigned long *)DCPLB_DATA0) |
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64 | #define pDCPLB_DATA1 ((volatile unsigned long *)DCPLB_DATA1) |
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65 | #define pDCPLB_DATA2 ((volatile unsigned long *)DCPLB_DATA2) |
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66 | #define pDCPLB_DATA3 ((volatile unsigned long *)DCPLB_DATA3) |
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67 | #define pDCPLB_DATA4 ((volatile unsigned long *)DCPLB_DATA4) |
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68 | #define pDCPLB_DATA5 ((volatile unsigned long *)DCPLB_DATA5) |
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69 | #define pDCPLB_DATA6 ((volatile unsigned long *)DCPLB_DATA6) |
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70 | #define pDCPLB_DATA7 ((volatile unsigned long *)DCPLB_DATA7) |
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71 | #define pDCPLB_DATA8 ((volatile unsigned long *)DCPLB_DATA8) |
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72 | #define pDCPLB_DATA9 ((volatile unsigned long *)DCPLB_DATA9) |
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73 | #define pDCPLB_DATA10 ((volatile unsigned long *)DCPLB_DATA10) |
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74 | #define pDCPLB_DATA11 ((volatile unsigned long *)DCPLB_DATA11) |
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75 | #define pDCPLB_DATA12 ((volatile unsigned long *)DCPLB_DATA12) |
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76 | #define pDCPLB_DATA13 ((volatile unsigned long *)DCPLB_DATA13) |
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77 | #define pDCPLB_DATA14 ((volatile unsigned long *)DCPLB_DATA14) |
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78 | #define pDCPLB_DATA15 ((volatile unsigned long *)DCPLB_DATA15) |
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79 | #define pDTEST_COMMAND ((volatile unsigned long *)DTEST_COMMAND) |
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80 | #define pDTEST_DATA0 ((volatile unsigned long *)DTEST_DATA0) |
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81 | #define pDTEST_DATA1 ((volatile unsigned long *)DTEST_DATA1) |
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82 | #define pIMEM_CONTROL ((volatile unsigned long *)IMEM_CONTROL) |
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83 | #define pICPLB_STATUS ((volatile unsigned long *)ICPLB_STATUS) |
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84 | #define pICPLB_FAULT_ADDR (_PTR_TO_VOL_VOID_PTR ICPLB_FAULT_ADDR) |
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85 | #define pICPLB_ADDR0 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR0) |
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86 | #define pICPLB_ADDR1 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR1) |
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87 | #define pICPLB_ADDR2 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR2) |
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88 | #define pICPLB_ADDR3 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR3) |
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89 | #define pICPLB_ADDR4 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR4) |
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90 | #define pICPLB_ADDR5 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR5) |
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91 | #define pICPLB_ADDR6 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR6) |
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92 | #define pICPLB_ADDR7 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR7) |
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93 | #define pICPLB_ADDR8 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR8) |
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94 | #define pICPLB_ADDR9 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR9) |
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95 | #define pICPLB_ADDR10 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR10) |
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96 | #define pICPLB_ADDR11 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR11) |
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97 | #define pICPLB_ADDR12 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR12) |
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98 | #define pICPLB_ADDR13 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR13) |
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99 | #define pICPLB_ADDR14 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR14) |
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100 | #define pICPLB_ADDR15 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR15) |
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101 | #define pICPLB_DATA0 ((volatile unsigned long *)ICPLB_DATA0) |
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102 | #define pICPLB_DATA1 ((volatile unsigned long *)ICPLB_DATA1) |
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103 | #define pICPLB_DATA2 ((volatile unsigned long *)ICPLB_DATA2) |
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104 | #define pICPLB_DATA3 ((volatile unsigned long *)ICPLB_DATA3) |
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105 | #define pICPLB_DATA4 ((volatile unsigned long *)ICPLB_DATA4) |
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106 | #define pICPLB_DATA5 ((volatile unsigned long *)ICPLB_DATA5) |
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107 | #define pICPLB_DATA6 ((volatile unsigned long *)ICPLB_DATA6) |
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108 | #define pICPLB_DATA7 ((volatile unsigned long *)ICPLB_DATA7) |
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109 | #define pICPLB_DATA8 ((volatile unsigned long *)ICPLB_DATA8) |
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110 | #define pICPLB_DATA9 ((volatile unsigned long *)ICPLB_DATA9) |
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111 | #define pICPLB_DATA10 ((volatile unsigned long *)ICPLB_DATA10) |
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112 | #define pICPLB_DATA11 ((volatile unsigned long *)ICPLB_DATA11) |
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113 | #define pICPLB_DATA12 ((volatile unsigned long *)ICPLB_DATA12) |
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114 | #define pICPLB_DATA13 ((volatile unsigned long *)ICPLB_DATA13) |
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115 | #define pICPLB_DATA14 ((volatile unsigned long *)ICPLB_DATA14) |
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116 | #define pICPLB_DATA15 ((volatile unsigned long *)ICPLB_DATA15) |
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117 | #define pITEST_COMMAND ((volatile unsigned long *)ITEST_COMMAND) |
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118 | #define pITEST_DATA0 ((volatile unsigned long *)ITEST_DATA0) |
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119 | #define pITEST_DATA1 ((volatile unsigned long *)ITEST_DATA1) |
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120 | |
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121 | /* Event/Interrupt Registers */ |
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122 | #define pEVT0 (_PTR_TO_VOL_VOID_PTR EVT0) |
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123 | #define pEVT1 (_PTR_TO_VOL_VOID_PTR EVT1) |
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124 | #define pEVT2 (_PTR_TO_VOL_VOID_PTR EVT2) |
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125 | #define pEVT3 (_PTR_TO_VOL_VOID_PTR EVT3) |
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126 | #define pEVT4 (_PTR_TO_VOL_VOID_PTR EVT4) |
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127 | #define pEVT5 (_PTR_TO_VOL_VOID_PTR EVT5) |
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128 | #define pEVT6 (_PTR_TO_VOL_VOID_PTR EVT6) |
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129 | #define pEVT7 (_PTR_TO_VOL_VOID_PTR EVT7) |
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130 | #define pEVT8 (_PTR_TO_VOL_VOID_PTR EVT8) |
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131 | #define pEVT9 (_PTR_TO_VOL_VOID_PTR EVT9) |
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132 | #define pEVT10 (_PTR_TO_VOL_VOID_PTR EVT10) |
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133 | #define pEVT11 (_PTR_TO_VOL_VOID_PTR EVT11) |
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134 | #define pEVT12 (_PTR_TO_VOL_VOID_PTR EVT12) |
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135 | #define pEVT13 (_PTR_TO_VOL_VOID_PTR EVT13) |
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136 | #define pEVT14 (_PTR_TO_VOL_VOID_PTR EVT14) |
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137 | #define pEVT15 (_PTR_TO_VOL_VOID_PTR EVT15) |
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138 | #define pIMASK ((volatile unsigned long *)IMASK) |
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139 | #define pIPEND ((volatile unsigned long *)IPEND) |
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140 | #define pILAT ((volatile unsigned long *)ILAT) |
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141 | |
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142 | /* Core Timer Registers */ |
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143 | #define pTCNTL ((volatile unsigned long *)TCNTL) |
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144 | #define pTPERIOD ((volatile unsigned long *)TPERIOD) |
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145 | #define pTSCALE ((volatile unsigned long *)TSCALE) |
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146 | #define pTCOUNT ((volatile unsigned long *)TCOUNT) |
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147 | |
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148 | /* Debug/MP/Emulation Registers */ |
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149 | #define pDSPID ((volatile unsigned long *)DSPID) |
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150 | #define pDBGCTL ((volatile unsigned long *)DBGCTL) |
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151 | #define pDBGSTAT ((volatile unsigned long *)DBGSTAT) |
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152 | #define pEMUDAT ((volatile unsigned long *)EMUDAT) |
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153 | |
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154 | /* Trace Buffer Registers */ |
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155 | #define pTBUFCTL ((volatile unsigned long *)TBUFCTL) |
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156 | #define pTBUFSTAT ((volatile unsigned long *)TBUFSTAT) |
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157 | #define pTBUF (_PTR_TO_VOL_VOID_PTR TBUF) |
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158 | |
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159 | /* Watch Point Control Registers */ |
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160 | #define pWPIACTL ((volatile unsigned long *)WPIACTL) |
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161 | #define pWPIA0 (_PTR_TO_VOL_VOID_PTR WPIA0) |
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162 | #define pWPIA1 (_PTR_TO_VOL_VOID_PTR WPIA1) |
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163 | #define pWPIA2 (_PTR_TO_VOL_VOID_PTR WPIA2) |
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164 | #define pWPIA3 (_PTR_TO_VOL_VOID_PTR WPIA3) |
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165 | #define pWPIA4 (_PTR_TO_VOL_VOID_PTR WPIA4) |
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166 | #define pWPIA5 (_PTR_TO_VOL_VOID_PTR WPIA5) |
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167 | #define pWPIACNT0 ((volatile unsigned long *)WPIACNT0) |
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168 | #define pWPIACNT1 ((volatile unsigned long *)WPIACNT1) |
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169 | #define pWPIACNT2 ((volatile unsigned long *)WPIACNT2) |
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170 | #define pWPIACNT3 ((volatile unsigned long *)WPIACNT3) |
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171 | #define pWPIACNT4 ((volatile unsigned long *)WPIACNT4) |
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172 | #define pWPIACNT5 ((volatile unsigned long *)WPIACNT5) |
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173 | #define pWPDACTL ((volatile unsigned long *)WPDACTL) |
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174 | #define pWPDA0 (_PTR_TO_VOL_VOID_PTR WPDA0) |
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175 | #define pWPDA1 (_PTR_TO_VOL_VOID_PTR WPDA1) |
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176 | #define pWPDACNT0 ((volatile unsigned long *)WPDACNT0) |
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177 | #define pWPDACNT1 ((volatile unsigned long *)WPDACNT1) |
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178 | #define pWPSTAT ((volatile unsigned long *)WPSTAT) |
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179 | |
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180 | /* Performance Monitor Registers */ |
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181 | #define pPFCTL ((volatile unsigned long *)PFCTL) |
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182 | #define pPFCNTR0 ((volatile unsigned long *)PFCNTR0) |
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183 | #define pPFCNTR1 ((volatile unsigned long *)PFCNTR1) |
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184 | |
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185 | #ifdef _MISRA_RULES |
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186 | #pragma diag(pop) |
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187 | #endif /* _MISRA_RULES */ |
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188 | |
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189 | #endif /* _CDEF_LPBLACKFIN_H */ |
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