| 1 | *** Registers | 
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| 2 | GR0     *always zero | 
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| 3 | GR1     scratch | 
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| 4 | GR2     normal return register | 
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| 5 | GR27    Global Data Pointer (Must be set in crt0) | 
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| 6 | GR30    SP stack pointer | 
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| 7 | GR31    milicode return pointer | 
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| 8 |  | 
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| 9 | SR*     Space registers | 
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| 10 |  | 
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| 11 | CR24-31 Temporary Control Registers | 
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| 12 | CR14    Vector Table Register (like VBR on an m68020) | 
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| 13 | CR0     Put in a count, causes exception when decremented to 0. | 
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| 14 |  | 
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| 15 | FORTH's magic number is 031240 | 
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| 16 |  | 
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| 17 | *** | 
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| 18 | Series 700/800 | 
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| 19 | The following options are also supported: | 
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| 20 |  | 
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| 21 | -snnn          set the initial system load (ISL) start address to | 
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| 22 | nnn in the volume label.  This is useful when | 
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| 23 | building boot media for Series 700/800 systems. | 
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| 24 |  | 
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| 25 | -lnnn          specifies the length in bytes of the ISL code in | 
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| 26 | the LIF volume. | 
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| 27 |  | 
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| 28 | -ennn          set the ISL entry point to nnn bytes from the | 
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| 29 | beginning of the ISL.  For example, specifying - | 
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| 30 | e3272 means that the ISL entry point is 3272 | 
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| 31 | (decimal) bytes from the beginning of the ISL | 
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| 32 | object module. | 
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| 33 |  | 
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| 34 | -Knnn          forces the directory start location to be the | 
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| 35 | nearest multiple of nnn x 1024 bytes from the | 
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| 36 | beginning of the volume.  This is necessary for | 
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| 37 | booting Series 700/800 systems from LIF media. | 
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| 38 |  | 
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| 39 | -n xxx         Sets the volume name to be xxx. | 
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| 40 | lifinit -v64000000 -d64 -nISL10 -K2 -s4096 -l61440 -e5336 this_lif | 
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| 41 |  | 
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| 42 | # lifcp -- | 
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| 43 | #       -r      Forces RAW mode copying. (file type BIN (-23951)) | 
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| 44 | #       -T      Sets the file type of the directory entry. | 
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| 45 | #       -Knnn   forces each file copied in to begin on a nnn x | 
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| 46 | #               1024-byte boundary from the beginning of the volume | 
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| 47 | #       Note: the word echoed below MUST be 10 characters exactly. | 
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| 48 | # | 
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| 49 | (echo "FORTH    ") | lifcp -r -T-030001 -K2 - this_lif:AUTO | 
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| 50 |  | 
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| 51 |  | 
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| 52 | # | 
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| 53 | # somxtract infile outfile -- | 
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| 54 | #       converts a series 800 file *only* into a raw image | 
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| 55 |  | 
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| 56 | It turns out the native cc and our current gcc produce series 700 | 
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| 57 | output, so in this case it runs till if fills up the hard disk. | 
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| 58 |  | 
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| 59 | *** rombootlf5 is a FORTH interpreter in a "boot" image. (it won't run on | 
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| 60 | the HP742 board) | 
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| 61 |  | 
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| 62 | lifls -l rombootlf5 | 
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| 63 | volume ISL10 data size 249984 directory size 8 94/04/20 10:26:36 | 
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| 64 | filename   type   start   size     implement  created | 
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| 65 | =============================================================== | 
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| 66 | ISL        -12800 16      240      0          94/04/20 10:26:36 | 
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| 67 | HPUX       -12928 256     496      0          94/04/20 10:26:37 | 
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| 68 | IOMAP      -12960 752     1504     0          94/04/20 10:26:37 | 
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| 69 | AUTO       -12289 2256    1        0          94/04/20 10:26:38 | 
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| 70 | FORTH      -12960 2264    208      0          94/04/20 10:26:38 | 
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| 71 | HPFORTH    ASCII  2472    420      0          94/04/20 10:26:38 | 
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| 72 | BOOTROM    ASCII  2896    3849     0          94/04/20 10:26:40 | 
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| 73 | PAD1       -12290 6752    1172     0          94/04/20 10:26:40 | 
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| 74 |  | 
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| 75 | *** The ISL is only needed when booting the raw hardware. As we're runing | 
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| 76 | on a monitor (barely) all we need is a crt0 that initiallizes the GR27 | 
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| 77 | Global Data Pointer and zero's bss. | 
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| 78 |  | 
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| 79 | *** Initial Program Load | 
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| 80 | -------------------- | 
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| 81 | From page 11-56, architecture book. | 
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| 82 | 0x00000000 +------------------------------------+ 0 | 
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| 83 | |    LIF_MAGIC       |               | | 
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| 84 | 0x00000004 +------------------------------------+ 4 | 
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| 85 | |                                    | | 
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| 86 | 0x000000F0 +------------------------------------+ 240 | 
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| 87 | |            IPL_ADDR                | | 
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| 88 | 0x000000F4 +------------------------------------+ 244 | 
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| 89 | |            IPL_SIZE                | | 
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| 90 | 0x000000F8 +------------------------------------+ 248 | 
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| 91 | |            IPL_ENTRY               | | 
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| 92 | 0x000000FC +------------------------------------+ 252 | 
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| 93 | |                                    | | 
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| 94 | IPL_ADDR   +------------------------------------+ IPL_ADDR | 
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| 95 | |        Position Independant        | | 
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| 96 | |            IPL Code                | | 
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| 97 | |    (including IPL_CHECKSUM)        | | 
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| 98 | +------------------------------------+ IPL_ADDR + IPL_SIZE | 
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| 99 | |                                    | | 
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| 100 | +------------------------------------+ | 
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| 101 |  | 
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| 102 | IPL_ADDR        2 Kbyte aligned, nonzero | 
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| 103 | IPL_SIZE        Multiple of 2Kbytes, <= 256 Kbytes | 
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| 104 | IPL_ENTRY       Word aligned, less than IPL_SIZE | 
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| 105 |  | 
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| 106 | Loads at IPL_START | 
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| 107 |  | 
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| 108 | This is based on Cobra/Coral hardware: | 
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| 109 | LED register at 0xf080024 | 
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| 110 | I/O status register at 0xf0800000 | 
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| 111 | EEPROM at 0xf0810000 (LAN ID begins at byte 0) | 
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| 112 |  | 
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| 113 | Here's a dump of the LIF volume header using "xd" (od with hex output) | 
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| 114 |  | 
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| 115 | * | 
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| 116 | 00000f0 0000 1000 0000 9800 0000 0000 0000 0000 | 
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| 117 | ^^^^ | 
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| 118 | This is the size | 
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| 119 | * | 
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| 120 | 0000800 5445 5354 2020 2020 2020 a271 0000 0010 | 
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| 121 | ^^^^ ^^^^ ^^^^ ^^^^ ^^^^           ^^^^<-- this is the ipl offset | 
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| 122 | this is the vol name     ^^^^<- this is the type | 
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| 123 |  | 
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| 124 | 0000810 0000 0098 9407 1919 1426 8001 0000 0000 | 
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| 125 | ^^^^ | 
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| 126 | This is the ipl size | 
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| 127 |  | 
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| 128 | Interupts | 
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| 129 | --------- | 
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| 130 | The vector table is access by %iva (%cr14). The address here must be a | 
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| 131 | multiple of 2048. The indexes are: | 
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| 132 | 1       high-priority | 
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| 133 | 2       power failure | 
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| 134 | 3       recovery counter | 
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| 135 | 4       external interrupt | 
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| 136 | 5       low-priority machine check | 
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| 137 | 6       instruction TLB miss/instruction page fault | 
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| 138 | 7       instruction memory protection | 
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| 139 | 8       illegal instruction | 
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| 140 | 9       break instruction | 
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| 141 | 10      priviledged operation | 
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| 142 | 11      priviledged register | 
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| 143 | 12      overflow | 
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| 144 | 13      conditional | 
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| 145 | 14      assist exception | 
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| 146 | 15      data TLB miss fault/data page fault | 
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| 147 | 16      non access instruction TLB miss fault | 
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| 148 | 17      non access page TLB miss fault/non access data page fault | 
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| 149 | 18      data memory protection/unaligned data reference | 
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| 150 | 19      data memory break | 
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| 151 | 20      TLB dirty bit | 
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| 152 | 21      page reference | 
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| 153 | 22      assist emulation | 
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| 154 | 23      higher-priority transfer | 
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| 155 | 24      lower-priority transfe | 
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| 156 | 25      taken branch | 
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