[444] | 1 | /* Stand-alone library for M32R-EVA board. |
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| 2 | * |
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| 3 | * Copyright (c) 1996, 1998 Cygnus Support |
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| 4 | * |
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| 5 | * The authors hereby grant permission to use, copy, modify, distribute, |
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| 6 | * and license this software and its documentation for any purpose, provided |
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| 7 | * that existing copyright notices are retained in all copies and that this |
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| 8 | * notice is included verbatim in any distributions. No written agreement, |
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| 9 | * license, or royalty fee is required for any of the authorized uses. |
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| 10 | * Modifications to this software may be copyrighted by their authors |
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| 11 | * and need not follow the licensing terms described here, provided that |
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| 12 | * the new terms are clearly indicated on the first page of each file where |
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| 13 | * they apply. |
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| 14 | */ |
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| 15 | |
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| 16 | /* #define REVC to enable handling of the original RevC board, |
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| 17 | which is no longer the default, nor is it supported. */ |
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| 18 | |
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| 19 | #ifndef REVC |
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| 20 | |
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| 21 | /* Serial I/O routines for MSA2000G01 board */ |
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| 22 | #define UART_INCHAR_ADDR 0xff004009 |
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| 23 | #define UART_OUTCHR_ADDR 0xff004007 |
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| 24 | #define UART_STATUS_ADDR 0xff004002 |
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| 25 | |
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| 26 | #else |
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| 27 | |
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| 28 | /* Serial I/O routines for M32R-EVA board */ |
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| 29 | #define UART_INCHAR_ADDR 0xff102013 |
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| 30 | #define UART_OUTCHR_ADDR 0xff10200f |
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| 31 | #define UART_STATUS_ADDR 0xff102006 |
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| 32 | |
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| 33 | #endif |
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| 34 | |
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| 35 | #define UART_INPUT_EMPTY 0x4 |
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| 36 | #define UART_OUTPUT_EMPTY 0x1 |
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| 37 | |
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| 38 | static volatile char *rx_port = (unsigned char *) UART_INCHAR_ADDR; |
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| 39 | static volatile char *tx_port = (char *) UART_OUTCHR_ADDR; |
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| 40 | static volatile short *rx_status = (short *) UART_STATUS_ADDR; |
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| 41 | static volatile short *tx_status = (short *) UART_STATUS_ADDR; |
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| 42 | |
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| 43 | static int |
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| 44 | rx_rdy() |
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| 45 | { |
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| 46 | #ifndef REVC |
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| 47 | return (*rx_status & UART_INPUT_EMPTY); |
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| 48 | #else |
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| 49 | return !(*rx_status & UART_INPUT_EMPTY); |
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| 50 | #endif |
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| 51 | } |
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| 52 | |
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| 53 | static int |
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| 54 | tx_rdy() |
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| 55 | { |
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| 56 | return (*tx_status & UART_OUTPUT_EMPTY); |
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| 57 | } |
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| 58 | |
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| 59 | static unsigned char |
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| 60 | rx_uchar() |
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| 61 | { |
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| 62 | return *rx_port; |
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| 63 | } |
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| 64 | |
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| 65 | void |
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| 66 | tx_char(char c) |
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| 67 | { |
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| 68 | *tx_port = c; |
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| 69 | } |
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| 70 | |
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| 71 | int |
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| 72 | getDebugChar() |
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| 73 | { |
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| 74 | while (!rx_rdy()) |
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| 75 | ; |
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| 76 | return rx_uchar(); |
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| 77 | } |
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| 78 | |
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| 79 | void |
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| 80 | putDebugChar(int c) |
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| 81 | { |
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| 82 | while (!tx_rdy()) |
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| 83 | ; |
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| 84 | tx_char(c); |
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| 85 | } |
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| 86 | |
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| 87 | void mesg(char *p) |
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| 88 | { |
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| 89 | while (*p) |
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| 90 | { |
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| 91 | if (*p == '\n') |
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| 92 | putDebugChar('\r'); |
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| 93 | putDebugChar(*p++); |
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| 94 | } |
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| 95 | } |
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| 96 | |
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| 97 | void phex(long x) |
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| 98 | { |
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| 99 | char buf[9]; |
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| 100 | int i; |
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| 101 | |
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| 102 | buf[8] = '\0'; |
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| 103 | for (i = 7; i >= 0; i--) |
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| 104 | { |
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| 105 | char c = x & 0x0f; |
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| 106 | buf[i] = c < 10 ? c + '0' : c - 10 + 'A'; |
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| 107 | x >>= 4; |
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| 108 | } |
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| 109 | mesg(buf); |
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| 110 | } |
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| 111 | |
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| 112 | /* |
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| 113 | * These routines set and get exception handlers. They look a little |
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| 114 | * funny because the M32R uses branch instructions in its exception |
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| 115 | * vectors, not just the addresses. The instruction format used is |
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| 116 | * BRA pcdisp24. |
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| 117 | */ |
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| 118 | |
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| 119 | #define TRAP_VECTOR_BASE_ADDR 0x00000040 |
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| 120 | |
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| 121 | /* Setup trap TT to go to ROUTINE. */ |
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| 122 | void |
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| 123 | exceptionHandler (int tt, unsigned long routine) |
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| 124 | { |
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| 125 | #ifndef REVC |
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| 126 | unsigned long *tb = (unsigned long *) TRAP_VECTOR_BASE_ADDR; |
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| 127 | tb[tt] = (0xff000000 | ((routine - (unsigned long) (&tb[tt])) >> 2)); |
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| 128 | #else |
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| 129 | unsigned long *tb = 0; /* Trap vector base address */ |
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| 130 | |
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| 131 | tb[tt] = ((routine >> 2) | 0xff000000) - tt; |
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| 132 | #endif |
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| 133 | } |
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| 134 | |
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| 135 | /* Return the address of trap TT handler */ |
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| 136 | unsigned long |
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| 137 | getExceptionHandler (int tt) |
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| 138 | { |
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| 139 | #ifndef REVC |
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| 140 | unsigned long *tb = (unsigned long *) TRAP_VECTOR_BASE_ADDR; |
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| 141 | return ((tb[tt] & ~0xff000000) << 2) + (unsigned long) (&tb[tt]); |
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| 142 | #else |
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| 143 | unsigned long *tb = 0; /* Trap vector base address */ |
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| 144 | |
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| 145 | return ((tb[tt] + tt) | 0xff000000) << 2; |
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| 146 | #endif |
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| 147 | } |
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