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fido-crt0.S @ 675

Last change on this file since 675 was 444, checked in by satin@…, 7 years ago
add newlib,libalmos-mkh, restructure shared_syscalls.h and mini-libc
File size: 27.5 KB

Rev	Line
[444]	1	/**
	2	* fido-crt0.S -- Simple startup code
	3	*
	4	* Copyright (c) 1995, 1996, 1998 Cygnus Support
	5	*
	6	* The authors hereby grant permission to use, copy, modify, distribute,
	7	* and license this software and its documentation for any purpose, provided
	8	* that existing copyright notices are retained in all copies and that this
	9	* notice is included verbatim in any distributions. No written agreement,
	10	* license, or royalty fee is required for any of the authorized uses.
	11	* Modifications to this software may be copyrighted by their authors
	12	* and need not follow the licensing terms described here, provided that
	13	* the new terms are clearly indicated on the first page of each file where
	14	* they apply.
	15	*
	16	* Copyright 2006 Innovasic Semiconductor, All Rights Reserved.
	17	* Part of the fido Realtime Support Library
	18	*
	19	* Description:
	20	* This routine performs initializations assuming a Fido
	21	* development board. In order, the following functions are performed:
	22	*
	23	* -- memory offset register initialization
	24	* -- chip select register initialization for external memory
	25	* -- SDRAM ctrl register initialization for external memory
	26	* -- in line test of external SRAM
	27	* -- sets user SP for MasterContext0 (main)
	28	* -- copies the bss section to RAM
	29	* -- transfers control to MasterContext0 (main)
	30	*
	31	*/
	32
	33	#include "asm.h"
	34	#include "fido.h"
	35
	36	.title "fido-crt0.S for Fido"
	37
	38	/----------------------------------------------------------------------------/
	39	//--------- 66 MHz values --------
	40	// set up CS0 for flash
	41	#define CS0_CTRL_VAL 0x0000024A
	42	#define CS0_TIMING_VAL 0x01000000
	43
	44	// set up CS1 for SDRAM
	45	#define CS1_CTRL_VAL 0x0200030A /* selects SDRAM ctrl instead of CS1 */
	46	#define CS1_TIMING_VAL 0x00000000 /* N/A for SDRAM operation */
	47	#define SDRAM_TIMING_0_VAL 0x00022522 /* TRP=0x2, TRCD=0x2, TRF=0x5, TWR=0x5 TCL=0x5 */
	48	#define SDRAM_TIMING_1_VAL 0x00120407 /* INI_PREC=0x1, INI_REFT=0x2, REF_INTV=0x407 */
	49	#define SDRAM_CONFIG_0_VAL 0x00002113 /* MA2T=0, DDW=x16device=0x2, dsz=64MBit, mbw=16bit, bnksz=8Mbyte */
	50	#define SDRAM_CONFIG_1_VAL 0x00000000 /* IPREC=0, IREF=0, ISMR=0, PWDN=0, SREF=0 */
	51	#define SDRAM_EXT_BANK_1_VAL 0x00001020 /* SDRAM memory bank 0 at addr 0x0200_0000 */
	52
	53	// set up CS2 for SRAM
	54	#define CS2_CTRL_VAL 0x03000267
	55	#define CS2_TIMING_VAL 0x08400000
	56	/----------------------------------------------------------------------------/
	57
	58	#define EXT_SRAM_END_ADDR 0x30FFFFC /* 1 MB of ext. SRAM (2-512Kx8 chips) */
	59	#define PERP_PWRUP_MASK 0x0000 /* turn on all peripherals */
	60
	61	/*
	62	* Define an empty environment.
	63	*/
	64	.data 2
	65	.align 2
	66	SYM (environ):
	67	.long 0
	68
	69	.align 2
	70	.text 2
	71
	72	/*
	73	* These symbols are defined in C code, so they need to always be
	74	* named with SYM because of the difference between object file formats.
	75	*/
	76
	77	/* These are defined in C code. */
	78	/* .extern SYM (main) */
	79	.extern SYM (exit)
	80	.extern SYM (hardware_init_hook)
	81	.extern SYM (software_init_hook)
	82	.extern SYM (atexit)
	83	.extern SYM (__do_global_dtors)
	84	/*
	85	* These values are set in the linker script, so they must be
	86	* explicitly named here without SYM.
	87	*/
	88	#ifdef FIDO_rom
	89	.extern __stack
	90	#endif
	91	.extern __bss_start
	92	.extern _end
	93
	94	/*
	95	* set things up so application will run. This must be called _start.
	96	*/
	97	.global SYM (_start)
	98
	99	SYM (_start):
	100
	101	#ifdef FIDO_rom
	102	/* save initial value of base offset register */
	103	movec mbb,d7
	104
	105	/* Initialize memory offset register to offset value in FIDOmemmap.h */
	106	movel #FIDO_MEM_OFFSET,d0 /* Load memory offset into REG d0 */
	107	movec d0,mbb
	108
	109	movel #0x011, FIDO_DBG_CTRL /* set the debug control reg */
	110
	111	/* At POR the PerpPowerCtrlReg is set to 0x3F0F, all peripherals off
	112	See PerpPowerCtrlReg definition, this example turns ON everything */
	113	movel #PERP_PWRUP_MASK,FIDO_CLOCK_MASK_REGISTER
	114
	115	/* Set up chip selects for ROM, SRAM, and SDRAM (all external mem.) */
	116	movel #CS0_CTRL_VAL, FIDO_BIU_CS0_CONTROL /* flash memory CS0 */
	117	movel #CS0_TIMING_VAL, FIDO_BIU_CS0_TIMING
	118
	119	movel #CS2_CTRL_VAL, FIDO_BIU_CS2_CONTROL /* SRAM memory CS2 */
	120	movel #CS2_TIMING_VAL, FIDO_BIU_CS2_TIMING
	121
	122	/* if this is not POR then say so */
	123	movel FIDO_POR_REG,d6
	124
	125	/* test external SRAM -- */
	126	/* a0 == working pointer */
	127	/* a1 == pointer to base of memory */
	128	/* a2 == pointer to end of memory */
	129	/* d0,d1,d2,d3 working registers */
	130
	131	moveal #0x3000000,a1
	132	moveal #0x30FFFFC,a2
	133
	134	movel a1,a0
	135	/* walking ones */
	136	movel #1,d0
	137
	138	.LWalkOnes:
	139	movel d0, (a0) /* write value out */
	140	cmpl (a0), d0 /* read it back */
	141	bne .LFailOnes
	142	lsl.l #1, d0 /* move to next value */
	143	bne .LWalkOnes /* when it goes to zero you're done */
	144	bra .LValTest
	145	.LFailOnes:
	146	movel #0x01, d0
	147	bra .LMemTestEnd
	148
	149	.LValTest:
	150	/* ffff's */
	151	/* 5555's */
	152	/* aaaa's */
	153	/* 0000's */
	154	movel a1,a0
	155	movel #0xFFFFFFFF,d0
	156
	157	.LValLoop:
	158	movel d0,(a0) /* write value out */
	159	cmpl (a0)+, d0 /* compare and move to next */
	160	bne .LFailVal
	161	cmpl a0,a2 /* at end of memory? */
	162	bge .LValLoop
	163	movel d0,d0 /* done writing zeros? */
	164	beq .LAddrTest
	165	movel a1,a0 /* go back to start with next value */
	166	subl #0x55555555,d0 /* get next value (f->a->5->0) */
	167	bra .LValLoop
	168	.LFailVal:
	169	movel #0x02, d0
	170	bra .LMemTestEnd
	171
	172	.LAddrTest:
	173	/* unique values */
	174	movel a1,a0
	175	.LWriteLoop:
	176	movel a0, (a0)+ /* write value out and move one */
	177	cmpl a0,a2 /* look for end of memory */
	178	bge .LWriteLoop
	179
	180	movel a1,a0
	181	.LReadLoop:
	182	cmpl (a0), a0 /* compare value and move on */
	183	bne .LFailAddr
	184	addql #4,a0
	185	cmpl a0,a2 /* look for end of memory */
	186	bge .LReadLoop
	187	clrl d0 /* everything passed */
	188	bra .LMemTestEnd
	189
	190	.LFailAddr:
	191	movel #0x03, d0
	192
	193	.LMemTestEnd:
	194	movel d0,d4 /* mem test result in d4 0 == pass */
	195	#endif /* ROM */
	196
	197	/* See if user supplied their own stack (__stack != 0). If not, then
	198	* default to using the value of %sp as set by the ROM monitor */
	199	movel IMM(__stack), a0
	200	cmpl IMM(0), a0
	201	jbeq .Lloc1
	202	movel a0, sp
	203	.Lloc1:
	204	/* set up initial stack frame */
	205	link a6, IMM(-8)
	206
	207	#ifdef FIDO_rom
	208	/*
	209	* Now set up the SDRAM (waited to let the controller spin up)
	210	*/
	211	/* always initialize SDRAM regs, they're cleared by any reset */
	212	/* SDRAM enbl bit set in CS1 re-directs to SDRAM controller regs */
	213
	214	movel #CS1_CTRL_VAL, FIDO_BIU_CS1_CONTROL /* SDRAM memory CS1 */
	215	movel #SDRAM_TIMING_0_VAL, FIDO_SDRAM_TIMING_0 /* SDRAM TIMING REG0 */
	216	movel #SDRAM_TIMING_1_VAL, FIDO_SDRAM_TIMING_1 /* SDRAM TIMING REG1 */
	217	movel #SDRAM_CONFIG_0_VAL, FIDO_SDRAM_CONFIG_0 /* SDRAM CONFIG REG */
	218	movel #0x0000001c, FIDO_SDRAM_CONFIG_1 /* SDRAM CONFIG REG */
	219
	220	.LsdConfigLoop:
	221	movel FIDO_SDRAM_CONFIG_1,d0
	222	cmpl #0x00000000,d0
	223	bne .LsdConfigLoop
	224
	225	movel #SDRAM_EXT_BANK_1_VAL, FIDO_SDRAM_EXT_BANK_1 /* BANK 1 REG */
	226
	227	/*
	228	* copy data from ROM to RAM
	229	*/
	230
	231	moval IMM(__start_romdata),a0 /* begin data in ROM */
	232	moval IMM(_data), a1 /* begin data in RAM */
	233	moval IMM(_edata),a2 /* end of data in RAM */
	234
	235	/* while(a1 < a2) a1++ = a0++; */
	236	.LdataCopyLoop:
	237	movel (a0)+,(a1)+
	238	cmpal a1,a2
	239	bgt .LdataCopyLoop
	240	#endif /* ROM */
	241
	242	#ifdef FIDO_ram
	243	/* For ROM configs, the linker script ensures that
	244	_vector_table is placed at the proper place. For RAM
	245	configs, we have to adjust it ourselves. */
	246	movel IMM (SYM (_vector_table)), FIDO_CTX0_VBR
	247	#endif
	248
	249	#ifndef FIDO_redboot
	250	/* Setup interrupt vectors for secondary contexts. */
	251	movel IMM (SYM (_vector_table1)), FIDO_CTX1_VBR
	252	movel IMM (SYM (_vector_table2)), FIDO_CTX2_VBR
	253	movel IMM (SYM (_vector_table3)), FIDO_CTX3_VBR
	254	movel IMM (SYM (_vector_table4)), FIDO_CTX4_VBR
	255	#endif
	256
	257	/*
	258	* zero out the bss section.
	259	*/
	260	movel IMM(__bss_start), d1
	261	movel IMM(_end), d0
	262	cmpl d0, d1
	263	jbeq .Lloc3
	264	movl d1, a0
	265	subl d1, d0
	266	subql IMM(1), d0
	267	2:
	268	clrb (a0)+
	269	#ifndef __mcf5200__
	270	dbra d0, 2b
	271	clrw d0
	272	subql IMM(1), d0
	273	jbcc 2b
	274	#else
	275	subql IMM(1), d0
	276	jbpl 2b
	277	#endif
	278
	279	.Lloc3:
	280
	281	#ifdef ADD_DTORS
	282	/* put __do_global_dtors in the atexit list so the destructors get run */
	283	movel IMM (SYM(__do_global_dtors)),(sp)
	284	jsr SYM (atexit)
	285	#endif
	286	movel IMM (_fini),(sp)
	287	jsr SYM (atexit)
	288
	289	jsr _init
	290
	291	/*
	292	* call the main routine from the application to get it going.
	293	* main (argc, argv, environ)
	294	* we pass argv as a pointer to NULL.
	295	*/
	296
	297	pea 0
	298	pea SYM (environ)
	299	pea sp@(4)
	300	pea 0
	301	jsr SYM (main) /* call to main */
	302	movel d0, sp@-
	303
	304	/*
	305	* drop down into exit in case the user doesn't. This should drop
	306	* control back to the ROM monitor, if there is one. This calls the
	307	* exit() from the C library so the C++ tables get cleaned up right.
	308	*/
	309	jsr SYM (exit)
	310
	311	#ifndef FIDO_redboot
	312	/* Define the interrupt vector table. The linker script
	313	ensures that the table is placed at address zero. */
	314	.section .vector_table,"a"
	315
	316	.global SYM (_vector_table)
	317
	318	SYM (_vector_table):
	319
	320	dc.l __stack /* 000 Initial Stack */
	321	dc.l _start /* 001 Context 0 Start */
	322	dc.l _BusErrorHandler /* 002 Bus Error */
	323	dc.l _AddressErrorHandler /* 003 Address Error */
	324	dc.l _IllegalInstructionHandler /* 004 Illegal Instruction */
	325	dc.l _DivideByZeroHandler /* 005 Divide by Zero */
	326	dc.l _ChkHandler /* 006 CHK, CHK2 Instructions */
	327	dc.l _TrapccHandler /* 007 TRAPcc, TRAPV Instructions */
	328	dc.l _PrivilegeViolationHandler /* 008 Privilege Violation */
	329	dc.l _TraceHandler /* 009 Trace */
	330	dc.l _ALineHandler /* 010 A-Line Unimplemented Instr */
	331	dc.l _FLineHandler /* 011 F-Line Unimplemented Instr */
	332	dc.l _HwBreakpointHandler /* 012 Hardware Breakpoint */
	333	dc.l _Reserved0Handler /* 013 Reserved */
	334	dc.l _FormatErrorHandler /* 014 Format Error */
	335	dc.l _UnitializedIntHandler /* 015 Unitialized Interrupt */
	336	dc.l _SoftwareIntHandler /* 016 Software Interrupt */
	337	dc.l _Unassigned0Handler /* 017 Unassigned */
	338	dc.l _Unassigned1Handler /* 018 Unassigned */
	339	dc.l _Unassigned2Handler /* 019 Unassigned */
	340	dc.l _Unassigned3Handler /* 020 Unassigned */
	341	dc.l _Unassigned4Handler /* 021 Unassigned */
	342	dc.l _Unassigned5Handler /* 022 Unassigned */
	343	dc.l _Unassigned6Handler /* 023 Unassigned */
	344	dc.l _Int0Handler /* 024 Interrupt 0 */
	345	dc.l _Int1Handler /* 025 Interrupt 1 */
	346	dc.l _Int2Handler /* 026 Interrupt 2 */
	347	dc.l _Int3Handler /* 027 Interrupt 3 */
	348	dc.l _Int4Handler /* 028 Interrupt 4 */
	349	dc.l _Int5Handler /* 029 Interrupt 5 */
	350	dc.l _Int6Handler /* 030 Interrupt 6 */
	351	dc.l _Int7Handler /* 031 Interrupt 7 */
	352	dc.l _Trap00Handler /* 032 Trap #00 Instruction */
	353	dc.l _Trap01Handler /* 033 Trap #01 Instruction */
	354	dc.l _Trap02Handler /* 034 Trap #02 Instruction */
	355	dc.l _Trap03Handler /* 035 Trap #03 Instruction */
	356	dc.l _Trap04Handler /* 036 Trap #04 Instruction */
	357	dc.l _Trap05Handler /* 037 Trap #05 Instruction */
	358	dc.l _Trap06Handler /* 038 Trap #06 Instruction */
	359	dc.l _Trap07Handler /* 039 Trap #07 Instruction */
	360	dc.l _Trap08Handler /* 040 Trap #08 Instruction */
	361	dc.l _Trap09Handler /* 041 Trap #09 Instruction */
	362	dc.l _Trap10Handler /* 042 Trap #10 Instruction */
	363	dc.l _Trap11Handler /* 043 Trap #11 Instruction */
	364	dc.l _Trap12Handler /* 044 Trap #12 Instruction */
	365	dc.l _Trap13Handler /* 045 Trap #13 Instruction */
	366	dc.l _Trap14Handler /* 046 Trap #14 Instruction */
	367	dc.l _Trap15Handler /* 047 Trap #15 Instruction */
	368	dc.l _Reserved048Handler /* 048 Reserved */
	369	dc.l _Reserved049Handler /* 049 Reserved */
	370	dc.l _Reserved050Handler /* 050 Reserved */
	371	dc.l _Reserved051Handler /* 051 Reserved */
	372	dc.l _Reserved052Handler /* 052 Reserved */
	373	dc.l _Reserved053Handler /* 053 Reserved */
	374	dc.l _Reserved054Handler /* 054 Reserved */
	375	dc.l _Reserved055Handler /* 055 Reserved */
	376	dc.l _Reserved056Handler /* 056 Reserved */
	377	dc.l _Reserved057Handler /* 057 Reserved */
	378	dc.l _Reserved058Handler /* 058 Reserved */
	379	dc.l _Reserved059Handler /* 059 Reserved */
	380	dc.l _Reserved060Handler /* 060 Reserved */
	381	dc.l _Reserved061Handler /* 061 Reserved */
	382	dc.l _Reserved062Handler /* 062 Reserved */
	383	dc.l _Reserved063Handler /* 063 Reserved */
	384	dc.l _ContextOvertimeHandler /* 064 Context Overtime */
	385	dc.l _MpuErrorHandler /* 065 MPU Error */
	386	dc.l _SystemTimer0Handler /* 066 System Timer 0 */
	387	dc.l _SystemTimer1Handler /* 067 System Timer 1 */
	388	dc.l _SystemTimer2Handler /* 068 System Timer 2 */
	389	dc.l _SystemTimer3Handler /* 069 System Timer 3 */
	390	dc.l _SystemTimer4Handler /* 070 System Timer 4 */
	391	dc.l _WatchdogTimerHandler /* 071 Watchdog Timer */
	392	dc.l _TimerCounter0Handler /* 072 Timer Counter 1 */
	393	dc.l _TimerCounter1Handler /* 073 Timer Counter 2 */
	394	dc.l _DMA0Handler /* 074 DMA Channel 0 */
	395	dc.l _DMA1Handler /* 075 DMA Channel 1 */
	396	dc.l _AtoDConversionHandler /* 076 A/D Conversion Complete */
	397	dc.l _Pdma0Handler /* 077 PDMA Ch 0 Interrupt */
	398	dc.l _Pdma1Handler /* 078 PDMA Ch 1 Interrupt */
	399	dc.l _Pdma2Handler /* 079 PDMA Ch 2 Interrupt */
	400	dc.l _Pdma3Handler /* 080 PDMA Ch 3 Interrupt */
	401	dc.l _Reserved081Handler /* 081 Reserved */
	402	dc.l _Reserved082Handler /* 082 Reserved */
	403	dc.l _Reserved083Handler /* 083 Reserved */
	404	dc.l _Reserved084Handler /* 084 Reserved */
	405	dc.l _Reserved085Handler /* 085 Reserved */
	406	dc.l _Reserved086Handler /* 086 Reserved */
	407	dc.l _Reserved087Handler /* 087 Reserved */
	408	dc.l _Reserved088Handler /* 088 Reserved */
	409	dc.l _Reserved089Handler /* 089 Reserved */
	410	dc.l _Reserved090Handler /* 090 Reserved */
	411	dc.l _Reserved091Handler /* 091 Reserved */
	412	dc.l _Reserved092Handler /* 092 Reserved */
	413	dc.l _Reserved093Handler /* 093 Reserved */
	414	dc.l _Reserved094Handler /* 094 Reserved */
	415	dc.l _Reserved095Handler /* 095 Reserved */
	416	dc.l _Trapx00Handler /* 096 Trapx 00 Instruction */
	417	dc.l _Trapx01Handler /* 097 Trapx 01 Instruction */
	418	dc.l _Trapx02Handler /* 098 Trapx 02 Instruction */
	419	dc.l _Trapx03Handler /* 099 Trapx 03 Instruction */
	420	dc.l _Trapx04Handler /* 100 Trapx 04 Instruction */
	421	dc.l _Trapx05Handler /* 101 Trapx 05 Instruction */
	422	dc.l _Trapx06Handler /* 102 Trapx 06 Instruction */
	423	dc.l _Trapx07Handler /* 103 Trapx 07 Instruction */
	424	dc.l _Trapx08Handler /* 104 Trapx 08 Instruction */
	425	dc.l _Trapx09Handler /* 105 Trapx 09 Instruction */
	426	dc.l _Trapx10Handler /* 106 Trapx 10 Instruction */
	427	dc.l _Trapx11Handler /* 107 Trapx 11 Instruction */
	428	dc.l _Trapx12Handler /* 108 Trapx 12 Instruction */
	429	dc.l _Trapx13Handler /* 109 Trapx 13 Instruction */
	430	dc.l _Trapx14Handler /* 110 Trapx 14 Instruction */
	431	dc.l _Trapx15Handler /* 111 Trapx 15 Instruction */
	432	dc.l _DummyHandler /* 112 */
	433	dc.l _DummyHandler /* 113 */
	434	dc.l _DummyHandler /* 114 */
	435	dc.l _DummyHandler /* 115 */
	436	dc.l _DummyHandler /* 116 */
	437	dc.l _DummyHandler /* 117 */
	438	dc.l _DummyHandler /* 118 */
	439	dc.l _DummyHandler /* 119 */
	440	dc.l _DummyHandler /* 120 */
	441	dc.l _DummyHandler /* 121 */
	442	dc.l _DummyHandler /* 122 */
	443	dc.l _DummyHandler /* 123 */
	444	dc.l _DummyHandler /* 124 */
	445	dc.l _DummyHandler /* 125 */
	446	dc.l _DummyHandler /* 126 */
	447	dc.l _DummyHandler /* 127 */
	448	dc.l _DummyHandler /* 128 */
	449	dc.l _DummyHandler /* 129 */
	450	dc.l _DummyHandler /* 130 */
	451	dc.l _DummyHandler /* 131 */
	452	dc.l _DummyHandler /* 132 */
	453	dc.l _DummyHandler /* 133 */
	454	dc.l _DummyHandler /* 134 */
	455	dc.l _DummyHandler /* 135 */
	456	dc.l _DummyHandler /* 136 */
	457	dc.l _DummyHandler /* 137 */
	458	dc.l _DummyHandler /* 138 */
	459	dc.l _DummyHandler /* 139 */
	460	dc.l _DummyHandler /* 140 */
	461	dc.l _DummyHandler /* 141 */
	462	dc.l _DummyHandler /* 142 */
	463	dc.l _DummyHandler /* 143 */
	464	dc.l _DummyHandler /* 144 */
	465	dc.l _DummyHandler /* 145 */
	466	dc.l _DummyHandler /* 146 */
	467	dc.l _DummyHandler /* 147 */
	468	dc.l _DummyHandler /* 148 */
	469	dc.l _DummyHandler /* 149 */
	470	dc.l _DummyHandler /* 150 */
	471	dc.l _DummyHandler /* 151 */
	472	dc.l _DummyHandler /* 152 */
	473	dc.l _DummyHandler /* 153 */
	474	dc.l _DummyHandler /* 154 */
	475	dc.l _DummyHandler /* 155 */
	476	dc.l _DummyHandler /* 156 */
	477	dc.l _DummyHandler /* 157 */
	478	dc.l _DummyHandler /* 158 */
	479	dc.l _DummyHandler /* 159 */
	480	dc.l _DummyHandler /* 160 */
	481	dc.l _DummyHandler /* 161 */
	482	dc.l _DummyHandler /* 162 */
	483	dc.l _DummyHandler /* 163 */
	484	dc.l _DummyHandler /* 164 */
	485	dc.l _DummyHandler /* 165 */
	486	dc.l _DummyHandler /* 166 */
	487	dc.l _DummyHandler /* 167 */
	488	dc.l _DummyHandler /* 168 */
	489	dc.l _DummyHandler /* 169 */
	490	dc.l _DummyHandler /* 170 */
	491	dc.l _DummyHandler /* 171 */
	492	dc.l _DummyHandler /* 172 */
	493	dc.l _DummyHandler /* 173 */
	494	dc.l _DummyHandler /* 174 */
	495	dc.l _DummyHandler /* 175 */
	496	dc.l _DummyHandler /* 176 */
	497	dc.l _DummyHandler /* 177 */
	498	dc.l _DummyHandler /* 178 */
	499	dc.l _DummyHandler /* 179 */
	500	dc.l _DummyHandler /* 180 */
	501	dc.l _DummyHandler /* 181 */
	502	dc.l _DummyHandler /* 182 */
	503	dc.l _DummyHandler /* 183 */
	504	dc.l _DummyHandler /* 184 */
	505	dc.l _DummyHandler /* 185 */
	506	dc.l _DummyHandler /* 186 */
	507	dc.l _DummyHandler /* 187 */
	508	dc.l _DummyHandler /* 188 */
	509	dc.l _DummyHandler /* 189 */
	510	dc.l _DummyHandler /* 190 */
	511	dc.l _DummyHandler /* 191 */
	512	dc.l _DummyHandler /* 192 */
	513	dc.l _DummyHandler /* 193 */
	514	dc.l _DummyHandler /* 194 */
	515	dc.l _DummyHandler /* 195 */
	516	dc.l _DummyHandler /* 196 */
	517	dc.l _DummyHandler /* 197 */
	518	dc.l _DummyHandler /* 198 */
	519	dc.l _DummyHandler /* 199 */
	520	dc.l _DummyHandler /* 200 */
	521	dc.l _DummyHandler /* 201 */
	522	dc.l _DummyHandler /* 202 */
	523	dc.l _DummyHandler /* 203 */
	524	dc.l _DummyHandler /* 204 */
	525	dc.l _DummyHandler /* 205 */
	526	dc.l _DummyHandler /* 206 */
	527	dc.l _DummyHandler /* 207 */
	528	dc.l _DummyHandler /* 208 */
	529	dc.l _DummyHandler /* 209 */
	530	dc.l _DummyHandler /* 210 */
	531	dc.l _DummyHandler /* 211 */
	532	dc.l _DummyHandler /* 212 */
	533	dc.l _DummyHandler /* 213 */
	534	dc.l _DummyHandler /* 214 */
	535	dc.l _DummyHandler /* 215 */
	536	dc.l _DummyHandler /* 216 */
	537	dc.l _DummyHandler /* 217 */
	538	dc.l _DummyHandler /* 218 */
	539	dc.l _DummyHandler /* 219 */
	540	dc.l _DummyHandler /* 220 */
	541	dc.l _DummyHandler /* 221 */
	542	dc.l _DummyHandler /* 222 */
	543	dc.l _DummyHandler /* 223 */
	544	dc.l _DummyHandler /* 224 */
	545	dc.l _DummyHandler /* 225 */
	546	dc.l _DummyHandler /* 226 */
	547	dc.l _DummyHandler /* 227 */
	548	dc.l _DummyHandler /* 228 */
	549	dc.l _DummyHandler /* 229 */
	550	dc.l _DummyHandler /* 230 */
	551	dc.l _DummyHandler /* 231 */
	552	dc.l _DummyHandler /* 232 */
	553	dc.l _DummyHandler /* 233 */
	554	dc.l _DummyHandler /* 234 */
	555	dc.l _DummyHandler /* 235 */
	556	dc.l _DummyHandler /* 236 */
	557	dc.l _DummyHandler /* 237 */
	558	dc.l _DummyHandler /* 238 */
	559	dc.l _DummyHandler /* 239 */
	560	dc.l _DummyHandler /* 240 */
	561	dc.l _DummyHandler /* 241 */
	562	dc.l _DummyHandler /* 242 */
	563	dc.l _DummyHandler /* 243 */
	564	dc.l _DummyHandler /* 244 */
	565	dc.l _DummyHandler /* 245 */
	566	dc.l _DummyHandler /* 246 */
	567	dc.l _DummyHandler /* 247 */
	568	dc.l _DummyHandler /* 248 */
	569	dc.l _DummyHandler /* 249 */
	570	dc.l _DummyHandler /* 250 */
	571	dc.l _DummyHandler /* 251 */
	572	dc.l _DummyHandler /* 252 */
	573	dc.l _DummyHandler /* 253 */
	574	dc.l _DummyHandler /* 254 */
	575	dc.l _DummyHandler /* 255 */
	576
	577	/*
	578	* Define weak symbols for four alternate interrupt vectors.
	579	* These will be used as the interrupt vectors for the four
	580	* secondary contexts.
	581	*/
	582	.section .data
	583
	584	.global SYM (_vector_table1)
	585	.weak SYM (_vector_table1)
	586	.set SYM (_vector_table1), SYM (_vector_table)
	587
	588	.global SYM (_vector_table2)
	589	.weak SYM (_vector_table2)
	590	.set SYM (_vector_table2), SYM (_vector_table)
	591
	592	.global SYM (_vector_table3)
	593	.weak SYM (_vector_table3)
	594	.set SYM (_vector_table3), SYM (_vector_table)
	595
	596	.global SYM (_vector_table4)
	597	.weak SYM (_vector_table4)
	598	.set SYM (_vector_table4), SYM (_vector_table)
	599
	600	#endif

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