| [444] | 1 | /* entry.S - exception handler for emulating MIPS16 'entry' and 'exit' |
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| 2 | pseudo-instructions. These instructions are generated by the compiler |
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| 3 | when the -mentry switch is used. The instructions are not implemented |
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| 4 | in the MIPS16 CPU; hence the exception handler that emulates them. |
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| 5 | |
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| 6 | This module contains the following public functions: |
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| 7 | |
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| 8 | * void __install_entry_handler(void); |
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| 9 | |
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| 10 | This function installs the entry/exit exception handler. It should |
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| 11 | be called before executing any MIPS16 functions that were compiled with |
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| 12 | -mentry, typically before main() is called. |
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| 13 | |
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| 14 | * void __remove_entry_handler(void); |
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| 15 | |
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| 16 | This function removes the entry/exit exception handler. It should |
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| 17 | be called when the program is exiting, or when it is known that no |
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| 18 | more MIPS16 functions compiled with -mentry will be called. |
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| 19 | */ |
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| 20 | |
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| 21 | #ifdef __mips16 |
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| 22 | /* This file contains 32 bit assembly code. */ |
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| 23 | .set nomips16 |
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| 24 | #endif |
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| 25 | |
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| 26 | #include "regs.S" |
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| 27 | |
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| 28 | #define CAUSE_EXCMASK 0x3c /* mask for ExcCode in Cause Register */ |
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| 29 | #define EXC_RI 0x28 /* 101000 == 10 << 2 */ |
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| 30 | |
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| 31 | /* Set DEBUG to 1 to enable recording of the last 16 interrupt causes. */ |
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| 32 | |
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| 33 | #define DEBUG 0 |
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| 34 | |
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| 35 | #if DEBUG |
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| 36 | |
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| 37 | .sdata |
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| 38 | int_count: |
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| 39 | .space 4 /* interrupt count modulo 16 */ |
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| 40 | int_cause: |
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| 41 | .space 4*16 /* last 16 interrupt causes */ |
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| 42 | #endif |
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| 43 | |
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| 44 | .text |
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| 45 | |
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| 46 | .set noreorder /* Do NOT reorder instructions */ |
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| 47 | |
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| 48 | |
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| 49 | /* __entry_exit_handler - the reserved instruction exception handler |
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| 50 | that emulates the entry and exit instruction. */ |
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| 51 | |
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| 52 | __entry_exit_handler: |
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| 53 | .set noat /* Do NOT use at register */ |
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| 54 | #if DEBUG |
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| 55 | /* Must avoid using 'la' pseudo-op because it uses gp register, which |
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| 56 | may not have a good value in an exception handler. */ |
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| 57 | |
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| 58 | # la k0, int_count /* intcount = (intcount + 1) & 0xf */ |
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| 59 | lui k0 ,%hi(int_count) |
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| 60 | addiu k0, k0 ,%lo(int_count) |
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| 61 | lw k1, (k0) |
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| 62 | addiu k1, k1, 1 |
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| 63 | andi k1, k1, 0x0f |
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| 64 | sw k1, (k0) |
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| 65 | # la k0, int_cause /* k1 = &int_cause[intcount] */ |
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| 66 | lui k0, %hi(int_cause) |
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| 67 | addiu k0, k0, %lo(int_cause) |
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| 68 | sll k1, k1, 2 |
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| 69 | add k1, k1, k0 |
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| 70 | #endif |
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| 71 | mfc0 k0, C0_CAUSE /* Fetch cause */ |
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| 72 | #if DEBUG |
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| 73 | sw k0, -4(k1) /* Save exception cause in buffer */ |
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| 74 | #endif |
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| 75 | mfc0 k1, C0_EPC /* Check for Reserved Inst. without */ |
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| 76 | and k0, CAUSE_EXCMASK /* destroying any register */ |
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| 77 | subu k0, EXC_RI |
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| 78 | bne k0, zero, check_others /* Sorry, go do something else */ |
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| 79 | |
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| 80 | and k0, k1, 1 /* Check for TR mode (pc.0 = 1) */ |
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| 81 | beq k0, zero, ri_in_32 /* Sorry, RI in 32-bit mode */ |
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| 82 | xor k1, 1 |
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| 83 | |
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| 84 | /* Since we now are going to emulate or die, we can use all the T-registers */ |
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| 85 | /* that MIPS16 does not use (at, t0-t8), and we don't have to save them. */ |
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| 86 | |
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| 87 | .set at /* Now it's ok to use at again */ |
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| 88 | |
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| 89 | #if 0 |
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| 90 | j leave |
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| 91 | rfe |
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| 92 | #endif |
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| 93 | |
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| 94 | lhu t0, 0(k1) /* Fetch the offending instruction */ |
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| 95 | xor t8, k1, 1 /* Prepare t8 for exit */ |
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| 96 | and t1, t0, 0xf81f /* Check for entry/exit opcode */ |
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| 97 | bne t1, 0xe809, other_ri |
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| 98 | |
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| 99 | deareg: and t1, t0, 0x0700 /* Isolate the three a-bits */ |
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| 100 | srl t1, 6 /* Adjust them so x4 is applied */ |
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| 101 | slt t2, t1, 17 /* See if this is the exit instruction */ |
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| 102 | beqz t2, doexit |
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| 103 | la t2, savea |
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| 104 | subu t2, t1 |
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| 105 | jr t2 /* Jump into the instruction table */ |
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| 106 | rfe /* We run the rest in user-mode */ |
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| 107 | |
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| 108 | /* This is the entry instruction! */ |
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| 109 | sw a3, 12(sp) /* 4: a0-a3 saved */ |
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| 110 | sw a2, 8(sp) /* 3: a0-a2 saved */ |
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| 111 | sw a1, 4(sp) /* 2: a0-a1 saved */ |
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| 112 | sw a0, 0(sp) /* 1: a0 saved */ |
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| 113 | savea: /* 0: No arg regs saved */ |
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| 114 | |
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| 115 | dera: and t1, t0, 0x0020 /* Isolate the save-ra bit */ |
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| 116 | move t7, sp /* Temporary SP */ |
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| 117 | beq t1, zero, desreg |
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| 118 | subu sp, 32 /* Default SP adjustment */ |
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| 119 | sw ra, -4(t7) |
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| 120 | subu t7, 4 |
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| 121 | |
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| 122 | desreg: and t1, t0, 0x00c0 /* Isolate the two s-bits */ |
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| 123 | beq t1, zero, leave |
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| 124 | subu t1, 0x0040 |
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| 125 | beq t1, zero, leave /* Only one to save... */ |
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| 126 | sw s0, -4(t7) /* Do the first one */ |
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| 127 | sw s1, -8(t7) /* Do the last one */ |
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| 128 | |
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| 129 | leave: jr t8 /* Exit to unmodified EPC */ |
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| 130 | nop /* Urgh - the only nop!! */ |
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| 131 | |
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| 132 | doexf0: mtc1 v0,$f0 /* Copy float value */ |
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| 133 | b doex2 |
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| 134 | |
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| 135 | doexf1: mtc1 v1,$f0 /* Copy double value */ |
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| 136 | mtc1 v0,$f1 |
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| 137 | b doex2 |
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| 138 | |
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| 139 | doexit: slt t2, t1, 21 |
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| 140 | beq t2, zero, doexf0 |
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| 141 | slt t2, t1, 25 |
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| 142 | beq t2, zero, doexf1 |
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| 143 | |
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| 144 | doex2: and t1, t0, 0x0020 /* Isolate ra bit */ |
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| 145 | beq t1, zero, dxsreg /* t1 holds ra-bit */ |
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| 146 | addu t7, sp, 32 /* Temporary SP */ |
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| 147 | lw ra, -4(t7) |
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| 148 | subu t7, 4 |
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| 149 | |
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| 150 | dxsreg: and t1, t0, 0x00c0 /* Isolate the two s-bits */ |
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| 151 | beq t1, zero, leavex |
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| 152 | subu t1, 0x0040 |
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| 153 | beq t1, zero, leavex /* Only one to save... */ |
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| 154 | lw s0, -4(t7) /* Do the first one */ |
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| 155 | lw s1, -8(t7) /* Do the last one */ |
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| 156 | |
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| 157 | leavex: jr ra /* Exit to ra */ |
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| 158 | addu sp, 32 /* Clean up stack pointer */ |
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| 159 | |
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| 160 | /* Come here for exceptions we can't handle. */ |
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| 161 | |
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| 162 | ri_in_32: |
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| 163 | other_ri: |
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| 164 | check_others: /* call the previous handler */ |
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| 165 | la k0,__previous |
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| 166 | jr k0 |
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| 167 | nop |
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| 168 | |
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| 169 | __exception_code: |
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| 170 | .set noreorder |
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| 171 | la k0, __entry_exit_handler |
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| 172 | # lui k0, %hi(exception) |
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| 173 | # addiu k0, k0, %lo(exception) |
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| 174 | jr k0 |
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| 175 | nop |
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| 176 | .set reorder |
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| 177 | __exception_code_end: |
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| 178 | |
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| 179 | .data |
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| 180 | __previous: |
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| 181 | .space (__exception_code_end - __exception_code) |
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| 182 | .text |
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| 183 | |
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| 184 | |
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| 185 | /* void __install_entry_handler(void) |
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| 186 | |
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| 187 | Install our entry/exit reserved instruction exception handler. |
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| 188 | */ |
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| 189 | .ent __install_entry_handler |
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| 190 | .globl __install_entry_handler |
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| 191 | __install_entry_handler: |
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| 192 | .set noreorder |
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| 193 | mfc0 a0,C0_SR |
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| 194 | nop |
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| 195 | li a1,SR_BEV |
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| 196 | and a1,a1,a0 |
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| 197 | beq a1,$0,baseaddr |
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| 198 | lui a0,0x8000 /* delay slot */ |
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| 199 | lui a0,0xbfc0 |
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| 200 | addiu a0,a0,0x0100 |
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| 201 | baseaddr: |
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| 202 | addiu a0,a0,0x080 /* a0 = base vector table address */ |
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| 203 | li a1,(__exception_code_end - __exception_code) |
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| 204 | la a2,__exception_code |
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| 205 | la a3,__previous |
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| 206 | /* there must be a better way of doing this???? */ |
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| 207 | copyloop: |
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| 208 | lw v0,0(a0) |
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| 209 | sw v0,0(a3) |
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| 210 | lw v0,0(a2) |
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| 211 | sw v0,0(a0) |
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| 212 | addiu a0,a0,4 |
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| 213 | addiu a2,a2,4 |
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| 214 | addiu a3,a3,4 |
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| 215 | subu a1,a1,4 |
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| 216 | bne a1,$0,copyloop |
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| 217 | nop |
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| 218 | j ra |
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| 219 | nop |
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| 220 | .set reorder |
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| 221 | .end __install_entry_handler |
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| 222 | |
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| 223 | |
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| 224 | /* void __remove_entry_handler(void); |
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| 225 | |
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| 226 | Remove our entry/exit reserved instruction exception handler. |
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| 227 | */ |
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| 228 | |
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| 229 | .ent __remove_entry_handler |
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| 230 | .globl __remove_entry_handler |
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| 231 | __remove_entry_handler: |
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| 232 | .set noreorder |
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| 233 | |
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| 234 | mfc0 a0,C0_SR |
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| 235 | nop |
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| 236 | li a1,SR_BEV |
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| 237 | and a1,a1,a0 |
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| 238 | beq a1,$0,res_baseaddr |
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| 239 | lui a0,0x8000 /* delay slot */ |
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| 240 | lui a0,0xbfc0 |
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| 241 | addiu a0,a0,0x0200 |
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| 242 | res_baseaddr: |
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| 243 | addiu a0,a0,0x0180 /* a0 = base vector table address */ |
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| 244 | li a1,(__exception_code_end - __exception_code) |
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| 245 | la a3,__previous |
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| 246 | |
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| 247 | /* there must be a better way of doing this???? */ |
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| 248 | res_copyloop: |
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| 249 | lw v0,0(a3) |
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| 250 | sw v0,0(a0) |
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| 251 | addiu a0,a0,4 |
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| 252 | addiu a3,a3,4 |
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| 253 | subu a1,a1,4 |
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| 254 | bne a1,$0,res_copyloop |
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| 255 | nop |
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| 256 | j ra |
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| 257 | nop |
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| 258 | .set reorder |
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| 259 | .end __remove_entry_handler |
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| 260 | |
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| 261 | |
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| 262 | /* software_init_hook - install entry/exit handler and arrange to have it |
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| 263 | removed at exit. This function is called by crt0.S. */ |
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| 264 | |
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| 265 | .text |
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| 266 | .globl software_init_hook |
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| 267 | .ent software_init_hook |
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| 268 | software_init_hook: |
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| 269 | .set noreorder |
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| 270 | subu sp, sp, 8 /* allocate stack space */ |
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| 271 | sw ra, 4(sp) /* save return address */ |
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| 272 | jal __install_entry_handler /* install entry/exit handler */ |
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| 273 | nop |
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| 274 | lui a0, %hi(__remove_entry_handler) /* arrange for exit to */ |
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| 275 | jal atexit /* de-install handler */ |
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| 276 | addiu a0, a0, %lo(__remove_entry_handler) /* delay slot */ |
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| 277 | lw ra, 4(sp) /* get return address */ |
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| 278 | j ra /* return */ |
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| 279 | addu sp, sp, 8 /* deallocate stack */ |
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| 280 | .set reorder |
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| 281 | .end software_init_hook |
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