[444] | 1 | /* interrupts-asm.S -- interrupt handling for OpenRISC 1000. |
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| 2 | * |
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| 3 | * Copyright (c) 2011, 2012, 2014 Authors |
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| 4 | * |
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| 5 | * Contributor Julius Baxter <juliusbaxter@gmail.com> |
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| 6 | * Contributor Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
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| 7 | * Contributor Stefan Wallentowitz <stefan.wallentowitz@tum.de> |
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| 8 | * |
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| 9 | * The authors hereby grant permission to use, copy, modify, distribute, |
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| 10 | * and license this software and its documentation for any purpose, provided |
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| 11 | * that existing copyright notices are retained in all copies and that this |
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| 12 | * notice is included verbatim in any distributions. No written agreement, |
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| 13 | * license, or royalty fee is required for any of the authorized uses. |
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| 14 | * Modifications to this software may be copyrighted by their authors |
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| 15 | * and need not follow the licensing terms described here, provided that |
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| 16 | * the new terms are clearly indicated on the first page of each file where |
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| 17 | * they apply. |
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| 18 | */ |
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| 19 | |
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| 20 | /* -------------------------------------------------------------------------- */ |
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| 21 | /*!Generic interrupt handler function for or1k |
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| 22 | */ |
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| 23 | /* -------------------------------------------------------------------------- */ |
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| 24 | |
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| 25 | #include "include/or1k-asm.h" |
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| 26 | #include "include/or1k-sprs.h" |
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| 27 | |
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| 28 | .extern _or1k_interrupt_handler_table |
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| 29 | .extern _or1k_interrupt_handler_data_ptr_table |
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| 30 | |
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| 31 | /* -------------------------------------------------------------------------- */ |
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| 32 | /*!Function to call appropriate interrupt handler |
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| 33 | */ |
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| 34 | /* -------------------------------------------------------------------------- */ |
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| 35 | |
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| 36 | .section .text |
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| 37 | .global _or1k_interrupt_handler |
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| 38 | .type _or1k_interrupt_handler,@function |
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| 39 | |
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| 40 | _or1k_interrupt_handler: |
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| 41 | /* Make room on stack, save link address register */ |
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| 42 | l.addi r1,r1,-4 |
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| 43 | l.sw 0(r1),r9 |
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| 44 | |
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| 45 | /* Read PICSR */ |
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| 46 | l.mfspr r20,r0,OR1K_SPR_PIC_PICSR_ADDR |
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| 47 | |
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| 48 | /* Load handler table base address */ |
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| 49 | // Needs to be callee-saved register |
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| 50 | l.movhi r16,hi(_or1k_interrupt_handler_table) |
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| 51 | l.ori r16,r16,lo(_or1k_interrupt_handler_table) |
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| 52 | /* Load data pointer table base address */ |
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| 53 | // Needs to be callee-saved register |
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| 54 | l.movhi r18,hi(_or1k_interrupt_handler_data_ptr_table) |
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| 55 | l.ori r18,r18,lo(_or1k_interrupt_handler_data_ptr_table) |
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| 56 | #ifdef __OR1K_MULTICORE__ |
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| 57 | /* Read the addresses of the arrays of cores */ |
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| 58 | /* r7 = (*or1k_interrupt_handler_table) */ |
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| 59 | l.lwz r16,0(r16) |
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| 60 | /* r12 = (*or1k_interrupt_handler_data_ptr_table) */ |
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| 61 | l.lwz r18,0(r18) |
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| 62 | /* Generate offset in arrays */ |
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| 63 | /* r14 = coreid */ |
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| 64 | l.mfspr r14,r0,OR1K_SPR_SYS_COREID_ADDR |
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| 65 | /* r14 = coreid*32*4 = off */ |
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| 66 | l.slli r14,r14,7 |
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| 67 | /* r7 = (*or1k_exception_handler_table)[coreid] */ |
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| 68 | l.add r16,r16,r14 |
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| 69 | /* r12 = (*or1k_exception_handler_table)[coreid] */ |
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| 70 | l.add r18,r18,r14 |
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| 71 | #endif |
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| 72 | |
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| 73 | .L0: |
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| 74 | /* Find first set bit in PICSR */ |
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| 75 | l.ff1 r4,r20 |
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| 76 | /* Any bits set? */ |
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| 77 | l.sfne r4,r0 |
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| 78 | /* If none, finish */ |
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| 79 | OR1K_DELAYED_NOP(OR1K_INST(l.bnf .L2)) |
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| 80 | /* What is IRQ function table offset? */ |
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| 81 | l.addi r22,r4,-1 |
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| 82 | l.slli r6,r22,2 |
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| 83 | /* Add this to table bases */ |
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| 84 | l.add r14,r6,r16 |
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| 85 | l.add r13,r6,r18 |
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| 86 | |
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| 87 | /* Fetch handler function address */ |
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| 88 | l.lwz r14,0(r14) |
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| 89 | |
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| 90 | /* Double check it's valid, compare against INTERRUPT_HANDLER_NOT_SET */ |
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| 91 | l.sfne r14,r0 |
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| 92 | /* Skip if no handler: TODO: Indicate interrupt fired but no handler*/ |
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| 93 | OR1K_DELAYED_NOP(OR1K_INST(l.bnf .L1)) |
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| 94 | |
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| 95 | /* Call handler, load data pointer */ |
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| 96 | OR1K_DELAYED( |
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| 97 | OR1K_INST(l.lwz r3,0(r13)), |
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| 98 | OR1K_INST(l.jalr r14) |
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| 99 | ) |
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| 100 | |
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| 101 | .L1: |
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| 102 | /* Clear bit from PICSR, return to start of checking loop */ |
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| 103 | l.ori r6,r0,1 |
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| 104 | l.sll r6,r6,r22 |
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| 105 | OR1K_DELAYED( |
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| 106 | OR1K_INST(l.xor r20,r20,r6), |
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| 107 | OR1K_INST(l.j .L0) |
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| 108 | ) |
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| 109 | |
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| 110 | .L2: |
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| 111 | /* Finish up - write PICSR back, restore r9*/ |
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| 112 | l.lwz r9,0(r1) |
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| 113 | l.mtspr r0,r20,OR1K_SPR_PIC_PICSR_ADDR |
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| 114 | OR1K_DELAYED( |
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| 115 | OR1K_INST(l.addi r1,r1,4), |
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| 116 | OR1K_INST(l.jr r9) |
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| 117 | ) |
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| 118 | |
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| 119 | /* -------------------------------------------------------------------------- */ |
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| 120 | /*!Function to enable an interrupt handler in the PICMR |
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| 121 | */ |
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| 122 | /* -------------------------------------------------------------------------- */ |
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| 123 | .global or1k_interrupt_enable |
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| 124 | .type or1k_interrupt_enable,@function |
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| 125 | |
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| 126 | /* r3 should have IRQ line for peripheral */ |
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| 127 | or1k_interrupt_enable: |
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| 128 | l.addi r1,r1,-4 |
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| 129 | l.sw 0(r1),r4 |
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| 130 | l.ori r4,r0,0x1 |
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| 131 | l.sll r4,r4,r3 |
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| 132 | l.mfspr r3,r0,OR1K_SPR_PIC_PICMR_ADDR |
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| 133 | l.or r3,r3,r4 |
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| 134 | l.mtspr r0,r3,OR1K_SPR_PIC_PICMR_ADDR |
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| 135 | l.lwz r4,0(r1) |
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| 136 | OR1K_DELAYED( |
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| 137 | OR1K_INST(l.addi r1,r1,4), |
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| 138 | OR1K_INST(l.jr r9) |
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| 139 | ) |
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| 140 | |
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| 141 | /* -------------------------------------------------------------------------- */ |
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| 142 | /*!Function to disable an interrupt handler in the PICMR |
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| 143 | */ |
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| 144 | /* -------------------------------------------------------------------------- */ |
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| 145 | .global or1k_interrupt_disable |
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| 146 | .type or1k_interrupt_disable,@function |
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| 147 | |
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| 148 | /* r3 should have IRQ line for peripheral */ |
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| 149 | or1k_interrupt_disable: |
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| 150 | l.addi r1,r1,-4 |
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| 151 | l.sw 0(r1),r4 |
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| 152 | l.ori r4,r0,0x1 |
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| 153 | l.sll r4,r4,r3 |
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| 154 | l.xori r4,r4,0xffff |
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| 155 | l.mfspr r3,r0,OR1K_SPR_PIC_PICMR_ADDR |
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| 156 | l.and r3,r3,r4 |
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| 157 | l.mtspr r0,r3,OR1K_SPR_PIC_PICMR_ADDR |
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| 158 | l.lwz r4,0(r1) |
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| 159 | OR1K_DELAYED( |
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| 160 | OR1K_INST(l.addi r1,r1,4), |
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| 161 | OR1K_INST(l.jr r9) |
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| 162 | ) |
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