[444] | 1 | /* |
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| 2 | |
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| 3 | Copyright (c) 2010 Red Hat Incorporated. |
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| 4 | All rights reserved. |
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| 5 | |
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| 6 | Redistribution and use in source and binary forms, with or without |
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| 7 | modification, are permitted provided that the following conditions are met: |
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| 8 | |
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| 9 | Redistributions of source code must retain the above copyright |
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| 10 | notice, this list of conditions and the following disclaimer. |
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| 11 | |
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| 12 | Redistributions in binary form must reproduce the above copyright |
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| 13 | notice, this list of conditions and the following disclaimer in the |
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| 14 | documentation and/or other materials provided with the distribution. |
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| 15 | |
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| 16 | The name of Red Hat Incorporated may not be used to endorse |
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| 17 | or promote products derived from this software without specific |
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| 18 | prior written permission. |
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| 19 | |
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| 20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 23 | DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY |
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| 24 | DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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| 25 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 26 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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| 27 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 28 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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| 29 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 30 | |
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| 31 | */ |
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| 32 | |
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| 33 | /* These definitions are for the RL78/G13, which the simulator |
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| 34 | simulates. */ |
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| 35 | |
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| 36 | typedef unsigned char UQI __attribute__((mode(QI))); |
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| 37 | typedef unsigned int UHI __attribute__((mode(HI))); |
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| 38 | |
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| 39 | #define s8(x) (*(volatile UQI *)(x)) |
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| 40 | #define s16(x) (*(volatile UHI *)(x)) |
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| 41 | |
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| 42 | #define P(x) s8(0xfff00+(x)) |
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| 43 | #define PM(x) s8(0xfff20+(x)) |
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| 44 | |
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| 45 | #define PER0 s8(0xf00f0) |
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| 46 | |
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| 47 | #define SSR00 s16(0xf0100) |
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| 48 | #define SMR00 s16(0xf0110) |
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| 49 | #define SCR00 s16(0xf0118) |
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| 50 | #define SS0 s16(0xf0122) |
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| 51 | #define SPS0 s16(0xf0126) |
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| 52 | #define SO0 s16(0xf0128) |
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| 53 | #define SOE0 s16(0xf012a) |
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| 54 | #define SOL0 s16(0xf0134) |
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| 55 | |
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| 56 | #define SDR00 s16(0xfff10) |
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| 57 | |
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| 58 | static int initted = 0; |
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| 59 | |
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| 60 | static void |
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| 61 | init_uart0 () |
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| 62 | { |
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| 63 | initted = 1; |
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| 64 | |
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| 65 | PER0 = 0xff; |
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| 66 | SPS0 = 0x0011; /* 16 MHz */ |
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| 67 | SMR00 = 0x0022; /* uart mode */ |
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| 68 | SCR00 = 0x8097; /* 8-N-1 */ |
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| 69 | SDR00 = 0x8a00; /* baud in MSB - 115200 */ |
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| 70 | SOL0 = 0x0000; /* not inverted */ |
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| 71 | SO0 = 0x000f; /* initial value */ |
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| 72 | SOE0 = 0x0001; /* enable TxD0 */ |
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| 73 | P(1) |= 0b00000100; |
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| 74 | PM(1) &= 0b11111011; |
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| 75 | SS0 = 0x0001; |
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| 76 | } |
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| 77 | |
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| 78 | static void |
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| 79 | tputc (char c) |
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| 80 | { |
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| 81 | /* Wait for transmit buffer to be empty. */ |
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| 82 | while (SSR00 & 0x0020) |
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| 83 | asm(""); |
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| 84 | /* Transmit that byte. */ |
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| 85 | SDR00 = c; |
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| 86 | } |
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| 87 | |
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| 88 | /* defaults to 0 unless open() is linked in */ |
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| 89 | int _open_present; |
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| 90 | |
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| 91 | int |
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| 92 | _write(int fd, char *ptr, int len) |
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| 93 | { |
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| 94 | int rv = len; |
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| 95 | |
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| 96 | if (_open_present && fd > 2) |
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| 97 | return _SYS_write (fd, ptr, len); |
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| 98 | |
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| 99 | if (!initted) |
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| 100 | init_uart0 (); |
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| 101 | |
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| 102 | while (len != 0) |
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| 103 | { |
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| 104 | tputc (*ptr); |
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| 105 | ptr ++; |
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| 106 | len --; |
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| 107 | } |
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| 108 | return rv; |
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| 109 | } |
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| 110 | |
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| 111 | char * write (int) __attribute__((weak, alias ("_write"))); |
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