[444] | 1 | /* |
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| 2 | * Copyright (c) 2011 Aeroflex Gaisler |
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| 3 | * |
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| 4 | * BSD license: |
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| 5 | * |
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| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
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| 7 | * of this software and associated documentation files (the "Software"), to deal |
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| 8 | * in the Software without restriction, including without limitation the rights |
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| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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| 10 | * copies of the Software, and to permit persons to whom the Software is |
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| 11 | * furnished to do so, subject to the following conditions: |
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| 12 | * |
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| 13 | * The above copyright notice and this permission notice shall be included in |
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| 14 | * all copies or substantial portions of the Software. |
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| 15 | * |
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| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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| 22 | * THE SOFTWARE. |
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| 23 | */ |
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| 24 | |
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| 25 | |
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| 26 | #ifndef _INCLUDE_LEON_h |
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| 27 | #define _INCLUDE_LEON_h |
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| 28 | |
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| 29 | #include <asm-leon/leon3.h> |
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| 30 | #include <asm-leon/amba.h> |
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| 31 | |
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| 32 | #ifdef __cplusplus |
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| 33 | extern "C" |
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| 34 | { |
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| 35 | #endif |
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| 36 | |
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| 37 | /* psr defines */ |
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| 38 | #define SPARC_PSR_WIN_MASK 0x0000001f /* bit 0-4 */ |
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| 39 | #define SPARC_PSR_ET_MASK 0x00000020 /* bit 5 */ |
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| 40 | #define SPARC_PSR_PS_MASK 0x00000040 /* bit 6 */ |
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| 41 | #define SPARC_PSR_S_MASK 0x00000080 /* bit 7 */ |
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| 42 | #define SPARC_PSR_PIL_MASK 0x00000F00 /* bits 8 - 11 */ |
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| 43 | #define SPARC_PSR_EF_MASK 0x00001000 /* bit 12 */ |
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| 44 | #define SPARC_PSR_EC_MASK 0x00002000 /* bit 13 */ |
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| 45 | #define SPARC_PSR_ICC_MASK 0x00F00000 /* bits 20 - 23 */ |
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| 46 | #define SPARC_PSR_VER_MASK 0x0F000000 /* bits 24 - 27 */ |
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| 47 | #define SPARC_PSR_IMPL_MASK 0xF0000000 /* bits 28 - 31 */ |
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| 48 | #define SPARC_PSR_PIL_SHIFT 8 |
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| 49 | |
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| 50 | #define SPARC_NUM_REGWIN _nwindows |
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| 51 | |
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| 52 | #ifndef __ASSEMBLER__ |
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| 53 | extern int _nwindows; |
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| 54 | extern int _leon_version; |
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| 55 | #endif |
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| 56 | |
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| 57 | #define LEON_VERSION _leon_version |
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| 58 | |
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| 59 | /* |
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| 60 | * Interrupt Sources |
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| 61 | * |
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| 62 | * The interrupt source numbers directly map to the trap type and to |
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| 63 | * the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask, |
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| 64 | * and the Interrupt Pending Registers. |
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| 65 | */ |
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| 66 | |
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| 67 | #define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR 1 |
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| 68 | #define LEON2_INTERRUPT_UART_2_RX_TX 2 |
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| 69 | #define LEON2_INTERRUPT_UART_1_RX_TX 3 |
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| 70 | #define LEON23_INTERRUPT_UART_2_RX_TX leon23_irqs[1] /*console.c */ |
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| 71 | #define LEON23_INTERRUPT_UART_1_RX_TX leon23_irqs[0] /*console.c */ |
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| 72 | #define LEON_INTERRUPT_EXTERNAL_0 4 |
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| 73 | #define LEON_INTERRUPT_EXTERNAL_1 5 |
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| 74 | #define LEON_INTERRUPT_EXTERNAL_2 6 |
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| 75 | #define LEON_INTERRUPT_EXTERNAL_3 7 |
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| 76 | #define LEON2_INTERRUPT_TIMER1 8 |
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| 77 | #define LEON2_INTERRUPT_TIMER2 9 |
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| 78 | #define LEON23_INTERRUPT_TIMER1 leon23_timerirqs[0] /* timer.c */ |
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| 79 | #define LEON23_INTERRUPT_TIMER2 leon23_timerirqs[1] /* timer.c */ |
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| 80 | #define LEON_INTERRUPT_EMPTY1 10 |
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| 81 | #define LEON_INTERRUPT_EMPTY2 11 |
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| 82 | #define LEON_INTERRUPT_EMPTY3 12 |
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| 83 | #define LEON_INTERRUPT_EMPTY4 13 |
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| 84 | #define LEON_INTERRUPT_EMPTY5 14 |
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| 85 | #define LEON_INTERRUPT_EMPTY6 15 |
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| 86 | |
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| 87 | #ifndef __ASSEMBLER__ |
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| 88 | |
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| 89 | /* |
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| 90 | * Trap Types for on-chip peripherals |
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| 91 | * |
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| 92 | * Source: Table 8 - Interrupt Trap Type and Default Priority Assignments |
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| 93 | * |
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| 94 | * NOTE: The priority level for each source corresponds to the least |
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| 95 | * significant nibble of the trap type. |
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| 96 | */ |
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| 97 | |
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| 98 | #define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10) |
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| 99 | |
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| 100 | #define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10) |
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| 101 | |
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| 102 | #define LEON_INT_TRAP( _trap ) \ |
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| 103 | ( (_trap) >= LEON_TRAP_TYPE( LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR ) && \ |
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| 104 | (_trap) <= LEON_TRAP_TYPE( LEON_INTERRUPT_EMPTY6 ) ) |
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| 105 | |
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| 106 | |
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| 107 | #endif |
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| 108 | |
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| 109 | |
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| 110 | /* |
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| 111 | * The following defines the bits in Memory Configuration Register 1. |
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| 112 | */ |
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| 113 | |
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| 114 | #define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK 0x0003C000 |
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| 115 | |
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| 116 | /* |
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| 117 | * The following defines the bits in Memory Configuration Register 1. |
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| 118 | */ |
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| 119 | |
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| 120 | #define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00 |
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| 121 | |
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| 122 | |
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| 123 | /* |
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| 124 | * The following defines the bits in the Timer Control Register. |
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| 125 | */ |
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| 126 | |
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| 127 | #define LEON_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */ |
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| 128 | /* 0 = hold scalar and counter */ |
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| 129 | #define LEON_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */ |
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| 130 | /* 0 = stop at 0 */ |
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| 131 | #define LEON_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */ |
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| 132 | /* 0 = no function */ |
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| 133 | |
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| 134 | /* |
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| 135 | * The following defines the bits in the UART Control Registers. |
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| 136 | * |
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| 137 | */ |
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| 138 | |
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| 139 | #define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ |
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| 140 | |
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| 141 | /* |
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| 142 | * The following defines the bits in the LEON UART Status Registers. |
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| 143 | */ |
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| 144 | |
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| 145 | #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */ |
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| 146 | #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */ |
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| 147 | #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */ |
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| 148 | #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */ |
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| 149 | #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */ |
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| 150 | #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */ |
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| 151 | #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ |
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| 152 | #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ |
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| 153 | |
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| 154 | |
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| 155 | /* |
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| 156 | * The following defines the bits in the LEON UART Status Registers. |
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| 157 | */ |
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| 158 | |
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| 159 | #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */ |
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| 160 | #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */ |
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| 161 | #define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */ |
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| 162 | #define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */ |
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| 163 | #define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */ |
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| 164 | #define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */ |
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| 165 | #define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */ |
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| 166 | #define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */ |
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| 167 | |
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| 168 | /* leon2 asis */ |
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| 169 | #define ASI_LEON2_IFLUSH 0x05 |
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| 170 | #define ASI_LEON2_DFLUSH 0x06 |
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| 171 | #define ASI_LEON2_CACHEMISS 1 |
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| 172 | |
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| 173 | /* leon3 asis */ |
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| 174 | #define ASI_LEON3_IFLUSH 0x10 |
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| 175 | #define ASI_LEON3_DFLUSH 0x11 |
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| 176 | #define ASI_LEON3_CACHEMISS 1 |
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| 177 | #define ASI_LEON3_SYSCTRL 0x02 |
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| 178 | |
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| 179 | #define ASI_LEON23_ITAG 0x0c |
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| 180 | #define ASI_LEON23_DTAG 0x0e |
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| 181 | |
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| 182 | |
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| 183 | #ifndef __ASSEMBLER__ |
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| 184 | |
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| 185 | unsigned int leonbare_leon23_loadnocache (unsigned int addr); |
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| 186 | unsigned int leonbare_leon23_loadnocache16 (unsigned int addr); |
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| 187 | unsigned int leonbare_leon23_loadnocache8 (unsigned int addr); |
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| 188 | unsigned int leonbare_leon23_storenocache (unsigned int addr, |
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| 189 | unsigned int value); |
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| 190 | unsigned int leonbare_leon23_storenocache16 (unsigned int addr, |
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| 191 | unsigned int value); |
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| 192 | unsigned int leonbare_leon23_storenocache8 (unsigned int addr, |
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| 193 | unsigned int value); |
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| 194 | |
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| 195 | unsigned int leonbare_leon3_loadnocache (unsigned int addr); |
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| 196 | unsigned int leonbare_leon3_loadnocache16 (unsigned int addr); |
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| 197 | unsigned int leonbare_leon3_loadnocache8 (unsigned int addr); |
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| 198 | |
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| 199 | |
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| 200 | /* |
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| 201 | * This is used to manipulate the on-chip registers. |
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| 202 | * |
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| 203 | * The following symbol must be defined in the linkcmds file and point |
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| 204 | * to the correct location. |
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| 205 | */ |
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| 206 | |
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| 207 | extern unsigned long *LEON23_IRQ_mask_addr; /* in peripherals.h */ |
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| 208 | extern unsigned long *LEON23_IRQ_force_addr; /* in peripherals.h */ |
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| 209 | extern unsigned long *LEON23_IRQ_pending_addr; /* in peripherals.h */ |
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| 210 | extern unsigned long *LEON23_IRQ_clear_addr; /* in peripherals.h */ |
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| 211 | |
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| 212 | /* |
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| 213 | * Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask, |
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| 214 | * and the Interrupt Pending Registers. |
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| 215 | * |
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| 216 | * NOTE: For operations which are not atomic, this code disables interrupts |
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| 217 | * to guarantee there are no intervening accesses to the same register. |
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| 218 | * The operations which read the register, modify the value and then |
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| 219 | * store the result back are vulnerable. |
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| 220 | */ |
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| 221 | |
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| 222 | #define LEON_Clear_interrupt( _source ) \ |
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| 223 | do { \ |
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| 224 | (*LEON23_IRQ_clear_addr) = (1 << (_source)); \ |
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| 225 | } while (0) |
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| 226 | |
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| 227 | #define LEON_Force_interrupt( _source ) \ |
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| 228 | do { \ |
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| 229 | (*LEON23_IRQ_force_addr) = (1 << (_source)); \ |
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| 230 | } while (0) |
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| 231 | |
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| 232 | #define LEON_Is_interrupt_masked( _source ) \ |
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| 233 | ((*LEON23_IRQ_mask_addr) & (1 << (_source))) |
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| 234 | |
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| 235 | #define LEON_Mask_interrupt( _source ) \ |
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| 236 | do { \ |
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| 237 | unsigned32 _level; \ |
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| 238 | \ |
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| 239 | _level = sparc_disable_interrupts(); \ |
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| 240 | (*LEON23_IRQ_mask_addr) &= ~(1 << (_source)); \ |
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| 241 | sparc_enable_interrupts( _level ); \ |
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| 242 | } while (0) |
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| 243 | |
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| 244 | #define LEON_Unmask_interrupt( _source ) \ |
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| 245 | do { \ |
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| 246 | unsigned32 _level; \ |
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| 247 | \ |
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| 248 | _level = sparc_disable_interrupts(); \ |
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| 249 | (*LEON23_IRQ_mask_addr) |= (1 << (_source)); \ |
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| 250 | sparc_enable_interrupts( _level ); \ |
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| 251 | } while (0) |
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| 252 | |
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| 253 | #define LEON_Disable_interrupt( _source, _previous ) \ |
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| 254 | do { \ |
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| 255 | unsigned32 _level; \ |
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| 256 | unsigned32 _mask = 1 << (_source); \ |
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| 257 | \ |
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| 258 | _level = sparc_disable_interrupts(); \ |
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| 259 | (_previous) = (*LEON23_IRQ_mask_addr); \ |
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| 260 | (*LEON23_IRQ_mask_addr) = _previous & ~_mask; \ |
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| 261 | sparc_enable_interrupts( _level ); \ |
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| 262 | (_previous) &= _mask; \ |
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| 263 | } while (0) |
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| 264 | |
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| 265 | #define LEON_Restore_interrupt( _source, _previous ) \ |
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| 266 | do { \ |
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| 267 | unsigned32 _level; \ |
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| 268 | unsigned32 _mask = 1 << (_source); \ |
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| 269 | \ |
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| 270 | _level = sparc_disable_interrupts(); \ |
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| 271 | (*LEON23_IRQ_mask_addr) = \ |
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| 272 | ((*LEON23_IRQ_mask_addr) & ~_mask) | (_previous); \ |
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| 273 | sparc_enable_interrupts( _level ); \ |
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| 274 | } while (0) |
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| 275 | |
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| 276 | /* |
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| 277 | * Each timer control register is organized as follows: |
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| 278 | * |
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| 279 | * D0 - Enable |
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| 280 | * 1 = enable counting |
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| 281 | * 0 = hold scaler and counter |
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| 282 | * |
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| 283 | * D1 - Counter Reload |
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| 284 | * 1 = reload counter at zero and restart |
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| 285 | * 0 = stop counter at zero |
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| 286 | * |
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| 287 | * D2 - Counter Load |
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| 288 | * 1 = load counter with preset value |
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| 289 | * 0 = no function |
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| 290 | * |
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| 291 | */ |
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| 292 | |
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| 293 | #define LEON_REG_TIMER_COUNTER_IRQEN 0x00000008 |
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| 294 | |
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| 295 | #define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO 0x00000002 |
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| 296 | #define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO 0x00000000 |
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| 297 | |
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| 298 | #define LEON_REG_TIMER_COUNTER_LOAD_COUNTER 0x00000004 |
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| 299 | |
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| 300 | #define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING 0x00000001 |
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| 301 | #define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING 0x00000000 |
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| 302 | |
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| 303 | #define LEON_REG_TIMER_COUNTER_RELOAD_MASK 0x00000002 |
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| 304 | #define LEON_REG_TIMER_COUNTER_ENABLE_MASK 0x00000001 |
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| 305 | |
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| 306 | #define LEON_REG_TIMER_COUNTER_DEFINED_MASK 0x00000003 |
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| 307 | #define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK 0x00000003 |
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| 308 | |
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| 309 | /* console.c */ |
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| 310 | int lo_sprintf (char *buf, const char *fmt, ...); |
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| 311 | |
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| 312 | /* do a virtual address read without cache */ |
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| 313 | static __inline__ unsigned long leon23_getpsr () |
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| 314 | { |
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| 315 | unsigned long retval; |
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| 316 | __asm__ __volatile__ ("mov %%psr, %0\n\t":"=r" (retval):); |
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| 317 | return retval; |
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| 318 | } |
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| 319 | |
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| 320 | extern __inline__ void sparc_leon2_dcache_flush (void) |
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| 321 | { |
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| 322 | __asm__ |
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| 323 | __volatile__ ("sta %%g0, [%%g0] %0\n\t"::"i" |
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| 324 | (ASI_LEON2_IFLUSH):"memory"); |
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| 325 | __asm__ |
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| 326 | __volatile__ ("sta %%g0, [%%g0] %0\n\t"::"i" |
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| 327 | (ASI_LEON2_DFLUSH):"memory"); |
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| 328 | }; |
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| 329 | |
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| 330 | |
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| 331 | extern __inline__ void sparc_leon_dcache_flush (void) |
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| 332 | { |
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| 333 | switch (sparc_leon23_get_psr_version ()) |
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| 334 | { |
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| 335 | case 0: |
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| 336 | case 2: |
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| 337 | sparc_leon2_dcache_flush (); |
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| 338 | break; |
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| 339 | default: |
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| 340 | sparc_leon3_dcache_flush (); |
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| 341 | break; |
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| 342 | } |
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| 343 | } |
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| 344 | |
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| 345 | extern int lolevelirqinstall (int irqnr, void (*handler) ()); |
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| 346 | extern unsigned long locore_readtbr (); |
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| 347 | extern void _leonbase_Stop (); |
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| 348 | |
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| 349 | extern void uninstall_winoverflow_hook (); |
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| 350 | extern int install_winoverflow_hook (void (*func) (void)); |
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| 351 | |
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| 352 | extern void sparc_leon23_icache_flush (); |
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| 353 | extern void sparc_leon23_dcache_flush (); |
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| 354 | |
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| 355 | #endif /* ! __ASSEMBLER__ */ |
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| 356 | |
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| 357 | #ifdef __cplusplus |
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| 358 | } |
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| 359 | #endif |
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| 360 | |
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| 361 | #define TACODE_IRQCALL 2 |
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| 362 | #define TACODE_IRQCALL_FLUSH 6 |
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| 363 | |
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| 364 | #define TACODE_FLUSH 3 |
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| 365 | #define TACODE_IRQCALLDIS 5 |
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| 366 | |
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| 367 | |
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| 368 | |
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| 369 | #endif /* !_INCLUDE_LEON_h */ |
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| 370 | /* end of include file */ |
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