1 | /* |
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2 | * Copyright (c) 2012-2014 ARM Ltd |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * 1. Redistributions of source code must retain the above copyright |
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9 | * notice, this list of conditions and the following disclaimer. |
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10 | * 2. Redistributions in binary form must reproduce the above copyright |
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11 | * notice, this list of conditions and the following disclaimer in the |
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12 | * documentation and/or other materials provided with the distribution. |
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13 | * 3. The name of the company may not be used to endorse or promote |
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14 | * products derived from this software without specific prior written |
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15 | * permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED |
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18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED |
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22 | * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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23 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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24 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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25 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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26 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |
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29 | /* Basic ARM implementation. This should run on anything except |
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30 | for ARMv6-M, but there are better implementations for later |
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31 | revisions of the architecture. This version can support ARMv4T |
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32 | ARM/Thumb interworking. */ |
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33 | /* Parameters and result. */ |
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34 | #define src1 r0 |
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35 | #define src2 r1 |
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36 | #define result r0 /* Overlaps src1. */ |
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37 | |
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38 | /* Internal variables. */ |
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39 | #define data1 r2 |
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40 | #define data2 r3 |
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41 | #define magic1 r4 |
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42 | #define tmp2 r5 |
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43 | #define tmp1 r12 |
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44 | #define syndrome r12 /* Overlaps tmp1 */ |
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45 | |
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46 | /* For armv4t and newer, toolchains will transparently convert |
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47 | 'bx lr' to 'mov pc, lr' if needed. GCC has deprecated support |
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48 | for anything older than armv4t, but this should handle that |
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49 | corner case in case anyone needs it anyway */ |
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50 | .macro RETURN |
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51 | #if __ARM_ARCH <= 4 && __ARM_ARCH_ISA_THUMB == 0 |
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52 | mov pc, lr |
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53 | #else |
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54 | bx lr |
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55 | #endif |
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56 | .endm |
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57 | |
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58 | .arm |
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59 | def_fn strcmp |
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60 | .cfi_sections .debug_frame |
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61 | .cfi_startproc |
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62 | eor tmp1, src1, src2 |
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63 | tst tmp1, #3 |
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64 | /* Strings not at same byte offset from a word boundary. */ |
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65 | bne .Lstrcmp_unaligned |
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66 | ands tmp1, src1, #3 |
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67 | bic src1, src1, #3 |
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68 | bic src2, src2, #3 |
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69 | ldr data1, [src1], #4 |
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70 | ldreq data2, [src2], #4 |
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71 | beq 1f |
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72 | /* Although s1 and s2 have identical initial alignment, they are |
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73 | not currently word aligned. Rather than comparing bytes, |
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74 | make sure that any bytes fetched from before the addressed |
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75 | bytes are forced to 0xff. Then they will always compare |
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76 | equal. */ |
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77 | eor tmp1, tmp1, #3 |
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78 | mvn data2, #MSB |
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79 | lsl tmp1, tmp1, #3 |
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80 | S2LO tmp1, data2, tmp1 |
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81 | ldr data2, [src2], #4 |
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82 | orr data1, data1, tmp1 |
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83 | orr data2, data2, tmp1 |
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84 | 1: |
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85 | /* Load the 'magic' constant 0x01010101. */ |
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86 | str r4, [sp, #-4]! |
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87 | .cfi_def_cfa_offset 4 |
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88 | .cfi_offset 4, -4 |
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89 | mov magic1, #1 |
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90 | orr magic1, magic1, magic1, lsl #8 |
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91 | orr magic1, magic1, magic1, lsl #16 |
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92 | .p2align 2 |
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93 | 4: |
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94 | sub syndrome, data1, magic1 |
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95 | cmp data1, data2 |
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96 | /* check for any zero bytes in first word */ |
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97 | biceq syndrome, syndrome, data1 |
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98 | tsteq syndrome, magic1, lsl #7 |
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99 | ldreq data1, [src1], #4 |
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100 | ldreq data2, [src2], #4 |
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101 | beq 4b |
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102 | 2: |
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103 | /* There's a zero or a different byte in the word */ |
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104 | S2HI result, data1, #24 |
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105 | S2LO data1, data1, #8 |
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106 | cmp result, #1 |
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107 | cmpcs result, data2, S2HI #24 |
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108 | S2LOEQ data2, data2, #8 |
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109 | beq 2b |
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110 | /* On a big-endian machine, RESULT contains the desired byte in bits |
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111 | 0-7; on a little-endian machine they are in bits 24-31. In |
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112 | both cases the other bits in RESULT are all zero. For DATA2 the |
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113 | interesting byte is at the other end of the word, but the |
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114 | other bits are not necessarily zero. We need a signed result |
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115 | representing the differnece in the unsigned bytes, so for the |
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116 | little-endian case we can't just shift the interesting bits |
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117 | up. */ |
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118 | #ifdef __ARM_BIG_ENDIAN |
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119 | sub result, result, data2, lsr #24 |
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120 | #else |
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121 | and data2, data2, #255 |
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122 | rsb result, data2, result, lsr #24 |
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123 | #endif |
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124 | ldr r4, [sp], #4 |
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125 | .cfi_restore 4 |
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126 | .cfi_def_cfa_offset 0 |
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127 | RETURN |
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128 | |
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129 | |
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130 | #if 0 |
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131 | /* The assembly code below is based on the following alogrithm. */ |
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132 | #ifdef __ARM_BIG_ENDIAN |
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133 | #define RSHIFT << |
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134 | #define LSHIFT >> |
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135 | #else |
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136 | #define RSHIFT >> |
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137 | #define LSHIFT << |
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138 | #endif |
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139 | |
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140 | #define body(shift) \ |
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141 | mask = 0xffffffffU RSHIFT shift; \ |
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142 | data1 = *src1++; \ |
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143 | data2 = *src2++; \ |
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144 | do \ |
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145 | { \ |
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146 | tmp2 = data1 & mask; \ |
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147 | if (__builtin_expect(tmp2 != data2 RSHIFT shift, 0)) \ |
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148 | { \ |
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149 | data2 RSHIFT= shift; \ |
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150 | break; \ |
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151 | } \ |
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152 | if (__builtin_expect(((data1 - b1) & ~data1) & (b1 << 7), 0)) \ |
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153 | { \ |
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154 | /* See comment in assembler below re syndrome on big-endian */\ |
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155 | if ((((data1 - b1) & ~data1) & (b1 << 7)) & mask) \ |
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156 | data2 RSHIFT= shift; \ |
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157 | else \ |
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158 | { \ |
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159 | data2 = *src2; \ |
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160 | tmp2 = data1 RSHIFT (32 - shift); \ |
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161 | data2 = (data2 LSHIFT (32 - shift)) RSHIFT (32 - shift); \ |
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162 | } \ |
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163 | break; \ |
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164 | } \ |
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165 | data2 = *src2++; \ |
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166 | tmp2 ^= data1; \ |
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167 | if (__builtin_expect(tmp2 != data2 LSHIFT (32 - shift), 0)) \ |
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168 | { \ |
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169 | tmp2 = data1 >> (32 - shift); \ |
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170 | data2 = (data2 << (32 - shift)) RSHIFT (32 - shift); \ |
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171 | break; \ |
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172 | } \ |
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173 | data1 = *src1++; \ |
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174 | } while (1) |
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175 | |
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176 | const unsigned* src1; |
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177 | const unsigned* src2; |
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178 | unsigned data1, data2; |
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179 | unsigned mask; |
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180 | unsigned shift; |
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181 | unsigned b1 = 0x01010101; |
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182 | char c1, c2; |
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183 | unsigned tmp2; |
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184 | |
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185 | while (((unsigned) s1) & 3) |
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186 | { |
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187 | c1 = *s1++; |
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188 | c2 = *s2++; |
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189 | if (c1 == 0 || c1 != c2) |
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190 | return c1 - (int)c2; |
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191 | } |
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192 | src1 = (unsigned*) (((unsigned)s1) & ~3); |
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193 | src2 = (unsigned*) (((unsigned)s2) & ~3); |
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194 | tmp2 = ((unsigned) s2) & 3; |
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195 | if (tmp2 == 1) |
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196 | { |
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197 | body(8); |
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198 | } |
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199 | else if (tmp2 == 2) |
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200 | { |
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201 | body(16); |
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202 | } |
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203 | else |
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204 | { |
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205 | body (24); |
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206 | } |
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207 | |
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208 | do |
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209 | { |
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210 | #ifdef __ARM_BIG_ENDIAN |
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211 | c1 = (char) tmp2 >> 24; |
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212 | c2 = (char) data2 >> 24; |
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213 | #else /* not __ARM_BIG_ENDIAN */ |
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214 | c1 = (char) tmp2; |
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215 | c2 = (char) data2; |
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216 | #endif /* not __ARM_BIG_ENDIAN */ |
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217 | tmp2 RSHIFT= 8; |
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218 | data2 RSHIFT= 8; |
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219 | } while (c1 != 0 && c1 == c2); |
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220 | return c1 - c2; |
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221 | #endif /* 0 */ |
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222 | |
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223 | |
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224 | /* First of all, compare bytes until src1(sp1) is word-aligned. */ |
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225 | .Lstrcmp_unaligned: |
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226 | tst src1, #3 |
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227 | beq 2f |
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228 | ldrb data1, [src1], #1 |
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229 | ldrb data2, [src2], #1 |
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230 | cmp data1, #1 |
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231 | cmpcs data1, data2 |
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232 | beq .Lstrcmp_unaligned |
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233 | sub result, data1, data2 |
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234 | RETURN |
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235 | |
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236 | 2: |
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237 | stmfd sp!, {r4, r5} |
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238 | .cfi_def_cfa_offset 8 |
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239 | .cfi_offset 4, -8 |
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240 | .cfi_offset 5, -4 |
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241 | mov magic1, #1 |
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242 | orr magic1, magic1, magic1, lsl #8 |
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243 | orr magic1, magic1, magic1, lsl #16 |
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244 | |
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245 | ldr data1, [src1], #4 |
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246 | and tmp2, src2, #3 |
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247 | bic src2, src2, #3 |
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248 | ldr data2, [src2], #4 |
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249 | cmp tmp2, #2 |
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250 | beq .Loverlap2 |
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251 | bhi .Loverlap1 |
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252 | |
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253 | /* Critical inner Loop: Block with 3 bytes initial overlap */ |
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254 | .p2align 2 |
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255 | .Loverlap3: |
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256 | bic tmp2, data1, #MSB |
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257 | cmp tmp2, data2, S2LO #8 |
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258 | sub syndrome, data1, magic1 |
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259 | bic syndrome, syndrome, data1 |
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260 | bne 4f |
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261 | ands syndrome, syndrome, magic1, lsl #7 |
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262 | ldreq data2, [src2], #4 |
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263 | bne 5f |
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264 | eor tmp2, tmp2, data1 |
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265 | cmp tmp2, data2, S2HI #24 |
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266 | bne 6f |
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267 | ldr data1, [src1], #4 |
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268 | b .Loverlap3 |
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269 | 4: |
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270 | S2LO data2, data2, #8 |
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271 | b .Lstrcmp_tail |
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272 | |
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273 | 5: |
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274 | #ifdef __ARM_BIG_ENDIAN |
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275 | /* The syndrome value may contain false ones if the string ends |
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276 | with the bytes 0x01 0x00. */ |
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277 | tst data1, #0xff000000 |
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278 | tstne data1, #0x00ff0000 |
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279 | tstne data1, #0x0000ff00 |
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280 | beq .Lstrcmp_done_equal |
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281 | #else |
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282 | bics syndrome, syndrome, #0xff000000 |
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283 | bne .Lstrcmp_done_equal |
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284 | #endif |
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285 | ldrb data2, [src2] |
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286 | S2LO tmp2, data1, #24 |
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287 | #ifdef __ARM_BIG_ENDIAN |
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288 | lsl data2, data2, #24 |
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289 | #endif |
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290 | b .Lstrcmp_tail |
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291 | |
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292 | 6: |
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293 | S2LO tmp2, data1, #24 |
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294 | and data2, data2, #LSB |
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295 | b .Lstrcmp_tail |
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296 | |
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297 | /* Critical inner Loop: Block with 2 bytes initial overlap. */ |
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298 | .p2align 2 |
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299 | .Loverlap2: |
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300 | S2HI tmp2, data1, #16 |
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301 | sub syndrome, data1, magic1 |
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302 | S2LO tmp2, tmp2, #16 |
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303 | bic syndrome, syndrome, data1 |
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304 | cmp tmp2, data2, S2LO #16 |
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305 | bne 4f |
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306 | ands syndrome, syndrome, magic1, lsl #7 |
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307 | ldreq data2, [src2], #4 |
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308 | bne 5f |
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309 | eor tmp2, tmp2, data1 |
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310 | cmp tmp2, data2, S2HI #16 |
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311 | bne 6f |
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312 | ldr data1, [src1], #4 |
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313 | b .Loverlap2 |
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314 | |
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315 | 5: |
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316 | #ifdef __ARM_BIG_ENDIAN |
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317 | /* The syndrome value may contain false ones if the string ends |
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318 | with the bytes 0x01 0x00 */ |
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319 | tst data1, #0xff000000 |
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320 | tstne data1, #0x00ff0000 |
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321 | beq .Lstrcmp_done_equal |
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322 | #else |
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323 | lsls syndrome, syndrome, #16 |
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324 | bne .Lstrcmp_done_equal |
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325 | #endif |
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326 | ldrh data2, [src2] |
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327 | S2LO tmp2, data1, #16 |
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328 | #ifdef __ARM_BIG_ENDIAN |
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329 | lsl data2, data2, #16 |
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330 | #endif |
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331 | b .Lstrcmp_tail |
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332 | |
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333 | 6: |
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334 | S2HI data2, data2, #16 |
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335 | S2LO tmp2, data1, #16 |
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336 | 4: |
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337 | S2LO data2, data2, #16 |
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338 | b .Lstrcmp_tail |
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339 | |
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340 | /* Critical inner Loop: Block with 1 byte initial overlap. */ |
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341 | .p2align 2 |
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342 | .Loverlap1: |
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343 | and tmp2, data1, #LSB |
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344 | cmp tmp2, data2, S2LO #24 |
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345 | sub syndrome, data1, magic1 |
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346 | bic syndrome, syndrome, data1 |
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347 | bne 4f |
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348 | ands syndrome, syndrome, magic1, lsl #7 |
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349 | ldreq data2, [src2], #4 |
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350 | bne 5f |
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351 | eor tmp2, tmp2, data1 |
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352 | cmp tmp2, data2, S2HI #8 |
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353 | bne 6f |
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354 | ldr data1, [src1], #4 |
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355 | b .Loverlap1 |
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356 | 4: |
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357 | S2LO data2, data2, #24 |
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358 | b .Lstrcmp_tail |
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359 | 5: |
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360 | /* The syndrome value may contain false ones if the string ends |
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361 | with the bytes 0x01 0x00. */ |
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362 | tst data1, #LSB |
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363 | beq .Lstrcmp_done_equal |
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364 | ldr data2, [src2], #4 |
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365 | 6: |
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366 | S2LO tmp2, data1, #8 |
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367 | bic data2, data2, #MSB |
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368 | b .Lstrcmp_tail |
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369 | .Lstrcmp_done_equal: |
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370 | mov result, #0 |
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371 | .cfi_remember_state |
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372 | ldmfd sp!, {r4, r5} |
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373 | .cfi_restore 4 |
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374 | .cfi_restore 5 |
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375 | .cfi_def_cfa_offset 0 |
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376 | RETURN |
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377 | |
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378 | .Lstrcmp_tail: |
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379 | .cfi_restore_state |
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380 | and r2, tmp2, #LSB |
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381 | and result, data2, #LSB |
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382 | cmp result, #1 |
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383 | cmpcs result, r2 |
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384 | S2LOEQ tmp2, tmp2, #8 |
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385 | S2LOEQ data2, data2, #8 |
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386 | beq .Lstrcmp_tail |
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387 | sub result, r2, result |
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388 | ldmfd sp!, {r4, r5} |
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389 | .cfi_restore 4 |
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390 | .cfi_restore 5 |
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391 | .cfi_def_cfa_offset 0 |
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392 | RETURN |
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393 | .cfi_endproc |
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394 | .size strcmp, . - strcmp |
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