[444] | 1 | /* A memmove for CRIS. |
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| 2 | Copyright (C) 2000-2005 Axis Communications. |
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| 3 | All rights reserved. |
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| 4 | |
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| 5 | Redistribution and use in source and binary forms, with or without |
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| 6 | modification, are permitted provided that the following conditions |
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| 7 | are met: |
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| 8 | |
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| 9 | 1. Redistributions of source code must retain the above copyright |
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| 10 | notice, this list of conditions and the following disclaimer. |
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| 11 | |
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| 12 | 2. Neither the name of Axis Communications nor the names of its |
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| 13 | contributors may be used to endorse or promote products derived |
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| 14 | from this software without specific prior written permission. |
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| 15 | |
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| 16 | THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS |
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| 17 | ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 18 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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| 19 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS |
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| 20 | COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, |
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| 21 | INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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| 22 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 23 | SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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| 24 | HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
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| 25 | STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
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| 26 | IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 27 | POSSIBILITY OF SUCH DAMAGE. */ |
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| 28 | |
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| 29 | /* FIXME: This file should really only be used for reference, as the |
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| 30 | result is somewhat depending on gcc generating what we expect rather |
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| 31 | than what we describe. An assembly file should be used instead. |
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| 32 | |
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| 33 | Even worse, we base it on memcpy, on the assumption that overlapping |
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| 34 | moves are rare, and we will do no worse than the generic memmove. */ |
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| 35 | |
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| 36 | #include <stddef.h> |
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| 37 | |
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| 38 | /* Break even between movem and move16 is really at 38.7 * 2, but |
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| 39 | modulo 44, so up to the next multiple of 44, we use ordinary code. */ |
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| 40 | #define MEMMOVE_BY_BLOCK_THRESHOLD (44 * 2) |
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| 41 | |
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| 42 | /* No name ambiguities in this file. */ |
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| 43 | __asm__ (".syntax no_register_prefix"); |
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| 44 | |
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| 45 | void * |
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| 46 | memmove(void *pdst, const void *psrc, size_t pn) |
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| 47 | { |
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| 48 | /* Now we want the parameters put in special registers. |
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| 49 | Make sure the compiler is able to make something useful of this. |
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| 50 | As it is now: r10 -> r13; r11 -> r11 (nop); r12 -> r12 (nop). |
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| 51 | |
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| 52 | If gcc was allright, it really would need no temporaries, and no |
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| 53 | stack space to save stuff on. */ |
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| 54 | |
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| 55 | register void *return_dst __asm__ ("r10") = pdst; |
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| 56 | register unsigned char *dst __asm__ ("r13") = pdst; |
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| 57 | register unsigned const char *src __asm__ ("r11") = psrc; |
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| 58 | register int n __asm__ ("r12") = pn; |
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| 59 | |
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| 60 | /* Check and handle overlap. */ |
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| 61 | if (src < dst && dst < src + n) |
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| 62 | { |
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| 63 | /* Destructive overlap. We could optimize this, but we don't (for |
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| 64 | the moment). */ |
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| 65 | src += n; |
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| 66 | dst += n; |
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| 67 | while (n--) |
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| 68 | { |
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| 69 | *--dst = *--src; |
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| 70 | } |
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| 71 | |
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| 72 | return return_dst; |
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| 73 | } |
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| 74 | /* Whew, no overlap. Proceed as with memcpy. We could call it instead |
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| 75 | of having a copy here. That would spoil some of the optimization, so |
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| 76 | we take the trouble with having two copies. */ |
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| 77 | |
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| 78 | /* When src is aligned but not dst, this makes a few extra needless |
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| 79 | cycles. I believe it would take as many to check that the |
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| 80 | re-alignment was unnecessary. */ |
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| 81 | if (((unsigned long) dst & 3) != 0 |
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| 82 | /* Don't align if we wouldn't copy more than a few bytes; so we |
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| 83 | don't have to check further for overflows. */ |
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| 84 | && n >= 3) |
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| 85 | { |
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| 86 | if ((unsigned long) dst & 1) |
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| 87 | { |
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| 88 | n--; |
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| 89 | *dst = *src; |
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| 90 | src++; |
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| 91 | dst++; |
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| 92 | } |
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| 93 | |
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| 94 | if ((unsigned long) dst & 2) |
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| 95 | { |
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| 96 | n -= 2; |
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| 97 | *(short *) dst = *(short *) src; |
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| 98 | src += 2; |
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| 99 | dst += 2; |
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| 100 | } |
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| 101 | } |
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| 102 | |
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| 103 | /* Decide which copying method to use. */ |
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| 104 | if (n >= MEMMOVE_BY_BLOCK_THRESHOLD) |
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| 105 | { |
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| 106 | /* It is not optimal to tell the compiler about clobbering any |
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| 107 | registers; that will move the saving/restoring of those registers |
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| 108 | to the function prologue/epilogue, and make non-movem sizes |
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| 109 | suboptimal. */ |
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| 110 | __asm__ volatile |
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| 111 | ("\ |
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| 112 | ;; GCC does promise correct register allocations, but let's \n\ |
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| 113 | ;; make sure it keeps its promises. \n\ |
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| 114 | .ifnc %0-%1-%2,$r13-$r11-$r12 \n\ |
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| 115 | .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\" \n\ |
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| 116 | .endif \n\ |
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| 117 | \n\ |
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| 118 | ;; Save the registers we'll use in the movem process \n\ |
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| 119 | ;; on the stack. \n\ |
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| 120 | subq 11*4,sp \n\ |
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| 121 | movem r10,[sp] \n\ |
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| 122 | \n\ |
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| 123 | ;; Now we've got this: \n\ |
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| 124 | ;; r11 - src \n\ |
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| 125 | ;; r13 - dst \n\ |
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| 126 | ;; r12 - n \n\ |
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| 127 | \n\ |
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| 128 | ;; Update n for the first loop. \n\ |
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| 129 | subq 44,r12 \n\ |
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| 130 | 0: \n\ |
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| 131 | " |
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| 132 | #ifdef __arch_common_v10_v32 |
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| 133 | /* Cater to branch offset difference between v32 and v10. We |
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| 134 | assume the branch below has an 8-bit offset. */ |
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| 135 | " setf\n" |
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| 136 | #endif |
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| 137 | " movem [r11+],r10 \n\ |
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| 138 | subq 44,r12 \n\ |
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| 139 | bge 0b \n\ |
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| 140 | movem r10,[r13+] \n\ |
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| 141 | \n\ |
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| 142 | ;; Compensate for last loop underflowing n. \n\ |
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| 143 | addq 44,r12 \n\ |
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| 144 | \n\ |
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| 145 | ;; Restore registers from stack. \n\ |
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| 146 | movem [sp+],r10" |
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| 147 | |
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| 148 | /* Outputs. */ |
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| 149 | : "=r" (dst), "=r" (src), "=r" (n) |
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| 150 | |
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| 151 | /* Inputs. */ |
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| 152 | : "0" (dst), "1" (src), "2" (n)); |
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| 153 | } |
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| 154 | |
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| 155 | while (n >= 16) |
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| 156 | { |
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| 157 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 158 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 159 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 160 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 161 | |
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| 162 | n -= 16; |
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| 163 | } |
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| 164 | |
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| 165 | switch (n) |
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| 166 | { |
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| 167 | case 0: |
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| 168 | break; |
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| 169 | |
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| 170 | case 1: |
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| 171 | *dst = *src; |
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| 172 | break; |
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| 173 | |
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| 174 | case 2: |
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| 175 | *(short *) dst = *(short *) src; |
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| 176 | break; |
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| 177 | |
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| 178 | case 3: |
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| 179 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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| 180 | *dst = *src; |
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| 181 | break; |
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| 182 | |
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| 183 | case 4: |
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| 184 | *(long *) dst = *(long *) src; |
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| 185 | break; |
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| 186 | |
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| 187 | case 5: |
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| 188 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 189 | *dst = *src; |
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| 190 | break; |
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| 191 | |
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| 192 | case 6: |
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| 193 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 194 | *(short *) dst = *(short *) src; |
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| 195 | break; |
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| 196 | |
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| 197 | case 7: |
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| 198 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 199 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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| 200 | *dst = *src; |
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| 201 | break; |
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| 202 | |
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| 203 | case 8: |
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| 204 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 205 | *(long *) dst = *(long *) src; |
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| 206 | break; |
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| 207 | |
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| 208 | case 9: |
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| 209 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 210 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 211 | *dst = *src; |
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| 212 | break; |
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| 213 | |
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| 214 | case 10: |
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| 215 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 216 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 217 | *(short *) dst = *(short *) src; |
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| 218 | break; |
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| 219 | |
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| 220 | case 11: |
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| 221 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 222 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 223 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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| 224 | *dst = *src; |
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| 225 | break; |
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| 226 | |
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| 227 | case 12: |
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| 228 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 229 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 230 | *(long *) dst = *(long *) src; |
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| 231 | break; |
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| 232 | |
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| 233 | case 13: |
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| 234 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 235 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 236 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 237 | *dst = *src; |
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| 238 | break; |
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| 239 | |
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| 240 | case 14: |
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| 241 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 242 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 243 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 244 | *(short *) dst = *(short *) src; |
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| 245 | break; |
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| 246 | |
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| 247 | case 15: |
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| 248 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 249 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 250 | *(long *) dst = *(long *) src; dst += 4; src += 4; |
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| 251 | *(short *) dst = *(short *) src; dst += 2; src += 2; |
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| 252 | *dst = *src; |
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| 253 | break; |
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| 254 | } |
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| 255 | |
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| 256 | return return_dst; |
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| 257 | } |
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