[444] | 1 | /* This is a simple version of setjmp and longjmp for MIPS 32 and 64. |
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| 2 | |
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| 3 | Ian Lance Taylor, Cygnus Support, 13 May 1993. */ |
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| 4 | |
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| 5 | #ifdef __mips16 |
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| 6 | /* This file contains 32 bit assembly code. */ |
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| 7 | .set nomips16 |
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| 8 | #endif |
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| 9 | |
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| 10 | #define GPR_LAYOUT \ |
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| 11 | GPR_OFFSET ($16, 0); \ |
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| 12 | GPR_OFFSET ($17, 1); \ |
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| 13 | GPR_OFFSET ($18, 2); \ |
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| 14 | GPR_OFFSET ($19, 3); \ |
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| 15 | GPR_OFFSET ($20, 4); \ |
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| 16 | GPR_OFFSET ($21, 5); \ |
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| 17 | GPR_OFFSET ($22, 6); \ |
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| 18 | GPR_OFFSET ($23, 7); \ |
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| 19 | GPR_OFFSET ($29, 8); \ |
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| 20 | GPR_OFFSET ($30, 9); \ |
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| 21 | GPR_OFFSET ($31, 10) |
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| 22 | |
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| 23 | #define NUM_GPRS_SAVED 11 |
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| 24 | |
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| 25 | #ifdef __mips_hard_float |
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| 26 | #if _MIPS_SIM == _ABIN32 |
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| 27 | #define FPR_LAYOUT \ |
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| 28 | FPR_OFFSET ($f20, 0); \ |
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| 29 | FPR_OFFSET ($f22, 1); \ |
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| 30 | FPR_OFFSET ($f24, 2); \ |
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| 31 | FPR_OFFSET ($f26, 3); \ |
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| 32 | FPR_OFFSET ($f28, 4); \ |
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| 33 | FPR_OFFSET ($f30, 5); |
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| 34 | #elif _MIPS_SIM == _ABI64 |
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| 35 | #define FPR_LAYOUT \ |
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| 36 | FPR_OFFSET ($f24, 0); \ |
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| 37 | FPR_OFFSET ($f25, 1); \ |
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| 38 | FPR_OFFSET ($f26, 2); \ |
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| 39 | FPR_OFFSET ($f27, 3); \ |
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| 40 | FPR_OFFSET ($f28, 4); \ |
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| 41 | FPR_OFFSET ($f29, 5); \ |
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| 42 | FPR_OFFSET ($f30, 6); \ |
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| 43 | FPR_OFFSET ($f31, 7); |
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| 44 | #elif __mips_fpr == 0 || __mips_fpr == 64 |
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| 45 | |
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| 46 | /* This deals with the o32 FPXX and FP64 cases. Here we must use |
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| 47 | SDC1 and LDC1 to access the FPRs. These instructions require |
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| 48 | 8-byte aligned addresses. |
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| 49 | Unfortunately, the MIPS jmp_buf only guarantees 4-byte alignment |
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| 50 | and this cannot be increased without breaking compatibility with |
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| 51 | pre-existing objects built against newlib. There are 11 GPRS |
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| 52 | saved in the jmp_buf so a buffer that happens to be 8-byte aligned |
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| 53 | ends up leaving the FPR slots 4-byte aligned and an (only) 4-byte |
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| 54 | aligned buffer leads to the FPR slots being 8-byte aligned! |
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| 55 | |
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| 56 | To resolve this, we move the location of $31 to the last slot |
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| 57 | in the jmp_buf when the overall buffer is 8-byte aligned. $31 |
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| 58 | is simply loaded/stored twice to avoid adding complexity to the |
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| 59 | GPR_LAYOUT macro above as well as FPR_LAYOUT. |
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| 60 | |
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| 61 | The location of the last slot is index 22 which is calculated |
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| 62 | from there being 11 GPRs saved and then 12 FPRs saved so the |
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| 63 | index of the last FPR is 11+11. |
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| 64 | |
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| 65 | The base of the jmp_buf is modified in $4 to allow the |
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| 66 | FPR_OFFSET macros to just use the usual constant slot numbers |
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| 67 | regardless of whether the realignment happened or not. */ |
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| 68 | |
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| 69 | #define FPR_LAYOUT \ |
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| 70 | and $8, $4, 4; \ |
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| 71 | bne $8, $0, 1f; \ |
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| 72 | GPR_OFFSET ($31, 22); \ |
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| 73 | addiu $4, $4, -4; \ |
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| 74 | 1: \ |
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| 75 | FPR_OFFSET ($f20, 0); \ |
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| 76 | FPR_OFFSET ($f22, 2); \ |
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| 77 | FPR_OFFSET ($f24, 4); \ |
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| 78 | FPR_OFFSET ($f26, 6); \ |
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| 79 | FPR_OFFSET ($f28, 8); \ |
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| 80 | FPR_OFFSET ($f30, 10); |
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| 81 | #else /* Assuming _MIPS_SIM == _ABIO32 */ |
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| 82 | #define FPR_LAYOUT \ |
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| 83 | FPR_OFFSET ($f20, 0); \ |
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| 84 | FPR_OFFSET ($f21, 1); \ |
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| 85 | FPR_OFFSET ($f22, 2); \ |
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| 86 | FPR_OFFSET ($f23, 3); \ |
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| 87 | FPR_OFFSET ($f24, 4); \ |
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| 88 | FPR_OFFSET ($f25, 5); \ |
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| 89 | FPR_OFFSET ($f26, 6); \ |
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| 90 | FPR_OFFSET ($f27, 7); \ |
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| 91 | FPR_OFFSET ($f28, 8); \ |
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| 92 | FPR_OFFSET ($f29, 9); \ |
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| 93 | FPR_OFFSET ($f30, 10); \ |
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| 94 | FPR_OFFSET ($f31, 11); |
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| 95 | #endif |
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| 96 | #else |
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| 97 | #define FPR_LAYOUT |
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| 98 | #endif |
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| 99 | |
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| 100 | #ifdef __mips64 |
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| 101 | #define BYTES_PER_WORD 8 |
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| 102 | #define LOAD_GPR ld |
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| 103 | #define LOAD_FPR ldc1 |
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| 104 | #define STORE_GPR sd |
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| 105 | #define STORE_FPR sdc1 |
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| 106 | #else |
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| 107 | #define LOAD_GPR lw |
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| 108 | #define STORE_GPR sw |
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| 109 | #define BYTES_PER_WORD 4 |
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| 110 | #if __mips_fpr == 0 || __mips_fpr == 64 |
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| 111 | #define LOAD_FPR ldc1 |
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| 112 | #define STORE_FPR sdc1 |
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| 113 | #else |
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| 114 | #define LOAD_FPR lwc1 |
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| 115 | #define STORE_FPR swc1 |
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| 116 | #endif |
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| 117 | #endif |
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| 118 | |
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| 119 | #define GPOFF(INDEX) (INDEX * BYTES_PER_WORD) |
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| 120 | #define FPOFF(INDEX) ((INDEX + NUM_GPRS_SAVED) * BYTES_PER_WORD) |
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| 121 | |
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| 122 | /* int setjmp (jmp_buf); */ |
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| 123 | .globl setjmp |
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| 124 | .ent setjmp |
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| 125 | setjmp: |
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| 126 | .frame $sp,0,$31 |
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| 127 | |
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| 128 | #define GPR_OFFSET(REG, INDEX) STORE_GPR REG,GPOFF(INDEX)($4) |
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| 129 | #define FPR_OFFSET(REG, INDEX) STORE_FPR REG,FPOFF(INDEX)($4) |
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| 130 | GPR_LAYOUT |
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| 131 | FPR_LAYOUT |
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| 132 | #undef GPR_OFFSET |
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| 133 | #undef FPR_OFFSET |
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| 134 | |
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| 135 | move $2,$0 |
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| 136 | j $31 |
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| 137 | |
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| 138 | .end setjmp |
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| 139 | |
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| 140 | /* volatile void longjmp (jmp_buf, int); */ |
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| 141 | .globl longjmp |
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| 142 | .ent longjmp |
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| 143 | longjmp: |
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| 144 | .frame $sp,0,$31 |
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| 145 | |
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| 146 | #define GPR_OFFSET(REG, INDEX) LOAD_GPR REG,GPOFF(INDEX)($4) |
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| 147 | #define FPR_OFFSET(REG, INDEX) LOAD_FPR REG,FPOFF(INDEX)($4) |
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| 148 | GPR_LAYOUT |
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| 149 | FPR_LAYOUT |
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| 150 | #undef GPR_OFFSET |
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| 151 | #undef FPR_OFFSET |
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| 152 | |
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| 153 | bne $5,$0,1f |
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| 154 | li $5,1 |
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| 155 | 1: |
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| 156 | move $2,$5 |
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| 157 | j $31 |
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| 158 | |
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| 159 | .end longjmp |
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