[444] | 1 | /* Copyright (c) 2017 SiFive Inc. All rights reserved. |
---|
| 2 | |
---|
| 3 | This copyrighted material is made available to anyone wishing to use, |
---|
| 4 | modify, copy, or redistribute it subject to the terms and conditions |
---|
| 5 | of the FreeBSD License. This program is distributed in the hope that |
---|
| 6 | it will be useful, but WITHOUT ANY WARRANTY expressed or implied, |
---|
| 7 | including the implied warranties of MERCHANTABILITY or FITNESS FOR |
---|
| 8 | A PARTICULAR PURPOSE. A copy of this license is available at |
---|
| 9 | http://www.opensource.org/licenses. |
---|
| 10 | */ |
---|
| 11 | |
---|
| 12 | #include <sys/asm.h> |
---|
| 13 | |
---|
| 14 | /* int setjmp (jmp_buf); */ |
---|
| 15 | .globl setjmp |
---|
| 16 | .type setjmp, @function |
---|
| 17 | setjmp: |
---|
| 18 | REG_S ra, 0*SZREG(a0) |
---|
| 19 | REG_S s0, 1*SZREG(a0) |
---|
| 20 | REG_S s1, 2*SZREG(a0) |
---|
| 21 | |
---|
| 22 | #ifndef __riscv_32e |
---|
| 23 | REG_S s2, 3*SZREG(a0) |
---|
| 24 | REG_S s3, 4*SZREG(a0) |
---|
| 25 | REG_S s4, 5*SZREG(a0) |
---|
| 26 | REG_S s5, 6*SZREG(a0) |
---|
| 27 | REG_S s6, 7*SZREG(a0) |
---|
| 28 | REG_S s7, 8*SZREG(a0) |
---|
| 29 | REG_S s8, 9*SZREG(a0) |
---|
| 30 | REG_S s9, 10*SZREG(a0) |
---|
| 31 | REG_S s10,11*SZREG(a0) |
---|
| 32 | REG_S s11,12*SZREG(a0) |
---|
| 33 | REG_S sp, 13*SZREG(a0) |
---|
| 34 | #else |
---|
| 35 | REG_S sp, 3*SZREG(a0) |
---|
| 36 | #endif |
---|
| 37 | |
---|
| 38 | #ifndef __riscv_float_abi_soft |
---|
| 39 | FREG_S fs0, 14*SZREG+ 0*SZFREG(a0) |
---|
| 40 | FREG_S fs1, 14*SZREG+ 1*SZFREG(a0) |
---|
| 41 | FREG_S fs2, 14*SZREG+ 2*SZFREG(a0) |
---|
| 42 | FREG_S fs3, 14*SZREG+ 3*SZFREG(a0) |
---|
| 43 | FREG_S fs4, 14*SZREG+ 4*SZFREG(a0) |
---|
| 44 | FREG_S fs5, 14*SZREG+ 5*SZFREG(a0) |
---|
| 45 | FREG_S fs6, 14*SZREG+ 6*SZFREG(a0) |
---|
| 46 | FREG_S fs7, 14*SZREG+ 7*SZFREG(a0) |
---|
| 47 | FREG_S fs8, 14*SZREG+ 8*SZFREG(a0) |
---|
| 48 | FREG_S fs9, 14*SZREG+ 9*SZFREG(a0) |
---|
| 49 | FREG_S fs10,14*SZREG+10*SZFREG(a0) |
---|
| 50 | FREG_S fs11,14*SZREG+11*SZFREG(a0) |
---|
| 51 | #endif |
---|
| 52 | |
---|
| 53 | li a0, 0 |
---|
| 54 | ret |
---|
| 55 | .size setjmp, .-setjmp |
---|
| 56 | |
---|
| 57 | /* volatile void longjmp (jmp_buf, int); */ |
---|
| 58 | .globl longjmp |
---|
| 59 | .type longjmp, @function |
---|
| 60 | longjmp: |
---|
| 61 | REG_L ra, 0*SZREG(a0) |
---|
| 62 | REG_L s0, 1*SZREG(a0) |
---|
| 63 | REG_L s1, 2*SZREG(a0) |
---|
| 64 | #ifndef __riscv_32e |
---|
| 65 | REG_L s2, 3*SZREG(a0) |
---|
| 66 | REG_L s3, 4*SZREG(a0) |
---|
| 67 | REG_L s4, 5*SZREG(a0) |
---|
| 68 | REG_L s5, 6*SZREG(a0) |
---|
| 69 | REG_L s6, 7*SZREG(a0) |
---|
| 70 | REG_L s7, 8*SZREG(a0) |
---|
| 71 | REG_L s8, 9*SZREG(a0) |
---|
| 72 | REG_L s9, 10*SZREG(a0) |
---|
| 73 | REG_L s10,11*SZREG(a0) |
---|
| 74 | REG_L s11,12*SZREG(a0) |
---|
| 75 | REG_L sp, 13*SZREG(a0) |
---|
| 76 | #else |
---|
| 77 | REG_L sp, 3*SZREG(a0) |
---|
| 78 | #endif |
---|
| 79 | |
---|
| 80 | #ifndef __riscv_float_abi_soft |
---|
| 81 | FREG_L fs0, 14*SZREG+ 0*SZFREG(a0) |
---|
| 82 | FREG_L fs1, 14*SZREG+ 1*SZFREG(a0) |
---|
| 83 | FREG_L fs2, 14*SZREG+ 2*SZFREG(a0) |
---|
| 84 | FREG_L fs3, 14*SZREG+ 3*SZFREG(a0) |
---|
| 85 | FREG_L fs4, 14*SZREG+ 4*SZFREG(a0) |
---|
| 86 | FREG_L fs5, 14*SZREG+ 5*SZFREG(a0) |
---|
| 87 | FREG_L fs6, 14*SZREG+ 6*SZFREG(a0) |
---|
| 88 | FREG_L fs7, 14*SZREG+ 7*SZFREG(a0) |
---|
| 89 | FREG_L fs8, 14*SZREG+ 8*SZFREG(a0) |
---|
| 90 | FREG_L fs9, 14*SZREG+ 9*SZFREG(a0) |
---|
| 91 | FREG_L fs10,14*SZREG+10*SZFREG(a0) |
---|
| 92 | FREG_L fs11,14*SZREG+11*SZFREG(a0) |
---|
| 93 | #endif |
---|
| 94 | |
---|
| 95 | seqz a0, a1 |
---|
| 96 | add a0, a0, a1 # a0 = (a1 == 0) ? 1 : a1 |
---|
| 97 | ret |
---|
| 98 | .size longjmp, .-longjmp |
---|