[1] | 1 | /* |
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| 2 | This file is part of MutekP. |
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| 3 | |
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| 4 | MutekP is free software; you can redistribute it and/or modify it |
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| 5 | under the terms of the GNU General Public License as published by |
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| 6 | the Free Software Foundation; either version 2 of the License, or |
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| 7 | (at your option) any later version. |
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| 8 | |
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| 9 | MutekP is distributed in the hope that it will be useful, but |
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| 10 | WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 12 | General Public License for more details. |
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| 13 | |
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| 14 | You should have received a copy of the GNU General Public License |
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| 15 | along with MutekP; if not, write to the Free Software Foundation, |
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| 16 | Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 17 | |
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| 18 | UPMC / LIP6 / SOC (c) 2009 |
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| 19 | Copyright Ghassan Almaless <ghassan.almaless@gmail.com> |
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| 20 | */ |
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| 21 | |
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| 22 | #ifndef _CPU_SYSCALL_H_ |
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| 23 | #define _CPU_SYSCALL_H_ |
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| 24 | |
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| 25 | #include <sys/types.h> |
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| 26 | |
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| 27 | |
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| 28 | static inline void cpu_set_tls(void *ptr) |
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| 29 | { |
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| 30 | asm volatile ("or $27, $0, %0" :: "r" ((unsigned long)ptr)); |
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| 31 | } |
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| 32 | |
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| 33 | static inline void* cpu_get_tls(void) |
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| 34 | { |
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| 35 | register unsigned long ptr; |
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| 36 | asm volatile ("or %0, $0, $27" :"=&r" (ptr)); |
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| 37 | return (void*) ptr; |
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| 38 | } |
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| 39 | |
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| 40 | static inline void cpu_invalid_dcache_line(void *ptr) |
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| 41 | { |
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| 42 | __asm__ volatile |
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| 43 | ("cache %0, (%1) \n" |
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| 44 | "sync \n" |
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| 45 | : : "i" (0x11) , "r" (ptr) |
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| 46 | ); |
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| 47 | } |
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| 48 | |
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| 49 | static inline bool_t cpu_atomic_cas(void *ptr, sint_t old, sint_t new) |
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| 50 | { |
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| 51 | bool_t isAtomic; |
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| 52 | |
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| 53 | __asm__ volatile |
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| 54 | (".set noreorder \n" |
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| 55 | "sync \n" |
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| 56 | "or $8, $0, %3 \n" |
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| 57 | "lw $3, (%1) \n" |
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| 58 | "bne $3, %2, 1f \n" |
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| 59 | "li %0, 0 \n" |
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| 60 | "ll $3, (%1) \n" |
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| 61 | "bne $3, %2, 1f \n" |
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| 62 | "li %0, 0 \n" |
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| 63 | "sc $8, (%1) \n" |
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| 64 | "or %0, $8, $0 \n" |
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| 65 | "sync \n" |
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| 66 | ".set reorder \n" |
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| 67 | "1: \n" |
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| 68 | : "=&r" (isAtomic): "r" (ptr), "r" (old) , "r" (new) : "$3", "$8" |
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| 69 | ); |
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| 70 | |
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| 71 | return isAtomic; |
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| 72 | } |
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| 73 | |
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| 74 | static inline sint_t cpu_atomic_add(void *ptr, sint_t val) |
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| 75 | { |
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| 76 | sint_t current; |
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| 77 | |
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| 78 | __asm__ volatile |
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| 79 | ("1: \n" |
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| 80 | "ll %0, (%1) \n" |
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| 81 | "addu $3, %0, %2 \n" |
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| 82 | "sc $3, (%1) \n" |
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| 83 | "beq $3, $0, 1b \n" |
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| 84 | "sync \n" |
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| 85 | "cache 0x11, (%1) \n" |
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| 86 | :"=&r"(current) : "r" (ptr), "r" (val) : "$3" |
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| 87 | ); |
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| 88 | |
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| 89 | return current; |
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| 90 | } |
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| 91 | |
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| 92 | static inline bool_t cpu_spinlock_trylock(void *lock) |
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| 93 | { |
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| 94 | register uint_t retval; |
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| 95 | |
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| 96 | retval = false; |
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| 97 | |
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| 98 | //if(*((volatile uint_t *)lock) == 0) |
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| 99 | retval = cpu_atomic_cas(lock, 0, 1); |
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| 100 | |
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| 101 | if(retval == false) return true; |
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| 102 | |
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| 103 | cpu_invalid_dcache_line(lock); |
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| 104 | return false; |
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| 105 | } |
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| 106 | |
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| 107 | static inline void cpu_spinlock_lock(void *lock) |
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| 108 | { |
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| 109 | register bool_t retval; |
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| 110 | |
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| 111 | while(1) |
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| 112 | { |
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| 113 | if(*((volatile uint_t *)lock) == 0) |
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| 114 | { |
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| 115 | retval = cpu_atomic_cas(lock, 0, 1); |
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| 116 | if(retval == true) break; |
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| 117 | } |
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| 118 | } |
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| 119 | |
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| 120 | cpu_invalid_dcache_line(lock); |
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| 121 | } |
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| 122 | |
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| 123 | static inline uint_t cpu_load_word(void *ptr) |
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| 124 | { |
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| 125 | register uint_t val; |
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| 126 | |
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| 127 | __asm__ volatile |
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| 128 | ("lw %0, 0(%1) \n" |
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| 129 | : "=&r" (val) : "r"(ptr)); |
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| 130 | |
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| 131 | return val; |
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| 132 | } |
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| 133 | |
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| 134 | static inline void cpu_active_wait(uint_t val) |
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| 135 | { |
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| 136 | __asm__ volatile |
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| 137 | ("1: \n" |
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| 138 | "addiu $2, %0, -1 \n" |
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| 139 | "bne $2, $0, 1b \n" |
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| 140 | "nop \n" |
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| 141 | :: "r"(val) : "$2"); |
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| 142 | } |
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| 143 | |
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| 144 | static inline void cpu_wbflush(void) |
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| 145 | { |
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| 146 | __asm__ volatile |
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| 147 | ("sync \n"::); |
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| 148 | } |
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| 149 | |
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| 150 | #if 0 |
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| 151 | /* Try to take a spinlock */ |
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| 152 | static inline bool_t cpu_spinlock_trylock (void *lock) |
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| 153 | { |
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| 154 | register bool_t state = 0; |
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| 155 | |
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| 156 | __asm__ volatile |
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| 157 | ("or $2, $0, %1 \n" |
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| 158 | "1: \n" |
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| 159 | "ll $3, ($2) \n" |
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| 160 | ".set noreorder \n" |
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| 161 | "beq $3, $0, 2f \n" |
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| 162 | "or %0, $0, $3 \n" |
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| 163 | "j 3f \n" |
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| 164 | "2: \n" |
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| 165 | "ori $3, $0, 1 \n" |
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| 166 | "sc $3, ($2) \n" |
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| 167 | "nop \n" |
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| 168 | "beq $3, $0, 1b \n" |
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| 169 | "sync \n" |
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| 170 | "3: \n" |
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| 171 | ".set reorder \n" |
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| 172 | : "=&r" (state) : "r" (lock) : "$2","$3" |
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| 173 | ); |
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| 174 | |
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| 175 | return state; |
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| 176 | } |
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| 177 | #endif |
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| 178 | |
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| 179 | /* Unlock a spinlock */ |
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| 180 | static inline void cpu_spinlock_unlock (void *lock) |
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| 181 | { |
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| 182 | __asm__ volatile |
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| 183 | ("or $2, $0, %0 \n" |
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| 184 | "sync \n" |
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| 185 | "sw $0, 0($2) \n" |
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| 186 | "sync \n": : "r" (lock) : "$2" |
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| 187 | ); |
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| 188 | } |
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| 189 | |
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| 190 | |
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| 191 | /* System call */ |
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| 192 | void* cpu_syscall(void *arg0, void *arg1, void *arg2, void *arg3, int service_nr); |
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| 193 | |
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| 194 | #define CPU_SET_GP(val) \ |
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| 195 | asm volatile ("add $28, $0, %0": :"r" ((val))) |
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| 196 | |
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| 197 | |
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| 198 | #endif /* _CPU_SYSCALL_H_ */ |
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