1 | /* Copyright (c) 2007-2009, Stanford University |
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2 | * All rights reserved. |
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3 | * |
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4 | * Redistribution and use in source and binary forms, with or without |
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5 | * modification, are permitted provided that the following conditions are met: |
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6 | * * Redistributions of source code must retain the above copyright |
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7 | * notice, this list of conditions and the following disclaimer. |
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8 | * * Redistributions in binary form must reproduce the above copyright |
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9 | * notice, this list of conditions and the following disclaimer in the |
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10 | * documentation and/or other materials provided with the distribution. |
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11 | * * Neither the name of Stanford University nor the names of its |
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12 | * contributors may be used to endorse or promote products derived from |
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13 | * this software without specific prior written permission. |
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14 | * |
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15 | * THIS SOFTWARE IS PROVIDED BY STANFORD UNIVERSITY ``AS IS'' AND ANY |
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16 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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17 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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18 | * DISCLAIMED. IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE FOR ANY |
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19 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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20 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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21 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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22 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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24 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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25 | */ |
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26 | |
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27 | /** |
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28 | * define __x86_64__ for x86-64 |
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29 | * define CPU_V9 for sparc |
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30 | */ |
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31 | #ifndef ATOMIC_H |
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32 | #define ATOMIC_H |
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33 | |
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34 | #include <stdint.h> |
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35 | #include <cpu-syscall.h> |
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36 | |
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37 | static inline void spin_wait(int n) |
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38 | { |
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39 | volatile int tmp = n; |
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40 | |
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41 | while(tmp > 0) |
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42 | { |
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43 | tmp--; |
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44 | cpu_wbflush(); |
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45 | } |
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46 | } |
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47 | |
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48 | #define set_and_flush(x,y) \ |
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49 | do { \ |
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50 | void* p; \ |
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51 | p = &(x); \ |
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52 | cpu_wbflush(); \ |
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53 | (x) = (y); \ |
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54 | flush(p); \ |
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55 | } while (0) |
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56 | |
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57 | /* a bunch of atomic ops follow... */ |
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58 | |
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59 | static inline void flush(void* addr) |
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60 | { |
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61 | __asm__ volatile |
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62 | ("cache %0, (%1) \n" |
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63 | "sync \n" |
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64 | : : "i" (0x11) , "r" (addr) |
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65 | ); |
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66 | } |
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67 | |
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68 | static inline uintptr_t atomic_read(void* addr) { return cpu_load_word(addr); } |
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69 | |
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70 | |
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71 | /* returns zero if already set, returns nonzero if not set */ |
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72 | /* we don't use bts because it is super-slow */ |
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73 | |
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74 | |
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75 | /* adds 1 to value pointed to in 'n', returns old value */ |
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76 | static inline unsigned int fetch_and_inc(unsigned int* n) |
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77 | { |
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78 | unsigned int oldval; |
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79 | |
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80 | return (unsigned) cpu_atomic_add(n, 1); |
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81 | } |
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82 | |
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83 | /* returns true on swap */ |
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84 | static inline int cmp_and_swp(uintptr_t v, uintptr_t* cmper, uintptr_t matcher) |
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85 | { |
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86 | return cpu_atomic_cas(cmper, matcher, v); |
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87 | } |
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88 | |
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89 | static inline int test_and_set(uintptr_t* n) |
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90 | { |
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91 | return cmp_and_swp(1, n, 0); |
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92 | } |
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93 | /** |
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94 | * @n - value to store |
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95 | * @v - location to store into |
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96 | * @return previous value in v |
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97 | */ |
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98 | static inline uintptr_t atomic_xchg(uintptr_t n, uintptr_t* v) |
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99 | { |
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100 | uintptr_t old; |
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101 | bool_t isAtomic; |
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102 | |
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103 | do |
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104 | { |
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105 | old = cpu_load_word(v); |
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106 | isAtomic = cpu_atomic_cas(v, *v, n); |
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107 | }while(isAtomic == false); |
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108 | |
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109 | return old; |
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110 | } |
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111 | |
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112 | #endif |
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113 | // vim: ts=4 |
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