1 | /* |
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2 | ******************************************************************************* |
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3 | * Authors: |
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4 | * Maxime Villard, 2017 |
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5 | * Jankovic Marco, 01/07/2014 |
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6 | ******************************************************************************* |
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7 | */ |
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8 | |
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9 | #include "common.h" |
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10 | |
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11 | typedef enum fsm_state_t { |
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12 | FSM_INIT_COM, |
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13 | FSM_IDLE, |
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14 | FSM_READ_TTY, |
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15 | FSM_WRITE_TTY, |
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16 | FSM_READ_DEVICE, |
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17 | FSM_WRITE_DEVICE, |
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18 | FSM_READ_FIFO_RX, |
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19 | FSM_READ_FIFO_TX, |
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20 | FSM_WRITE_FIFO_RX, |
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21 | FSM_WRITE_FIFO_TX, |
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22 | } fsm_state; |
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23 | |
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24 | typedef enum flux_control_state_t { |
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25 | DONE, |
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26 | SEND_XON, |
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27 | SEND_XOFF |
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28 | } flux_control_state; |
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29 | |
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30 | typedef enum tx_state_t { |
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31 | ENABLE, |
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32 | DISABLE, |
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33 | } tx_state; |
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34 | |
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35 | /* |
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36 | * Variables used for thread communication. |
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37 | */ |
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38 | static flux_control_state flux_control = DONE; // used for xon/xoff |
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39 | static tx_state TX_STATE = ENABLE; // used to ENABLE/DISABLE thread write |
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40 | |
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41 | /* |
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42 | * This thread reads the fifo_rx for data, then writes those data to the correct |
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43 | * tty with the id contained in the packet. Then it checks if a tty is readable. |
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44 | * If there is one, write N packet from one tty to the fifo_tx then return to |
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45 | * idle state. |
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46 | */ |
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47 | void *thread_mux_demux(void *a) |
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48 | { |
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49 | UNUSED(a); |
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50 | printf("[+] thread_mux launched\n"); |
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51 | |
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52 | fd_set readfs; |
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53 | char packet_buffer[2 * READ_LEN]; |
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54 | char tty_raw_buffer[READ_LEN]; |
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55 | char *pkt; |
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56 | |
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57 | int res; |
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58 | int i,j; |
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59 | int tty_id; |
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60 | int tty_size_read = 0; |
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61 | int fifo_size_read = 0; |
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62 | fsm_state mux_state; |
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63 | |
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64 | sigset_t ens; |
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65 | sigfillset(&ens); |
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66 | sigdelset(&ens, SIGTERM); |
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67 | pthread_sigmask(SIG_SETMASK, &ens, NULL); |
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68 | |
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69 | struct timeval timeout; |
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70 | |
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71 | mux_state = FSM_IDLE; |
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72 | |
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73 | while (1) |
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74 | { |
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75 | switch (mux_state) { |
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76 | /* |
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77 | * check if the fifo_rx is readable -> FSM_READ_FIFO_RX |
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78 | * if not check if there is readable data in target_fd -> FSM_READ_TTY |
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79 | */ |
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80 | case FSM_IDLE: |
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81 | FD_ZERO(&readfs); |
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82 | FD_SET(fifo_rx_fd, &readfs); |
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83 | |
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84 | /* |
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85 | * check if fifo_rx is readable |
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86 | */ |
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87 | timeout.tv_sec = TIMEOUT_DELAY_MUX_S; |
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88 | timeout.tv_usec = TIMEOUT_DELAY_MUX_US; |
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89 | res = select(FD_SETSIZE, &readfs, NULL, NULL, &timeout); |
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90 | if (res < 0) { |
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91 | err(1, "select"); |
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92 | } else if (res == 0) { |
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93 | /* nothing to read, try to read a tty */ |
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94 | mux_state = FSM_READ_TTY; |
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95 | break; |
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96 | } |
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97 | |
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98 | /* readable */ |
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99 | mux_state = FSM_READ_FIFO_RX; |
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100 | break; |
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101 | |
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102 | /* |
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103 | * Read fifo_rx. |
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104 | */ |
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105 | case FSM_READ_FIFO_RX: |
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106 | fifo_size_read = read(fifo_rx_fd, packet_buffer, READ_LEN); |
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107 | |
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108 | if (!fifo_size_read) { |
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109 | perror("read"); |
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110 | mux_state = FSM_IDLE; |
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111 | break; |
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112 | } |
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113 | |
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114 | mux_state = FSM_WRITE_TTY; |
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115 | break; |
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116 | |
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117 | /* |
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118 | * Write the data to the proper tty, then -> FSM_READ_TTY. |
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119 | */ |
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120 | case FSM_WRITE_TTY: |
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121 | j = 0; |
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122 | |
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123 | while (j < fifo_size_read) { |
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124 | pkt = packet_buffer + j; |
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125 | write(slave_fd[(uint8_t)pkt[PKT_TTY]], &pkt[PKT_DAT], 1); |
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126 | #if DEBUG_MUX |
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127 | printf("[MUX::FSM_WRITE_TTY] tty_id=%x | data=%c\n", |
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128 | pkt[PKT_TTY], pkt[PKT_DAT]); |
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129 | #endif |
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130 | j += PACKET_SIZE; |
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131 | } |
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132 | mux_state = FSM_READ_TTY; |
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133 | break; |
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134 | |
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135 | /* |
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136 | * Check if there is a readable tty. Return to idle if there is no |
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137 | * tty ready, otherwise -> FSM_WRITE_FIFO_TX. |
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138 | */ |
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139 | case FSM_READ_TTY: |
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140 | timeout.tv_sec = TIMEOUT_DELAY_MUX_S; |
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141 | timeout.tv_usec = TIMEOUT_DELAY_MUX_US; |
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142 | |
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143 | FD_ZERO(&readfs); |
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144 | for (i = 0; i < NB_CHANNELS; i++) { |
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145 | FD_SET(slave_fd[i], &readfs); |
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146 | } |
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147 | |
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148 | res = select(FD_SETSIZE, &readfs, NULL, NULL, &timeout); |
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149 | if (res < 0) { |
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150 | err(1, "select"); |
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151 | } else if (res == 0) { |
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152 | /* no readable tty */ |
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153 | mux_state = FSM_IDLE; |
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154 | break; |
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155 | } |
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156 | |
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157 | /* one tty is readable, find it */ |
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158 | tty_id = 0; |
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159 | while (tty_id < NB_CHANNELS && !(res = FD_ISSET(slave_fd[tty_id], &readfs))) { |
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160 | tty_id++; |
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161 | } |
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162 | |
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163 | /* read it */ |
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164 | tty_size_read = read(slave_fd[tty_id], tty_raw_buffer, READ_LEN); |
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165 | |
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166 | if (tty_size_read == 0) { |
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167 | mux_state = FSM_IDLE; |
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168 | printf("thread MUX FSM_READ_TTY: error while reading tty_%d\n", tty_id); |
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169 | perror("read"); |
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170 | break; |
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171 | } |
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172 | #if DEBUG_MUX |
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173 | printf("[MUX::FSM_READ_TTY] read from tty_id=%d | %d bytes\n", |
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174 | tty_id, tty_size_read); |
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175 | #endif |
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176 | i = 0; |
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177 | j = 0; |
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178 | while (i < tty_size_read) { |
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179 | pkt = packet_buffer + j; |
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180 | pkt[PKT_TTY] = tty_id | 0x80; |
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181 | pkt[PKT_DAT] = tty_raw_buffer[i]; |
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182 | i++; |
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183 | j += PACKET_SIZE; |
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184 | } |
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185 | |
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186 | mux_state = FSM_WRITE_FIFO_TX; |
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187 | break; |
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188 | |
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189 | /* |
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190 | * Write packet_buffer into fifo_tx. |
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191 | */ |
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192 | case FSM_WRITE_FIFO_TX: |
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193 | write(fifo_tx_fd, packet_buffer, tty_size_read * PACKET_SIZE); |
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194 | mux_state = FSM_IDLE; |
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195 | break; |
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196 | |
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197 | default: |
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198 | err(1, "unreachable"); |
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199 | break; |
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200 | } |
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201 | } |
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202 | return (void*)NULL; |
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203 | } |
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204 | |
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205 | /* |
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206 | * This thread initiates communication with the device by sending XON |
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207 | * -> read the RX_BUFFER |
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208 | * -> check packet correctness |
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209 | * -> check fifo_rx size |
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210 | * -> software flux control |
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211 | * -> then write to the fifo_rx |
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212 | */ |
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213 | void *thread_read_rx(void *a) |
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214 | { |
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215 | UNUSED(a); |
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216 | printf("[+] thread_read_rx launched\n"); |
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217 | int size_read = 0; |
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218 | int bytes_avail = 0; |
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219 | int id_ok = 0; |
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220 | int res = 0; |
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221 | int x_off = 0; |
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222 | int device_raw_offset = 0; |
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223 | fd_set readfs; |
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224 | int fd; |
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225 | |
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226 | #if TEST_BENCH |
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227 | fd = test_rx_fd; |
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228 | #else |
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229 | fd = device_fd; |
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230 | #endif |
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231 | |
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232 | unsigned char device_raw_data[READ_LEN]; |
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233 | unsigned char packet_buffer[2]; |
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234 | |
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235 | struct timeval timeout; |
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236 | |
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237 | #if TEST_BENCH |
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238 | fsm_state read_state = FSM_IDLE; |
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239 | #else |
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240 | fsm_state read_state = FSM_INIT_COM; |
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241 | #endif |
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242 | |
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243 | while (1) |
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244 | { |
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245 | switch (read_state) |
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246 | { |
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247 | /* |
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248 | * This state is used to initiate communication with the device |
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249 | * by sending periodically XON while the RX_BUFFER is empty. |
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250 | * Then we reach FSM_IDLE, and never to this state afterwards. |
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251 | */ |
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252 | case FSM_INIT_COM: |
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253 | FD_ZERO(&readfs); |
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254 | FD_SET(fd, &readfs); |
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255 | |
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256 | timeout.tv_sec = TIMEOUT_DELAY_READ_S; |
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257 | timeout.tv_usec = TIMEOUT_DELAY_READ_US; |
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258 | |
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259 | res = select(FD_SETSIZE, &readfs, NULL, NULL, &timeout); |
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260 | if (res > 0) { |
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261 | read_state = FSM_IDLE; |
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262 | flux_control = DONE; |
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263 | break; |
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264 | } else if (res < 0) { |
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265 | err(1, "select"); |
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266 | } else { |
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267 | /* nothing to read */ |
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268 | } |
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269 | |
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270 | if (flux_control == DONE) |
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271 | flux_control = SEND_XON; |
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272 | break; |
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273 | |
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274 | /* |
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275 | * This state first checks the number of bytes available in fifo_rx. |
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276 | * If FIFO_LIMIT_SIZE is reached a XOFF is sent. After checking the |
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277 | * fifo, check if the device is ready for i/o -> FSM_READ_DEVICE. |
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278 | */ |
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279 | case FSM_IDLE: |
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280 | FD_ZERO(&readfs); |
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281 | FD_SET(fd, &readfs); |
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282 | |
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283 | if (ioctl(fifo_rx_fd, FIONREAD, &bytes_avail) < 0) { |
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284 | err(1, "ioctl"); |
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285 | } |
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286 | |
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287 | if (bytes_avail > FIFO_LIMIT_SIZE && !x_off) { |
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288 | if (flux_control == DONE) { |
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289 | flux_control = SEND_XOFF; |
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290 | x_off = 1; |
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291 | } |
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292 | } else if ((bytes_avail < FIFO_LIMIT_SIZE) && x_off) { |
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293 | if (flux_control == DONE) { |
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294 | flux_control = SEND_XON; |
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295 | x_off = 0; |
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296 | } |
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297 | } |
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298 | |
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299 | /* |
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300 | * check if the device is readable |
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301 | */ |
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302 | timeout.tv_sec = TIMEOUT_DELAY_READ_S; |
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303 | timeout.tv_usec = TIMEOUT_DELAY_READ_US; |
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304 | res = select(FD_SETSIZE, &readfs, NULL, NULL, &timeout); |
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305 | if (res > 0) { |
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306 | read_state = FSM_READ_DEVICE; |
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307 | break; |
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308 | } else if (res < 0) { |
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309 | err(1, "select"); |
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310 | } else { |
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311 | /* nothing to read */ |
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312 | } |
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313 | |
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314 | break; |
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315 | |
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316 | /* |
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317 | * Read the device, then -> FSM_WRITE_FIFO_RX. |
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318 | */ |
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319 | case FSM_READ_DEVICE: |
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320 | size_read = read(fd, device_raw_data, READ_LEN); |
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321 | if (size_read == 0) { |
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322 | read_state = FSM_IDLE; |
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323 | break; |
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324 | } |
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325 | |
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326 | read_state = FSM_WRITE_FIFO_RX; |
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327 | break; |
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328 | |
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329 | /* |
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330 | * Control packet correctness |
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331 | * if a data is XON -> ENABLE thread_write |
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332 | * if a data is XOFF -> DISABLE thread_write |
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333 | * non correct packet are dropped |
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334 | * then back to idle |
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335 | */ |
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336 | case FSM_WRITE_FIFO_RX: |
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337 | device_raw_offset = 0; |
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338 | while (device_raw_offset < size_read) |
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339 | { |
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340 | #if DEBUG_READ |
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341 | printf("-> got packet from device: data=%x\n", device_raw_data[device_raw_offset]); |
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342 | #endif |
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343 | if (device_raw_data[device_raw_offset] == XOFF) { |
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344 | printf("XOFF received\n"); |
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345 | TX_STATE = DISABLE; |
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346 | device_raw_offset++; |
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347 | continue; |
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348 | } else if (device_raw_data[device_raw_offset] == XON) { |
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349 | printf("XON received\n"); |
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350 | TX_STATE = ENABLE; |
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351 | device_raw_offset++; |
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352 | continue; |
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353 | } else if (device_raw_data[device_raw_offset] & 0x80) { |
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354 | id_ok = 1; |
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355 | packet_buffer[PKT_TTY] = device_raw_data[device_raw_offset] & 0x7F; /* XXX: should be in the demux thread */ |
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356 | |
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357 | device_raw_offset++; |
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358 | #if DEBUG_READ |
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359 | printf("--> detected ID in packet: id=%x\n", packet_buffer[PKT_TTY]); |
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360 | #endif |
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361 | continue; |
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362 | } |
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363 | /* check if data is not ID*/ |
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364 | else if (id_ok && !(device_raw_data[device_raw_offset] & 0x80)) |
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365 | { |
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366 | if (device_raw_data[device_raw_offset] == XOFF) { |
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367 | #if DEBUG_READ |
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368 | printf("--> detected DATA in packet: XOFF\n"); |
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369 | #endif |
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370 | device_raw_offset++; |
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371 | TX_STATE = DISABLE; |
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372 | continue; |
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373 | } else if (device_raw_data[device_raw_offset] == XON) { |
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374 | #if DEBUG_READ |
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375 | printf("--> detected DATA in packet: XON\n"); |
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376 | #endif |
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377 | device_raw_offset++; |
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378 | TX_STATE = ENABLE; |
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379 | continue; |
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380 | } |
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381 | #if DEBUG_READ |
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382 | printf("--> detected DATA in packet: '%c'\n", device_raw_data[device_raw_offset]); |
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383 | #endif |
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384 | packet_buffer[PKT_DAT] = device_raw_data[device_raw_offset]; |
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385 | id_ok = 0; |
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386 | |
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387 | write(fifo_rx_fd, packet_buffer, PACKET_SIZE); |
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388 | device_raw_offset++; |
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389 | continue; |
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390 | } |
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391 | printf("-> dropping data=%x\n", device_raw_data[device_raw_offset]); |
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392 | device_raw_offset++; |
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393 | } |
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394 | |
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395 | read_state = FSM_IDLE; |
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396 | break; |
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397 | |
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398 | default: |
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399 | err(1, "unreachable"); |
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400 | break; |
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401 | } |
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402 | } |
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403 | return NULL; |
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404 | } |
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405 | |
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406 | /* |
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407 | * This thread writes packets from the fifo_tx to the TX_BUFFER. This thread is |
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408 | * controlled with TX_STATE and flux_control. |
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409 | */ |
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410 | void *thread_write_tx(void *a) |
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411 | { |
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412 | UNUSED(a); |
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413 | #if DEBUG_WRITE |
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414 | int i,j; |
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415 | #endif |
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416 | |
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417 | int res = 0; |
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418 | int size_read = 0; |
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419 | int fd; |
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420 | |
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421 | unsigned char xon = XON; |
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422 | unsigned char xoff = XOFF; |
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423 | fd_set readfs; |
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424 | |
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425 | #if TEST_BENCH |
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426 | fd = test_tx_fd; |
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427 | #else |
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428 | fd = device_fd; |
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429 | #endif |
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430 | |
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431 | unsigned char device_buf[READ_LEN]; |
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432 | |
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433 | struct timeval timeout; |
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434 | |
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435 | fsm_state write_state = FSM_IDLE; |
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436 | |
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437 | printf("[+] thread_write_tx launched\n"); |
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438 | |
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439 | while (1) |
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440 | { |
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441 | switch (write_state) |
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442 | { |
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443 | /* |
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444 | * Depending on TX_STATE and flux_control, send a xon or xoff or |
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445 | * yield if DISABLE. Otherwise, check if the fifo_tx is readable |
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446 | * -> FSM_READ_FIFO_TX. |
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447 | */ |
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448 | case FSM_IDLE: |
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449 | /* software flux control section */ |
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450 | if (TX_STATE == DISABLE && flux_control != DONE) { |
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451 | sched_yield(); |
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452 | break; |
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453 | } else if (flux_control == SEND_XOFF) { |
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454 | write(fd, &xoff, 1); |
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455 | flux_control = DONE; |
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456 | printf("XOFF sent\n"); |
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457 | break; |
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458 | } else if (flux_control == SEND_XON) { |
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459 | write(fd, &xon, 1); |
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460 | flux_control = DONE; |
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461 | printf("XON sent\n"); |
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462 | break; |
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463 | } |
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464 | /**********************************/ |
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465 | |
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466 | /* |
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467 | * check if the fifo is readable |
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468 | */ |
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469 | FD_ZERO(&readfs); |
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470 | FD_SET(fifo_tx_fd, &readfs); |
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471 | timeout.tv_sec = TIMEOUT_DELAY_WRITE_S; |
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472 | timeout.tv_usec = TIMEOUT_DELAY_WRITE_US; |
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473 | res = select(FD_SETSIZE, &readfs, NULL, NULL, &timeout); |
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474 | if (res > 0) { |
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475 | if (TX_STATE != DISABLE) |
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476 | write_state = FSM_READ_FIFO_TX; |
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477 | break; |
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478 | } else if (res < 0) { |
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479 | err(1, "select"); |
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480 | } else { |
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481 | /* nothing to read */ |
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482 | } |
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483 | |
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484 | break; |
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485 | |
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486 | /* |
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487 | * Read from fifo_tx, then -> FSM_WRITE_DEVICE. |
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488 | */ |
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489 | case FSM_READ_FIFO_TX: |
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490 | size_read = read(fifo_tx_fd, device_buf, READ_LEN); |
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491 | |
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492 | #if DEBUG_WRITE |
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493 | i = 0; |
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494 | j = 0; |
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495 | while (i < size_read) { |
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496 | printf("thread WRITE id=%x data='%c'\n", device_buf[j + PKT_TTY],device_buf[j + PKT_DAT]); |
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497 | i += PACKET_SIZE; |
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498 | j += PACKET_SIZE; |
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499 | } |
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500 | #endif |
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501 | |
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502 | if (size_read == 0) { |
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503 | write_state = FSM_IDLE; |
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504 | break; |
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505 | } |
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506 | |
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507 | write_state = FSM_WRITE_DEVICE; |
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508 | break; |
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509 | |
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510 | /* |
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511 | * Write to the device, then return to idle. |
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512 | */ |
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513 | case FSM_WRITE_DEVICE: |
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514 | size_read = write(fd, device_buf, size_read); |
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515 | write_state = FSM_IDLE; |
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516 | break; |
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517 | |
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518 | default: |
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519 | err(1, "unreachable"); |
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520 | break; |
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521 | } |
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522 | } |
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523 | return NULL; |
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524 | } |
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